[原创] TIVA C launchpad试用心得3.-SP接口读写w25x80Flash

shower.xu 2013-11-16 17:50 楼主

手头有w25x80的IC，是spi接口的flash芯片，很好读写和使用，就连在launchpad的接口上试试

其实只要实现字节的读写就好了，其它的页段操作都是在这上面实现的
源代码在这里

3.rar (738.78 KB)
(下载次数: 7, 2013-11-16 17:52 上传)

//*****************************************************************************
void
SPI1_CSIO_Init(void)
{
//
// Enable Peripheral Clocks
//
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
//
// Enable port PC5 for GPIOOutput
//
MAP_GPIOPinTypeGPIOOutput(GPIO_PORTC_BASE, GPIO_PIN_5);
//
// Enable port PD1 for GPIOOutput
//
MAP_GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_1);
}
//*****************************************************************************
void SPI_CS(enum Device tDev)
{
switch(tDev)
{
case SD:
FLASH_CS0(0);
SD_CS0(1);
break;
case FLASH:
SD_CS0(0);
FLASH_CS0(1);
break;
case VS1003:
NRF2401_CS0(0);
VS1003_CS0(1);
break;
case NRF2401:
VS1003_CS0(0);
NRF2401_CS0(1);
break;
default:break;
}
}
//*****************************************************************************
void SD_CS(unsigned char id)
{
SD_CS0(id);
}
//*****************************************************************************
void
SPI0_Prot_Init(void)
{
//
// Enable Peripheral Clocks
//
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
//
// Enable port PA4 for SSI0 SSI0RX
//
MAP_GPIOPinConfigure(GPIO_PA4_SSI0RX);
MAP_GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_4);
//
// Enable port PA5 for SSI0 SSI0TX
//
MAP_GPIOPinConfigure(GPIO_PA5_SSI0TX);
MAP_GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_5);
//
// Enable port PA2 for SSI0 SSI0CLK
//
MAP_GPIOPinConfigure(GPIO_PA2_SSI0CLK);
MAP_GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_2);
/* //
// Enable port PA3 for SSI0 SSI0FSS
//
MAP_GPIOPinConfigure(GPIO_PA3_SSI0FSS);
MAP_GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_3); */
}
//*****************************************************************************
void
SPI1_Port_Init(void)
{
//
// Enable Peripheral Clocks
//
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI1);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
//
// Enable port PD3 for SSI1 SSI1TX
//
MAP_GPIOPinConfigure(GPIO_PD3_SSI1TX);
MAP_GPIOPinTypeSSI(GPIO_PORTD_BASE, GPIO_PIN_3);
//
// Enable port PD0 for SSI1 SSI1CLK
//
MAP_GPIOPinConfigure(GPIO_PD0_SSI1CLK);
MAP_GPIOPinTypeSSI(GPIO_PORTD_BASE, GPIO_PIN_0);
//
// Enable port PD2 for SSI1 SSI1RX
//
MAP_GPIOPinConfigure(GPIO_PD2_SSI1RX);
MAP_GPIOPinTypeSSI(GPIO_PORTD_BASE, GPIO_PIN_2);
/* //
// Enable port PD1 for SSI1 SSI1FSS
//
MAP_GPIOPinConfigure(GPIO_PD1_SSI1FSS);
MAP_GPIOPinTypeSSI(GPIO_PORTD_BASE, GPIO_PIN_1); */
}
//*******************************************************************************
void
SPI0_Init(unsigned long ulBitRate)
{
SPI0_Prot_Init();
//
// Configure and enable the SSI port for SPI master mode. Use SSI0,
// system clock supply, idle clock level low and active low clock in
// freescale SPI mode, master mode, 1MHz SSI frequency, and 8-bit data.
// For SPI mode, you can set the polarity of the SSI clock when the SSI
// unit is idle. You can also configure what clock edge you want to
// capture data on. Please reference the datasheet for more information on
// the different SPI modes.
//
SSIConfigSetExpClk(SSI0_BASE, SysCtlClockGet(), SSI_FRF_MOTO_MODE_0,
SSI_MODE_MASTER, ulBitRate, 8);
//
// Enable the SSI0 module.
//
SSIEnable(SSI0_BASE);
}
//*******************************************************************************
void
SPI1_Init(unsigned long ulBitRate)
{
SPI1_Port_Init();
//
// Configure and enable the SSI port for SPI master mode. Use SSI1,
// system clock supply, idle clock level low and active low clock in
// freescale SPI mode, master mode, 1MHz SSI frequency, and 8-bit data.
// For SPI mode, you can set the polarity of the SSI clock when the SSI
// unit is idle. You can also configure what clock edge you want to
// capture data on. Please reference the datasheet for more information on
// the different SPI modes.
//
SSIConfigSetExpClk(SSI1_BASE, SysCtlClockGet(), SSI_FRF_MOTO_MODE_0,
SSI_MODE_MASTER, ulBitRate, 8);
//
// Enable the SSI1 module.
//
SSIEnable(SSI1_BASE);
}
//****************************************************************************
void
SPI0_SetSpeed(unsigned char speed)//SPI速度设置
{
SSIConfigSetExpClk(SSI0_BASE, SysCtlClockGet(), SSI_FRF_MOTO_MODE_0,
SSI_MODE_MASTER, MAXHZ>>speed, 8);
SSIEnable(SSI0_BASE);
}
//****************************************************************************
void
SPI1_SetSpeed(unsigned char speed)//SPI速度设置
{
SSIConfigSetExpClk(SSI1_BASE, SysCtlClockGet(), SSI_FRF_MOTO_MODE_0,
SSI_MODE_MASTER, MAXHZ>>speed, 8);
SSIEnable(SSI1_BASE);
}
//*******************************************************************************
unsigned char
SPI0_ReadWriteByte(unsigned char data)//发送接收一个数据
{
unsigned long rcvdat;
ROM_SSIDataPut(SSI0_BASE, data); /* write dummy data */
ROM_SSIDataGet(SSI0_BASE, &rcvdat); /* read data frm rx fifo */
return (unsigned char)rcvdat;
}
//*******************************************************************************
unsigned char
SPI1_ReadWriteByte(unsigned char data)//发送接收一个数据
{
unsigned long rcvdat;
ROM_SSIDataPut(SSI1_BASE, data); /* write dummy data */
ROM_SSIDataGet(SSI1_BASE, &rcvdat); /* read data frm rx fifo */
return (unsigned char)rcvdat;
}