ATxmega32E5/16E5/8E5
XMEGA
®
E5 Data Sheet
Introduction
The AVR
®
XMEGA
®
E5 is a family of low power, high performance, and peripheral rich 8/16-bit microcon-
trollers based on the AVR enhanced RISC architecture. The XMEGA E5 is a 32-pins device ranging from
8KB to 32KB Flash, with 1KB to 4KB SRAM, 512Bytes to 1KB EEPROM and up to 4KB boot section. The
ATxmegaE5 devices operate at a maximum frequency of 32MHz. By executing instructions in a single
clock cycle, the devices achieve CPU throughput approaching one million instructions per second (MIPS)
per megahertz, allowing the system designer to optimize power consumption versus processing speed.
Features
High-performance, low-power AVR
®
XMEGA
®
8/16-bit Microcontroller
Nonvolatile program and data memories
8K –32KB of in-system self-programmable flash
2K – 4KB boot section
512Bytes – 1KB EEPROM
1K – 4KB internal SRAM
Four-channel enhanced DMA controller with 8/16-bit address match
Eight-channel event system
Peripheral features
Asynchronous and synchronous signal routing
Quadrature encoder with rotary filter
Three 16-bit timer/counters
One timer/counter with four output compare or input capture channels
Two timer/counter with two output compare or input capture channels
High resolution extension enabling down to 4ns PWM resolution
Waveform extension for control of motor, LED, lighting, H-bridge, high drives, and more
Fault extension for safe and deterministic handling and/or shut-down of external driver
CRC-16 (CRC-CCITT) and CRC-32 (IEEE 802.3) generator
XMEGA Custom Logic (XCL) module with timer, counter and logic functions
Two 8-bit timer/counters with capture/compare and 16-bit cascade mode
Connected to one USART to support custom data frame length
Connected to I/O pins and event system to do programmable logic functions
MUX, AND, NAND, OR, NOR, XOR, XNOR, NOT, D-Flip-Flop, D Latch, RS Latch
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Data Sheet Complete
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ATxmega32E5/16E5/8E5
Two USARTs with full-duplex and single wire half-duplex configuration
Master SPI mode
Support custom protocols with configurable data frame length up to 256-bit
System wake-up from deep sleep modes when used with internal 8MHz oscillator
One two-wire interface with dual address match (I
2
C and SMBus compatible)
Bridge configuration for simultaneous master and slave operation
Up to 1MHz bus speed support
One serial peripheral interface (SPI)
16-bit real time counter with separate oscillator and digital correction
One sixteen-channel, 12-bit, 300ksps Analog to Digital Converter with:
Offset and gain correction
Averaging
Over-sampling and decimation
One two-channel, 12-bit, 1Msps Digital to Analog Converter
Two Analog Comparators with window compare function and current sources
External interrupts on all general purpose I/O pins
Programmable watchdog timer with separate on-chip ultra low power oscillator
QTouch
®
library support
Capacitive touch buttons, sliders and wheels
Power-on reset and programmable brown-out detection
Internal and external clock options with PLL
Programmable multilevel interrupt controller
Five sleep modes
Programming and debug interface
Special microcontroller features
PDI (Program and Debug Interface)
I/O and Packages
26 programmable I/O pins
7x7mm 32-lead TQFP
5x5mm 32-lead VQFN
4x4mm 32-lead UQFN
1.6 – 3.6V
0 – 12MHz from 1.6V
0 – 32MHz from 2.7V
Operating Voltage
Operating frequency
2018 Microchip Technology Inc.
Data Sheet Complete
DS40002059A-page 2
ATxmega32E5/16E5/8E5
Table Of Content
1
2
3
4
5
6
7
Ordering Information ............................................................................... 8
Typical Applications ................................................................................ 9
Pinout and Block Diagram .................................................................... 10
Overview ................................................................................................. 11
Resources ............................................................................................... 12
5.1
Recommended Reading .................................................................................. 12
Capacitive Touch Sensing .................................................................... 12
CPU .......................................................................................................... 13
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
Features .......................................................................................................... 13
Overview.......................................................................................................... 13
Architectural Overview..................................................................................... 13
ALU - Arithmetic Logic Unit ............................................................................. 15
Program Flow .................................................................................................. 15
Status Register ................................................................................................ 15
Stack and Stack Pointer .................................................................................. 16
Register File .................................................................................................... 16
8
Memories ................................................................................................ 17
8.1
8.2
8.3
8.4
8.5
8.6
8.7
8.8
8.9
8.10
8.11
8.12
Features .......................................................................................................... 17
Overview.......................................................................................................... 17
Flash Program Memory ................................................................................... 17
Fuses and Lock Bits ........................................................................................ 19
Data Memory ................................................................................................... 20
EEPROM ......................................................................................................... 20
I/O Memory...................................................................................................... 20
Data Memory and Bus Arbitration ................................................................... 20
Memory Timing ................................................................................................ 20
Device ID and Revision ................................................................................... 21
I/O Memory Protection..................................................................................... 21
Flash and EEPROM Page Size....................................................................... 21
9
EDMA – Enhanced DMA Controller ...................................................... 22
9.1
9.2
Features .......................................................................................................... 22
Overview.......................................................................................................... 22
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ATxmega32E5/16E5/8E5
10 Event System .......................................................................................... 24
10.1
10.2
Features .......................................................................................................... 24
Overview.......................................................................................................... 24
11 System Clock and Clock options ......................................................... 26
11.1
11.2
11.3
Features .......................................................................................................... 26
Overview.......................................................................................................... 26
Clock Sources ................................................................................................. 27
12 Power Management and Sleep Modes ................................................. 29
12.1
12.2
12.3
Features .......................................................................................................... 29
Overview.......................................................................................................... 29
Sleep Modes.................................................................................................... 29
13 System Control and Reset .................................................................... 31
13.1
13.2
13.3
13.4
Features .......................................................................................................... 31
Overview.......................................................................................................... 31
Reset Sequence .............................................................................................. 31
Reset Sources ................................................................................................. 31
14 WDT – Watchdog Timer ......................................................................... 33
14.1
14.2
Features .......................................................................................................... 33
Overview.......................................................................................................... 33
15 Interrupts and Programmable Multilevel Interrupt Controller ........... 34
15.1
15.2
15.3
Features .......................................................................................................... 34
Overview.......................................................................................................... 34
Interrupt Vectors .............................................................................................. 34
16 I/O Ports .................................................................................................. 36
16.1
16.2
16.3
16.4
16.5
Features .......................................................................................................... 36
Overview.......................................................................................................... 36
Output Driver ................................................................................................... 37
Input Sensing................................................................................................... 39
Alternate Port Functions .................................................................................. 39
17 Timer Counter Type 4 and 5 .................................................................. 40
17.1
17.2
Features .......................................................................................................... 40
Overview.......................................................................................................... 40
18 WeX – Waveform Extension .................................................................. 42
18.1
Features .......................................................................................................... 42
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Data Sheet Complete
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ATxmega32E5/16E5/8E5
18.2
Overview.......................................................................................................... 42
19 Hi-Res – High Resolution Extension .................................................... 44
19.1
19.2
Features .......................................................................................................... 44
Overview.......................................................................................................... 44
20 Fault Extension ...................................................................................... 45
20.1
20.2
Features .......................................................................................................... 45
Overview.......................................................................................................... 45
21 RTC – 16-bit Real-Time Counter ........................................................... 46
21.1
21.2
Features .......................................................................................................... 46
Overview.......................................................................................................... 46
22 TWI – Two-Wire Interface ...................................................................... 48
22.1
22.2
Features .......................................................................................................... 48
Overview.......................................................................................................... 48
23 SPI – Serial Peripheral Interface ........................................................... 50
23.1
23.2
Features .......................................................................................................... 50
Overview.......................................................................................................... 50
24 USART ..................................................................................................... 51
24.1
24.2
Features .......................................................................................................... 51
Overview.......................................................................................................... 51
25 IRCOM – IR Communication Module .................................................... 53
25.1
25.2
Features .......................................................................................................... 53
Overview.......................................................................................................... 53
26 XCL – XMEGA Custom Logic Module .................................................. 54
26.1
26.2
Features .......................................................................................................... 54
Overview.......................................................................................................... 54
27 CRC – Cyclic Redundancy Check Generator ...................................... 56
27.1
27.2
Features .......................................................................................................... 56
Overview.......................................................................................................... 56
28 ADC – 12-bit Analog to Digital Converter ............................................ 57
28.1
28.2
Features .......................................................................................................... 57
Overview.......................................................................................................... 57
29 DAC – Digital to Analog Converter ....................................................... 59
29.1
Features .......................................................................................................... 59
2018 Microchip Technology Inc.
Data Sheet Complete
DS40002059A-page 5