HMC847LC5
v06.1215
36 Gbps, 4:1 MUX WITH DUTY CYCLE CONTROL
& PROGRAMMABLE OUTPUT VOLTAGE
Typical Applications
The HMC847LC5 is ideal for:
• SONET OC-768
• RF ATE Applications
• Broadband Test & Measurements
• Serial Data Transmission up to 36 Gbps
Features
Supports Data Rates up to 36 Gbps
Half Rate Clock Input
Quarter Rate Reference Clock Output
Fast Rise and Fall Times: 11 / 12 ps
Programmable Differential Output
Voltage Swing: 250 - 900 mVp-p
Single Supply: +3.3V
32 Lead Ceramic 5x5 mm SMT Package: 25 mm
2
MUX & DEMUX - SMT
• High Speed DAC Interfacing
Functional Diagram
General Description
The HMC847LC5 is a 4:1 multiplexer for operation at
output data rate up to 36 Gbps. The mux latches the
four differential inputs on falling edge of the input clock
CKIN (See timing diagram on page.6). The device uses
both rising and falling edges of the half-rate clock to
serialize the data. A quarter-rate clock output, which
is synchronous to the data output of HMC847LC5, is
generated on chip.
All clock and data inputs / outputs of the HMC847LC5
are CML and terminated on-chip with 50 Ohms to
the, VCC, and may be DC or AC coupled. The inputs
and outputs of the HMC847LC5 may be operated
either differentially or single-ended. The HMC847LC5
also features an output level control pin, VCTRL,
which allows for loss compensation or signal level
optimization. The VDCC pin controls the data output
cross-point & duty cycle. The HMC847LC5 operates
from a single +3.3V supply and is available in ROHS
compliant 5x5 mm SMT package.
Electrical Specifications,
T
A
= +25°C,
Vcc = +3.3V
Parameter
Power Supply Voltage
Power Supply Current
Output Amplitude Control Voltage Range (Vctrl)
Data Output Voltage Swing Range
Duty Cycle Control Voltage Range (Vdcc)
Duty Cycle Control Range
Clock Output Voltage Swing
Maximum Data Rate
Maximum Clock Rate
Half Rate Clock
Differential, peak-to-peak @ 36 Gbps
Vdcc = 1.6V for 50% duty cycle
@ 36 Gbps
Differential, peak-to-peak @ 10 GHz
Conditions
± 5% Tolerance
Vctrl = 2.5V
Min.
3.13
480
1.7
550
1
40
480
1.6
50
580
Typ.
3.3
530
2.5
Max
3.47
580
3
900
2
60
680
36
18
Units
V
mA
V
mVp-p
V
%
mVp-p
Gbps
GHz
1
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc.,
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106
Phone: 781-329-4700 • Order online at www.analog.com
Application Support: Phone: 1-800-ANALOG-D
HMC847LC5
v06.1215
36 Gbps, 4:1 MUX WITH DUTY CYCLE CONTROL
& PROGRAMMABLE OUTPUT VOLTAGE
Electrical Specifications,
(continued)
Parameter
Data Rate Range
[1]
Conditions
Min.
DC
V
CC
≥3.3V, T
A
≤25
Single-Ended, peak-to-peak
[2]
Differential, peak-to-peak
Single-Ended, peak-to-peak
[2]
Differential, peak-to-peak
Vctrl = 2.5V
Vctrl = 2.5V
Vctrl = 2.5V
Vctrl = 2.5V
Data input up to 10 GHz
Clock input up to 36 GHz
Data output up to 28 GHz
Clock output up to 36 GHz
[3]
Typ.
Max
36
40
800
1000
700
1000
3.8
3.3
Units
Gbps
Gbps
mVp-p
mVp-p
mVp-p
mVp-p
V
V
V
V
dB
dB
dB
dB
ps p-p
ps rms
ps
ps
ps
ps
ps
ps
DC
150
150
100
100
2.8
2.3
2.94
2.62
-10
-12
-10
-5
3.5
0.75
Input Amplitude (Data)
Input High Voltage (Data & Clock)
Input Low Voltage (Data & Clock)
Output High Voltage
Output Low Voltage
Input Return Loss
Output Return Loss
Deterministic Jitter, Jd
Additive Random Jitter, Jr
[4]
Rise Time, tr
[3]
Fall Time, tf
[3]
Propagation Delay Clock to Clock, Tcdp
Propagation Delay Clock to Data, Tdpd
Set Up Time, ts
Hold Time, th
20% - 80%
20% - 80%
Input clock to output clock
Input clock to output data
Falling edge of CKIN to t_sample at center
of DIN1-4 time
Falling edge of CKIN to t_sample at center
of DIN1-4 time
13
13
107
125+2.5 CLKIN
period
-80
90
[1] Low frequency operation depends on AC coupling.
[2] The un-used port is biased @ 3.3V
[3] CKINP: 18 GHz clock signal, 300 mVp-p single-ended, D1P-D4P: 9 Gbps PRBS 2
31
-1 pattern, 300 mVp-p single-ended
[4] Random jitter is measured with 36 Gbps PRBS31 pattern
DC Current vs. Supply Voltage
[1] [2]
700
650
DC CURRENT (mA)
600
550
500
450
400
350
3.13
Differential Output Swing
vs. Supply Voltage
[1][2]
850
DIFFERENTIAL VOLTAGE (mV )
800
750
700
650
600
550
500
450
3.13
3.19
3.24
3.3
3.36
CC
pp
3.19
3.24
3.3
3.36
CC
3.41
3.47
3.41
3.47
SUPPLY VOLTAGE V
+25 C
+85 C
(V)
-40 C
+25 C
SUPPLY VOLTAGE V
+85 C
(V)
-40 C
[1] Vctrl = 2.5V
[2] Data Rate = 36 Gbps
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106
Phone: 781-329-4700 • Order online at www.analog.com
Application Support: Phone: 1-800-ANALOG-D
MUX & DEMUX - SMT
2
Input Amplitude (Clock)
HMC847LC5
v06.1215
36 Gbps, 4:1 MUX WITH DUTY CYCLE CONTROL
& PROGRAMMABLE OUTPUT VOLTAGE
Differential Output Swing vs. Vctrl
[1]
850
DIFFERENTIAL VOLTAGE (mV )
pp
DC Current vs. Vctrl
[1]
540
750
650
550
450
350
250
1.7 1.8 1.9
DC CURRENT (mA)
530
520
MUX & DEMUX - SMT
510
500
1.7 1.8 1.9
2
2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9
CONTROL VOLTAGE V
CTRL
3
2
2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9
CONTROL VOLTAGE V
CTRL
3
(V)
(V)
Rise Time vs. Supply Voltage
[1][2][3][4]
18
16
RISE TIME (ps)
Fall Time vs. Supply Voltage
[1][2][3][4]
18
16
FALL TIME (ps)
14
12
10
8
6
3.13
14
12
10
8
6
3.13
3.19
3.24
3.3
3.36
CC
3.41
3.47
3.19
3.24
3.3
3.36
CC
3.41
3.47
SUPPLY VOLTAGE V
+25 C
+85 C
(V)
-40 C
+25 C
SUPPLY VOLTAGE V
+85 C
(V)
-40 C
Peak-to-Peak Jitter vs. Supply Voltage
[1][2][3][5]
8
RMS Jitter vs. Supply Voltage
[1][2][3][5]
2
1.75
RMS JITTER (ps)
6
P-P JITTER (ps)
1.5
1.25
1
0.75
0.5
0.25
4
2
0
3.13
3.19
3.24
3.3
3.36
CC
3.41
3.47
0
3.13
3.19
3.24
3.3
3.36
CC
3.41
3.47
SUPPLY VOLTAGE V
+25 C
+85 C
(V)
-40 C
+25 C
SUPPLY VOLTAGE V
+85 C
(V)
-40 C
[1] Data Rate = 36 Gbps
[2] Vctrl = 2.5V
[5] Source jitter was not deembeded
[3] Data was taken at single-ended output
[4] 20% - 80%
3
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106
Phone: 781-329-4700 • Order online at www.analog.com
Application Support: Phone: 1-800-ANALOG-D
HMC847LC5
v06.1215
36 Gbps, 4:1 MUX WITH DUTY CYCLE CONTROL
& PROGRAMMABLE OUTPUT VOLTAGE
Data Output Return Loss vs. Frequency
[1][2]
0
DATA OUTPUT RETURN LOSS (dB)
-5
-10
-15
-20
-25
-30
0
4
8
12
16
20
24
28
32
36
40
FREQUENCY (GHz)
Data Input Return Loss vs. Frequency
[1][2]
0
DATA INPUT RETURN LOSS (dB)
-5
-10
-15
-20
-25
-30
0
4
8
12
16
20
24
28
32
36
40
FREQUENCY (GHz)
Clock Input Return Loss vs. Frequency
[1][2]
0
CLOCK INPUT RETURN LOSS (dB)
-5
-10
-15
-20
-25
-30
0
4
8
12
16
20
24
28
32
36
40
FREQUENCY (GHz)
Clock Output Return Loss vs. Frequency
[1][2]
0
CLOCK INPUT RETURN LOSS (dB)
-5
-10
-15
-20
-25
-30
0
4
8
12
16
20
24
28
32
36
40
FREQUENCY (GHz)
40 Gbps Single-Ended Output Eye Diagram
Measurement Results
Eye Amp (mVpp)
HSP
HSN
308
328
P-P Jitter (ps)
4.8
3.07
RMS Jitter (ps)
1.1
0.74
Rise Time (ps)
11.6
12.4
Fall Time (ps)
14.4
13.9
Time Scale: 10 ps/div ; Amplitude Scale: 100 mV/div
Test Conditions: VCC = +3.3V, VCTRL = 2.5V; D1P-D4P: 10 Gbps NRZ PRBS 2
31
-1 pattern, 300 mVp-p single-ended
CKINP: 20 GHz Clock Signal, 300 mVp-p single-ended
[1] Vctrl = 2.6V
[2] Device measured on evaluation board with single ended time domain gating
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106
Phone: 781-329-4700 • Order online at www.analog.com
Application Support: Phone: 1-800-ANALOG-D
MUX & DEMUX - SMT
4
HMC847LC5
v06.1215
36 Gbps, 4:1 MUX WITH DUTY CYCLE CONTROL
& PROGRAMMABLE OUTPUT VOLTAGE
36Gbps Single-Ended Output Eye Diagram
MUX & DEMUX - SMT
Measurement Results
Eye Amp (mVpp)
HSP
HSN
320
338
P-P Jitter (ps)
4.27
3.33
RMS Jitter (ps)
1.03
0.65
Rise Time (ps)
12.7
12.7
Fall Time (ps)
13.5
12.7
Time Scale: 10 ps/div ; Amplitude Scale: 100 mV/div
Test Conditions: VCC = +3.3V, VCTRL = 2.5V; D1P-D4P: 9 Gbps NRZ PRBS 2
31
-1 pattern, 300 mVp-p single-ended
CKINP: 18 GHz Clock Signal, 300 mVp-p single-ended
20 Gbps Single-Ended Output Eye Diagram
Measurement Results
Eye Amp (mVpp)
HSP
HSN
336
352
P-P Jitter (ps)
2.93
2.13
RMS Jitter (ps)
0.91
0.73
Rise Time (ps)
14.2
13
Fall Time (ps)
15.8
14.4
Time Scale: 20 ps/div ; Amplitude Scale: 100 mV/div
Test Conditions: VCC = +3.3V, VCTRL = 2.5V; D1P-D4P: 5 Gbps NRZ PRBS 2
31
-1 pattern, 300 mVp-p single-ended
CKINP: 10 GHz Clock Signal, 300 mVp-p single-ended
5
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106
Phone: 781-329-4700 • Order online at www.analog.com
Application Support: Phone: 1-800-ANALOG-D
