2N7002DW
60V N-Channel Enhancement Mode MOSFET
FEATURES
• R
DS(ON)
, V
GS
@10V,I
DS
@500mA=5Ω
0.087(2.20)
0.074(1.90)
SOT-363
Unit
：
inch(mm)
• Advanced Trench Process Technology
• High Density Cell Design For Ultra Low On-Resistance
Drivers : Relays, Displays, Lamps, Solenoids, Memories, etc.
•
0.054(1.35)
0.045(1.15)
0.030(0.75)
0.021(0.55)
0.010(0.25)
MECHANICALDATA
• Case: SOT-363 Package
• Terminals : Solderable per MIL-STD-750,Method 2026
• Apporx. Weight: 0.0002 ounces , 0.006grams
• Marking : 702
0.056(1.40)
0.047(1.20)
0.010(0.25)
0.003(0.08)
0. 040(1.00)
0. 031(0.80)
0.012(0.30)
0.005(0.15)
Maximum RATINGS and Thermal Characteristics (T
A
=25
O
C unless otherwise noted )
PA RA M E TE R
D r a i n- S o ur c e Vo l t a g e
G a t e - S o ur c e Vo l t a g e
C o nt i nuo us D r a i n C ur r e nt
P ul s e d D r a i n C ur r e nt
1)
S ym b o l
V
DS
V
GS
I
D
I
D M
P
D
T
J
, T
S TG
R
θ
J A
Li mi t
60
+20
11 5
800
200
120
-5 5 to + 1 5 0
625
0.044(1.10)
MAX.
U ni t s
V
V
mA
mA
mW
O
T
A
= 2 5
O
C
T
A
= 7 5
O
C
O p e r a t i n g J u n c t i o n a n d S t o r a g e Te m p e r a t u r e
R a ng e
M a xi m um P o w e r D i s s i p a t i o n
Junction-to Ambient Thermal Resistance(PCB mounted)
2
C
O
C /W
Note: 1. Maximum DC current limited by the package
2. Surface mounted on FR4 board, t < 10 sec
PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE
REV.0.0-AUG.4.2008
0.087(2.20)
0.078(2.00)
• Specially Designed for Battery Operated Systems, Solid-State Relays
0.018(0.45)
0.006(0.15)
• R
DS(ON)
, V
GS
@4.5V,I
DS
@75mA=7.5Ω
PAGE . 1
2N7002DW
ELECTRICALCHARACTERISTICS
P a ra me te r
S ta ti c
D r a i n- S o ur c e B r e a k d o w n
Vo lta g e
G a t e Thr e s ho l d Vo l t a g e
D r a i n- S o ur c e O n- S t a t e
R e s i s t a nc e
D r a i n- S o ur c e O n- S t a t e
R e s i s t a nc e
Ze r o Ga te Vo lta g e D r a i n
C ur r e nt
Gate Body Leakage
Forward Transconductance
Dynamic
To t a l G a t e C h a r g e
G a t e - S o ur c e C ha r g e
G a t e - D r a i n C ha r g e
Tu r n - O n D e l a y Ti m e
Tu r n - O f f D e l a y Ti m e
In p u t C a p a c i t a n c e
O ut p ut C a p a c i t a nc e
R e v e r s e Tr a n s f e r
C a p a c i t a nc e
S o ur c e - D r a i n D i o d e
M a x. D i o d e F o r w a r d
C ur r e nt
D i o d e F o rwa rd Vo lta g e
S ym b o l
Te s t C o n d i t i o n
M i n.
Ty p .
M a x.
U ni t s
B V
DSS
V
G S ( t h)
R
D S ( o n)
R
D S ( o n)
I
D S S
I
G S S
g
fS
V
G S
= 0 V , I
D
= 1 0 u A
V
D S
= V
G S
, I
D
= 2 5 0 u A
V
GS
=4.5V, I
D
=75mA
V
GS
=10V, I
D
=500mA
V
DS
=60V, V
GS
=0V
V
G S
=+ 2 0 V , V
D S
= 0 V
V
D S
= 1 5 V , I
D
= 2 5 0 m A
60
1
-
-
-
-
200
-
-
-
-
-
-
-
-
2 .5
7 .5
5
1
+100
-
V
V
Ω
uA
nA
mS
Q
g
Q
gs
Q
gd
t
on
t
o ff
C
iss
C
oss
C
rss
V
D S
= 2 5 V , V
GS
= 0 V
f=1 .0 MH
Z
V
DD
=10V , R
L
=20
Ω
I
D
=500mA , V
GEN
=10V
R
G
=10
Ω
V
D S
= 1 5 V , I
D
= 5 0 0 m A
V
GS
=5V
-
-
-
-
-
-
-
-
0 .6
0 .1
0 .0 8
9
21
-
-
-
0 .7
-
-
15
26
50
25
5
pF
ns
nC
I
s
V
SD
-
I
S
= 2 5 0 m A , V
G S
= 0 V
V
DD
R
L
V
OUT
-
-
-
0 .9 3
250
1 .2
V
DD
R
L
mA
V
Switching
Test Circuit
V
IN
Gate Charge
Test Circuit
V
GS
R
G
1mA
R
G
REV.0.0-AUG.4.2008
PAGE . 2
2N7002DW
Typical Characteristics Curves (T
A
=25 C,unless otherwise noted)
O
I
D
- Drain Source Current (A)
1.2
I
D
- Drain-to-Source Current (A)
V
GS
= 10V ~ 6.0V
1
5.0V
4.0V
1.2
1
0.8
0.6
0.4
0.2
0
0
V
DS
=10V
0.8
0.6
0.4
0.2
0
0
1
2
3
3.0V
T
J
=25
O
C
4
5
1
2
3
4
5
6
V
DS
- Drain-to-Source Voltage (V)
V
GS
- Gate-to-Source Voltage (V)
Fig. 1-TYPICAL FORWARD CHARACTERISTIC
FIG.1- Output Characteristic
FIG.2- Transfer Characteristic
10
5
I
D
=500mA
R
DS(ON)
- On-Resistance (
W
)
R
DS(ON)
- On-Resistance (
W
)
4
3
2
8
6
4
2
0
V
GS
=4.5V
V
GS
=10V
T
J
=125
O
C
1
0
T
J
=25
O
C
2
3
4
5
6
7
8
9
10
0
0.2
0.4
0.6
0.8
1
1.2
I
D
- Drain Current (A)
V
GS
- Gate-to-Source Voltage (V)
FIG.3- On Resistance vs Drain Current
2
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
-50
-25
0
25
50
75
100
125
150
FIG.4- On Resistance vs Gate to Source Voltage
R
DS(ON)
- On-Resistance(Normalized)
V
GS
=10V
I
D
=500mA
T
J
- Junction Temperature (
o
C)
FIG.5- On Resistance vs Junction Temperature
REV.0.0-AUG.4.2008
PAGE . 3
2N7002DW
10
8
6
4
2
0
0
0.2
0.4
0.6
0.8
1
Qg
Vgs(th)
Qg(th)
Qgs
Qsw
Qgd
Qg
V
GS
- Gate-to-Source Voltage (V)
Vgs
V
DS
=15V
I
D
=500mA
Q
g
- Gate Charge (nC)
Fig.6 - Gate Charge Waveform
V
th
- G-S Threshold Voltage (NORMALIZED)
Fig.7 - Gate Charge
73
72
71
70
69
68
67
66
65
64
-50
-25
0
25
50
75
100
125
150
BV
DSS
- Breakdown Voltage (V)
1.2
1.1
1
0.9
0.8
0.7
0.6
-50
I
D
=250uA
I
D
=250uA
-25
0
25
50
75
100 125
150
T
J
- Junction Temperature (
o
C)
T
J
- Junction Temperature (
o
C)
Fig.8 - Threshold Voltage vs Temperature
10
I
S
- Source Current (A)
Fig.9 - Breakdown Voltage vs Junction Temperature
V
GS
=0V
1
T
J
=25
O
C
T
J
=125
O
C
T
J
=-55
O
C
0.1
0.01
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
V
SD
- Source-to-Drain Voltage (V)
Fig.10 - Source-Drain Diode Forward Voltage
REV.0.0-AUG.4.2008
PAGE . 4
2N7002DW
MOUNTING PAD LAYOUT
SOT-363
Unit
：
inch(mm)
0.018
(0.45)
0.020
(0.50)
0.026
(0.65)
0.026
(0.65)
ORDER INFORMATION
• Packing information
T/R - 10K per 13" plastic Reel
T/R - 3K per 7” plastic Reel
LEGAL STATEMENT
Copyright PanJit International, Inc 2012
The information presented in this document is believed to be accurate and reliable. The specifications and information herein
are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its
products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit
does not convey any license under its patent rights or rights of others.
REV.0.0-AUG.4.2008
0.075
(1.90)
PAGE . 5
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