2N7002KFN3
60V N-Channel Enhancement Mode MOSFET - ESD Protected
FEATURES
• R
DS(ON)
, V
GS
@10V,I
DS
@500mA=3Ω
0.026(0.65)
0.021(0.55)
DFN 3L
0.042(1.05)
0.037(0.95)
Unit : inch(mm)
• R
DS(ON)
, V
GS
@4.5V,I
DS
@200mA=4Ω
• Advanced Trench Process Technology
• High Density Cell Design For Ultra Low On-Resistance
• Specially Designed for Battery Operated Systems, Solid-State Relays
Drivers : Relays, Displays, Lamps, Solenoids, Memories, etc.
• ESD Protected 2KV HBM
• In compliance with EU RoHS 2002/95/EC directives
• Very Low Leakage Current In Off Condition
0.0 22 (0.55)
0.047(0.45)
0.002(0.05) MAX.
0.013(0.32)
0.008(0.22)
0.022(0.55)
0.047(0.45)
0.014(0.36)
0.013(0.32)
0.008(0.22)
0.0 14 (0.20)
MECHANICALDATA
• Case: DFN 3L Package
• Terminals : Solderable per MIL-STD-750,Method 2026
• Marking : AU
0.0 08 (0.20)
0.004(0.10)
0.0 08 (0.20)
2
3
1
Maximum RATINGS and Thermal Characteristics (T
A
=25
O
C unless otherwise noted )
PA RA M E TE R
D ra i n-S o urc e Vo lta g e
G a te -S o ur c e Vo lta g e
C o nti nuo us D ra i n C urr e nt
P uls e d D r a i n C urr e nt
1)
S ym b o l
V
DS
V
GS
I
D
I
D M
T
A
=2 5
O
C
T
A
=7 5
O
C
P
D
T
J
,T
S TG
R
θ
JA
Li mi t
60
+2 0
11 5
800
200
150
-5 5 to + 1 5 0
883
0.004(0.10)
Uni ts
V
V
mA
mA
mW
O
M a xi m um P o we r D i s s i p a ti o n
O p e r a ti ng J unc ti o n a nd S to r a g e Te m p e ra tur e
Ra ng e
Junction-to Ambient Thermal Resistance(PCB mounted)
2
C
O
C /W
Note: 1. Maximum DC current limited by the package
2. Surface mounted on FR4 board, t < 5 sec
PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE
September 03.2010-REV.00
PAGE . 1
2N7002KFN3
ELECTRICALCHARACTERISTICS
P a ra m e te r
S ta ti c
D ra i n-S o urc e B re a k d o wn
Vo lta g e
G a te Thre s ho ld Vo lta g e
D ra i n-S o urc e On-S ta te
Re s i s ta nc e
D ra i n-S o urc e On-S ta te
Re s i s ta nc e
Ze r o Ga te Vo lta g e D ra i n
C ur re nt
Gate Body Leakage
Forward Transconductance
Dynamic
To ta l Ga te C ha r g e
Tur n- On D e la y Ti m e
Tur n- Off D e la y Ti m e
Inp ut C a p a c i ta nc e
O utp ut C a p a c i ta nc e
Re ve r s e Tra ns fe r
C a p a c i ta nc e
S o urc e - D r a i n D i o d e
D i o d e F o rwa r d Vo lta g e
C o nti nuo us D i o d e F o r wa rd
C ur re nt
P uls e d D i o d e F o r wa rd
C ur re nt
V
SD
I
s
I
s M
I
S
=2 0 0 m A , V
GS
=0 V
-
-
-
-
-
0 .8 2
-
-
1 .3
11 5
800
V
mA
mA
Q
g
t
on
t
o ff
C
iss
C
oss
C
rss
V
D S
= 2 5 V, V
GS
=0 V
f=1 .0 M H
Z
V
D S
= 1 5 V, I
D
= 2 0 0 m A
V
GS
=4.5V
V
DD
=30V , R
L
=150Ω
I
D
=200mA , V
GEN
=10V
R
G
=10Ω
-
-
-
-
-
-
-
-
-
-
-
-
0 .8
20
ns
40
35
10
5
pF
nC
B V
DSS
V
GS ( th)
R
D S ( o n)
R
D S ( o n)
I
D S S
I
GS S
g
fS
V
GS
=0 V, I
D
=1 0
μ
A
V
D S
=V
GS
, I
D
=2 5 0
μ
A
V
GS
=4.5V, I
D
=200mA
V
GS
=10V, I
D
=500mA
V
DS
=60V, V
GS
=0V
V
GS
=+2 0 V, V
D S
=0 V
V
D S
= 1 5 V, I
D
= 2 5 0 m A
60
1
-
-
-
-
100
-
-
-
-
-
-
-
-
2 .5
4 .0
Ω
3.0
1
+1 0
-
μ
A
μ
A
mS
V
V
S ym b o l
Te s t C o nd i ti o n
M i n.
Typ .
M a x.
Uni ts
Switching
Test Circuit
V
IN
V
DD
R
L
V
OUT
Gate Charge
Test Circuit
V
GS
V
DD
R
L
R
G
1mA
R
G
September 03.2010-REV.00
PAGE . 2
2N7002KFN3
Typical Characteristics Curves (T
A
=25 C,unless otherwise noted)
O
I
D
- Drain-to-Source Current (A)
V
GS
= 6.0~10V
1
5.0V
5.0V
I
D
- Drain Source Current (A)
1.2
1.2
1
0.8
0.6
0.4
0.2
0
0
V
DS
=10V
0.8
0.6
0.4
4.0V
4.0V
3.0V
3.0V
0
0
1
2
3
4
5
T
J
=25
℃
0.2
1
2
3
4
5
6
V
DS
- Drain-to-Source Voltage (V)
V
GS
- Gate-to-Source Voltage (V)
Fig. 1-TYPICAL FORWARD CHARACTERISTIC
FIG.1- Output Characteristic
FIG.2- Transfer Characteristic
5
5
R
DS(ON)
- On-Resistance (
W
)
R
DS(ON)
- On-Resistance (
W
)
4
3
V
GS
= 4.5V
2
1
0
4
3
I
D
=500m A
I
I
D
=200mA
D
=200m A
2
1
V
GS
=10V
0
0
0.2
0.4
0.6
0.8
1
2
3
4
5
6
7
8
9
10
I
D
- Drain Current (A)
V
GS
- Gate-to-Source Voltage (V)
FIG.3- On Resistance vs Drain Current
FIG.4- On Resistance vs Gate to Source Voltage
R
DS(ON)
- On-Resistance(Normalized)
1.8
V
GS
=10V
1.6
1.4
1.2
1
0.8
0.6
-50
I
D
=500mA
-25
0
25
50
75
100
o
125
150
T
J
- Junction Temperature ( C)
FIG.5- On Resistance vs Junction Temperature
September 03.2010-REV.00
PAGE . 3
2N7002KFN3
10
Vgs
Qg
V
GS
- Gate-to-Source Voltage (V)
8
6
4
2
0
V
DS
=10V
I
D
=250mA
Vgs(th)
Qg(th)
Qgs
Qsw
0
0.2
0.4
0.6
0.8
1
Qgd
Qg
Q
g
- Gate Charge (nC)
Fig.6 - Gate Charge Waveform
V
th
- G-S Threshold Voltage (NORMALIZED)
Fig.7 - Gate Charge
I
D
=250mA
1.1
1
0.9
0.8
0.7
-50
BV
DSS
- Breakdown Voltage (V)
1.2
88
86
84
82
80
78
76
74
72
-50
ID = 250uA
-25
0
25
50
75
100
125
150
-25
0
25
50
75
100
125
150
T
J
- Junction Temperature (
o
C)
T
J
- Junction Temperature (
o
C)
Fig.8 - Threshold Voltage vs Temperature
Fig.9 - Breakdown Voltage vs Junction Temperature
10
V
GS
=0V
I
S
- Source Current (A)
1
0.1
T
J
=125
℃
25
℃
-55
℃
0.01
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
V
SD
- Source-to-Drain Voltage (V)
Fig.10 - Source-Drain Diode Forward Voltage
September 03.2010-REV.00
PAGE . 4
2N7002KFN3
MOUNTING PAD LAYOUT
DFN 3L
0.043
(1.10)
0.017
(0.42)
0.010
(0.26)
0.02 8
(0.70)
0.004
(0.10)
0.02 7
(0.68)
ORDER INFORMATION
• Packing information
T/R - 8K per 7" plastic Reel
LEGAL STATEMENT
Copyright PanJit International, Inc 2010
The information presented in this document is believed to be accurate and reliable. The specifications and information herein
are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its
products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit
does not convey any license under its patent rights or rights of others.
September 03.2010-REV.00
0.010
(0.25)
0.024
(0.60)
PAGE . 5
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