2SK2719
TOSHIBA Field Effect Transistor
Silicon N Channel MOS Type (π-MOSIII)
2SK2719
Chopper Regulator, DC-DC Converter and Motor Drive
Applications
•
•
•
•
Low drain-source ON resistance: R
DS (ON)
= 3.7
Ω
(typ.)
High forward transfer admittance: |Y
fs
| = 2.6 S (typ.)
Low leakage current: I
DSS
= 100
μA
(max) (V
DS
= 720 V)
Enhancement mode: V
th
= 2.0~4.0 V (V
DS
= 10 V, I
D
= 1 mA)
Unit: mm
Absolute Maximum Ratings
(Ta
=
25°C)
Characteristics
Drain-source voltage
Drain-gate voltage (R
GS
=
20 kΩ)
Gate-source voltage
DC
Drain current
(Note 1)
Pulse
(Note 1)
Symbol
V
DSS
V
DGR
V
GSS
I
D
I
DP
P
D
E
AS
I
AR
(Note 3)
Channel temperature
Storage temperature range
E
AR
T
ch
T
stg
Rating
900
900
±30
3
A
9
125
295
3
12.5
150
−55~150
W
mJ
A
mJ
°C
°C
Unit
V
V
V
1. Gate
2. Drain (heat sink)
3. Source
JEDEC
JEITA
TOSHIBA
―
SC-65
2-16C1B
Drain power dissipation (Tc
=
25°C)
Single pulse avalanche energy
(Note 2)
Avalanche current
Repetitive avalanche energy
Weight: 4.6 g (typ.)
Note:
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in
temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e.
operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate
reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and
Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc).
Thermal Characteristics
Characteristics
Thermal resistance, channel to case
Thermal resistance, channel to ambient
Symbol
R
th (ch-c)
R
th (ch-a)
Max
1.0
50.0
Unit
°C/W
°C/W
Note 1: Ensure that the channel temperature does not exceed 150°C.
Note 2: V
DD
=
25 V, T
ch
=
25°C (initial), L
=
58
μH,
R
G
=
25
Ω,
I
AR
=
45 A
Note 3: Repetitive rating: pulse width limited by maximum junction temperature
This transistor is an electrostatic-sensitive device. Please handle with caution.
1
2006-11-10
2SK2719
Electrical Characteristics
(Ta
=
25°C)
Characteristics
Gate leakage current
Gate-source breakdown voltage
Drain cut-off current
Drain-source breakdown voltage
Gate threshold voltage
Drain-source ON resistance
Forward transfer admittance
Input capacitance
Reverse transfer capacitance
Output capacitance
Rise time
Symbol
I
GSS
V
(BR) GSS
I
DSS
V
(BR) DSS
V
th
R
DS (ON)
⎪Y
fs
⎪
C
iss
C
rss
C
oss
t
r
10 V
V
GS
0V
4.7
Ω
V
DS
=
25 V, V
GS
=
0 V, f
=
1 MHz
Test Condition
V
GS
= ±30
V, V
DS
=
0 V
I
G
= ±10 μA,
V
DS
=
0 V
V
DS
=
720 V, V
GS
=
0 V
I
D
=
10 mA, V
GS
=
0 V
V
DS
=
10 V, I
D
=
1 mA
V
GS
=
10 V, I
D
=
1.5 A
V
DS
=
20 V, I
D
=
1.5 A
Min
⎯
±30
⎯
900
2.0
⎯
0.65
⎯
⎯
⎯
⎯
V
OUT
⎯
55
⎯
ns
⎯
30
⎯
Typ.
⎯
⎯
⎯
⎯
⎯
3.7
2.6
750
10
70
15
Max
±10
⎯
100
⎯
4.0
4.3
⎯
⎯
⎯
⎯
⎯
Unit
μA
V
μA
V
V
Ω
S
pF
pF
pF
I
D
=
1.5 A
R
L
=
133
Ω
Turn-on time
Switching time
Fall time
t
on
t
f
V
DD
∼
200 V
−
Duty
<
1%, t
w
=
10
μs
=
Turn-off time
Total gate charge
(gate-source plus gate-drain)
Gate-source charge
Gate-drain (“miller”) charge
t
off
⎯
110
⎯
Q
g
Q
gs
Q
gd
V
DD
∼
400 V, V
GS
=
10 V, I
D
=
3 A
−
⎯
⎯
⎯
25
13
12
⎯
⎯
⎯
nC
nC
nC
Source-Drain Diode Ratings and Characteristics
(Ta
=
25°C)
Characteristics
Continuous drain reverse current
(Note 1)
Pulse drain reverse current
(Note 1)
Diode forward voltage
Reverse recovery time
Reverse recovery charge
Symbol
I
DR
Test Condition
⎯
Min
⎯
Typ.
⎯
Max
3
Unit
A
I
DRP
V
DSF
t
rr
Q
rr
⎯
I
DR
=
3 A, V
GS
=
0 V
I
DR
=
3 A, V
GS
=
0 V
dI
DR
/dt
=
100 A/μs
⎯
⎯
⎯
⎯
⎯
⎯
1100
7.5
9
−1.9
⎯
⎯
A
V
ns
μC
Marking
TOSHIBA
K2719
Part No. (or abbreviation code)
Lot No.
A line indicates
lead (Pb)-free package or
lead (Pb)-free finish.
2
2006-11-10
2SK2719
I
D
– V
DS
5
Common source
Tc
=
25°C
Pulse test
5
8
10
6
5.25
4
5.5
10
I
D
– V
DS
8
6
5.75
3
5.5
2
5.25
5
1
VGS
=
4 V
VGS
=
4.5 V
0
0
Common source
Tc
=
25°C
Pulse test
4
Drain current I
D
(A)
3
5
2
4.75
4.5
1
0
0
4
8
12
16
20
Drain current I
D
(A)
10
20
30
40
50
Drain-source voltage
V
DS
(V)
Drain-source voltage
V
DS
(V)
I
D
– V
GS
6
Common source
VDS
=
20 V
Pulse test
25
V
DS
– V
GS
Common source
Tc
=
25°C
Pulse test
V
DS
(V)
Drain-source voltage
5
Tc
= −55°C
25
20
Drain current I
D
(A)
4
15
3
ID
=
3 A
100
10
1.5
5
0.8
2
1
0
0
2
4
6
8
10
12
0
0
4
8
12
16
20
Gate-source voltage
V
GS
(V)
Gate-source voltage
V
GS
(V)
⎪Y
fs
⎪
– I
D
(S)
10
5
3
100
0.1
0.5
0.3
Common source
VDS
=
20 V
Pulse test
0.1
0.1
0.3
1
3
10
30
Tc
= −55°C
25
30
Common source
Tc
=
25°C
VGS
=
10 V
Pulse test
R
DS (ON)
– I
D
Drain-source ON resistance
R
DS (ON)
(Ω)
Forward transfer admittance
⎪Y
fs
⎪
10
5
3
1
0.5
0.1
0.3
1
3
10
30
Drain current I
D
(A)
Drain current I
D
(A)
3
2006-11-10
2SK2719
R
DS (ON)
– Tc
(Ω)
20
Common source
VGS
=
10 V
Pulse test
10
5
Common source
Tc
=
25°C
Pulse test
I
DR
– V
DS
Drain-source ON resistance R
DS (ON)
(A)
Drain reverse current I
DR
ID
=
3 A
1.5
0.8
16
3
1
0.5
0.3
10
0.1
0.05
0.03
5
1
VGS
=
0,
−1
V
3
12
8
4
0
−80
−40
0
40
80
120
160
0.01
0
−0.2
−0.4
−0.6
−0.8
−1.0
−1.2
Case temperature Tc (°C)
Drain-source voltage
V
DS
(V)
Capacitance – V
DS
2000
1000
500
300
Ciss
5
V
th
– Tc
Common source
VDS
=
10 V
ID
=
1 mA
Pulse test
V
th
(V)
Gate threshold voltage
100
4
(pF)
Capacitance C
3
100
Coss
50
30
Common source
VGS
=
0 V
f
=
1 MHz
Tc
=
25°C
Pulse test
0.3
1
3
10
30
2
10
5
0.1
Crss
1
0
−80
−40
0
40
80
120
160
Drain-source voltage
V
DS
(V)
Case temperature Tc (°C)
P
D
– Tc
150
500
Dynamic Input/Output Characteristics
Common source
Tc
=
25°C
ID
=
3 A
Pulse test
VDS
300
200
200
400
8
VDD
=
100 V
12
20
Drain power dissipation P
D
(W)
V
DS
(V)
400
16
100
Drain-source voltage
50
100
VGS
4
0
0
40
80
120
160
0
0
8
16
24
32
0
40
Case temperature Tc (°C)
Total gate charge Q
g
(nC)
4
2006-11-10
Gate-source voltage
V
GS
(V)
2SK2719
r
th
– t
w
3
Normalized transient thermal impedance
r
th (t)
/R
th (ch-c)
1
0.5
0.3
Duty
=
0.5
0.2
0.1
0.1
0.05
0.03
0.01
0.01
0.005
0.003
10
μ
100
μ
1m
10 m
100 m
0.05
0.02
Single pulse
PDM
t
T
Duty
=
t/T
Rth (ch-c)
=
1.0°C/W
1
10
Pulse width
t
w
(s)
Safe Operating Area
30
ID max (pulsed)*
500
E
AS
– T
ch
Avalanche energy E
AS
(mJ)
10
100
μs*
400
3
ID max (continuous)
1 ms*
Drain current I
D
(A)
300
1
0.5
0.3
DC operation
Tc
=
25°C
200
100
0.1
0.05
0.03
*:
Single nonrepetitive pulse
Tc
=
25°C
Curves must be derated linearly
with increase in temperature.
3
10
30
100
0
25
50
75
100
125
150
Channel temperature (initial) T
ch
(°C)
VDSS max
300
1000
0.01
1
Drain-source voltage
V
DS
(V)
15 V
−15
V
B
VDSS
I
AR
V
DD
V
DS
Test circuit
R
G
=
25
Ω
V
DD
=
90 V, L
=
60 mH
Wave form
⎞
1
2
⎛
B
VDSS
⎟
Ε
AS
=
·L·I ·
⎜
⎟
⎜
B
2
VDSS
−
V
DD
⎠
⎝
5
2006-11-10
FPGA/CPLD
