4N51, 4N52, 4N53, 4N54
Glass/Ceramic Numeric and Hexadecimal Displays
for Industrial Applications
Data Sheet
Description
These standard red solid state displays have a 7.4
mm (0.29 inch) dot matrix character and an on-
board IC with data memory latch/decoder and LED
drivers in a glass/ceramic package. These devices
utilize a solder glass frit seal.
The 4N51 numeric display decodes positive 8421
BCD logic inputs into characters 0-9, a “–” sign, a
test pattern, and four blanks in the invalid BCD
states. The unit employs a right-hand decimal point.
Features
• Three character options
Numeric, hexadecimal, over range
• 4 x 7 dot matrix character
• Performance guaranteed over temperature
• High temperature stabilized
• Solder dipped leads
• Memory latch/decoder/driver
TTL compatible
• Categorized for luminous intensity
Package Dimensions*
4N51
4N52
4N54
4N54
(5082)
(739X)
*JEDEC Registered Data.
The 4N52 is the same as the
4N51 except that the decimal
point is located on the left side of
the digit.
The 4N54 hexadecimal display
decodes positive 8421 logic
inputs into 16 states, 0-9 and A-F.
In place of the decimal point an
input is provided for blanking the
display (all LEDs off), without
losing the contents of the memory.
The 4N53 is a “± 1.” overrange
display, including a right-hand
decimal point.
Absolute Maximum Ratings*
Description
Storage Temperature, Ambient
Operating Temperature, Ambient
[1,2]
Supply Voltage
[3]
Voltage Applied to Input Logic, dp and Enable Pins
Voltage Applied to Blanking Input
[7]
Maximum Solder Temperature at 1.59 mm (0.062 inch)
Below Seating Plane; t
≤
5 Seconds
Symbol
T
S
T
A
V
CC
V
I
, V
DP
, V
E
V
B
Min.
-65
-55
-0.5
-0.5
-0.5
Max.
+125
+100
+7.0
V
CC
V
CC
260
Unit
°C
°C
V
V
V
°C
Recommended Operating Conditions*
Description
Supply Voltage
Operating Temperature, Ambient
[1,2]
Enable Pulse Width
Time Data Must Be Held Before Positive
Transition of Enable Line
Time Data Must Be Held After Positive
Transition of Enable Line
Enable Pulse Rise Time
*JEDEC Registered Data.
Symbol
V
CC
T
A
t
W
t
SETUP
t
HOLD
t
TLH
Min.
4.5
–55
100
50
50
Nom.
5.0
Max.
5.5
+100
Unit
V
°C
nsec
nsec
nsec
200
nsec
2
Electrical/Optical Characteristics*
T
A
= –55°C to +100°C, unless otherwise specified
Description
Supply Current
Power Dissipation
Luminous Intensity per LED
(Digit Average)
[5,6]
Logic Low-Level Input Voltage
Logic High-Level Input Voltage
Enable Low-Voltage;
Data Being Entered
Enable High-Voltage;
Data Not Being Entered
Blanking Low-Voltage;
Display Not Blanked
[7]
Blanking High-Voltage;
Display Blanked
[7]
Blanking Low-Level Input
Current
[7]
Blanking High-Level Input
Current
[7]
Logic Low-Level Input Current
Logic High-Level Input Current
Enable Low-Level Input Current
Enable High-Level Input
Current
Peak Wavelength
Dominant Wavelength
[8]
Weight**
Leak Rate
Symbol
I
CC
P
T
I
v
V
IL
V
IH
V
EL
V
EH
V
BL
V
BH
I
BL
I
BH
I
IL
I
IH
I
EL
I
EH
λ
PEAK
λ
d
V
CC
= 5.5 V, V
BL
= 0.8 V
V
CC
= 5.5 V, V
BH
= 4.5 V
V
CC
= 5.5 V, V
IL
= 0.4 V
V
CC
= 5.5 V, V
IH
= 2.4 V
V
CC
= 5.5 V, V
EL
= 0.4 V
V
CC
= 5.5 V, V
EH
= 2.4 V
T
A
= 25°C
T
A
= 25°C
655
640
1.0
5 x 10
-8
3.5
50
1.0
-1.6
+100
-1.6
+130
Test Conditions
V
CC
= 5.5 V
(Characters “5.” or “B”)
V
CC
= 5.0 V, T
A
= 25°C
V
CC
= 4.5 V
2.0
0.8
2.0
0.8
Min.
Typ.
[4]
112
560
85
Max.
170
935
Unit
mA
mW
µcd
V
V
V
V
V
V
µA
mA
mA
µA
mA
µA
nm
nm
gm
cc/sec
40
0.8
Notes:
1. Nominal thermal resistance of a display mounted in a socket which is soldered into a printed circuit board:
Θ
JA
= 50°C/W;
Θ
JC
= 15°C/W.
2.
Θ
CA
of a mounted display should not exceed 35°C/W for operation up to T
A
= +100°C.
3. Voltage values are with respect to device ground, pin 6.
4. All typical values at V
CC
= 5.0 Volts, T
A
= 25°C.
5. These displays are categorized for luminous intensity with the intensity category designated by a letter located on the back of the
display contiguous with the Hewlett-Packard logo marking.
6. The luminous intensity at a specific ambient temperature, I
v
(T
A
), may be calculated from this relationship:
I
v
(T
A
) = I
v(25°C)
(0.985)
(TA-25°C)
.
7. Applies only to 4N54.
8. The dominant wavelength,
λ
d
, is derived from the CIE chromaticity diagram and represents the single wavelength which defines the
color of the device.
*JEDEC Registered Data.
**Non-Registered Data.
3
Figure 1. Timing Diagram of 4N51-
4N54 Series Logic.
Figure 2. Block Diagram of 4N51-
4N54 Series Logic.
Figure 3. Typical Blanking Control
Current vs. Voltage for 4N54.
Figure 4. Typical Blanking Control
Input Current vs. Ambient
Temperature for 4N54.
Figure 5. Typical Latch Enable Input
Current vs. Voltage.
4
Figure 6. Typical Logic and Decimal
Point Input Current vs. Voltage.
Figure 7. Typical Logic and Enable
Low Input Current vs. Ambient
Temperature.
Figure 8. Typical Logic and Enable
High Input Current vs. Ambient
Temperature.
Operational
Considerations
Electrical
The 4N51-4N54 series devices
use a modified 4 x 7 dot matrix of
light emitting diodes (LEDs) to
display decimal/hexadecimal
numeric information. The LEDs
are driven by constant current
drivers. BCD information is
accepted by the display memory
when the enable line is at logic
low and the data is latched when
the enable is at logic high. To
avoid the latching of erroneous
information, the enable pulse rise
time should not exceed 200 nano-
seconds. Using the enable pulse
width and data setup and hold
times listed in the Recommended
Operating Conditions allows data
to be clocked into an array of
displays at a 6.7 MHz rate.
The blanking control input on the
4N54 display blanks (turns off)
the displayed hexadecimal
information without disturbing
the contents of display memory.
The display is blanked at a
minimum threshold level of 3.5
volts. This may be easily achieved
by using an open collector TTL
gate and a pull-up resistor. For
example, (1/6) 7416 hexinverter
buffer/driver and a 120 ohm pull-
up resistor will provide sufficient
drive to blank eight displays. The
size of the blanking pull-up
resistor may be calculated from
the following formula, where N is
the number of digits:
R
blank
= (V
CC
- 3.5 V)/[N (1.0 mA)]
The decimal point input is active
low true and this data is latched
into the display memory in the
same fashion as the BCD data.
The decimal point LED is driven
by the on-board IC.
The ESD susceptibility of the IC
devices is Class A of MIL-STD-
883 or Class 2 of DOD-STD-1686
and DOD-HDBK-263.
Mechanical
4N51-4N54 series displays are
hermetically tested for use in
environments which require a
high reliability device. These
displays are designed and tested
to meet a helium leak rate of
5 x 10
-8
cc/sec and a fluorocar-
bon gross leak bubble test.
These displays may be mounted
by soldering directly to a printed
circuit board or inserted into a
socket. The lead-to-lead pin
spacing is 2.54 mm (0.100 inch)
and the lead row spacing is 15.24
mm (0.600 inch). These displays
may be end stacked with 2.54
mm (0.100 inch) spacing
between outside pins of adjacent
displays. Sockets such as Augat
324 AG2D (3 digits) or Augat
508 (one digit, right angle
mounting) may be used.
The primary thermal path for
power dissipation is through the
device leads. Therefore, to insure
reliable operation up to an
ambient temperature of +100°C,
it is important to maintain a case-
to-ambient thermal resistance of
less than 35°C/watt as measured
on top of display pin 3.
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