High Speed CMOS Logic Dual Positive-Edge Trigger J-K Flip-Flops with Set and Reset 16-CDIP -55 to 125
型号 | 5962-9070101MEA | CD54HC109F3A | CD54HCT109F3A | CD54HC109 | CD54HCT109 | CD74HC109 | CD74HCT109 |
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描述 | High Speed CMOS Logic Dual Positive-Edge Trigger J-K Flip-Flops with Set and Reset 16-CDIP -55 to 125 | High Speed CMOS Logic Dual Positive-Edge Trigger J-K Flip-Flops with Set and Reset 16-CDIP -55 to 125 | High Speed CMOS Logic Dual Positive-Edge Trigger J-K Flip-Flops with Set and Reset 16-CDIP -55 to 125 | CD54HC109 High Speed CMOS Logic Dual Positive-Edge Trigger J-K Flip-Flops with Set and Reset | CD54HCT109 High Speed CMOS Logic Dual Positive-Edge Trigger J-K Flip-Flops with Set and Reset | CD74HC109 High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset | CD74HCT109 High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset |
Voltage(Nom)(V) | - | - | - | 3.3,5 | 5 | 3.3,5 | 5 |
F @ nom voltage(Max)(Mhz) | - | - | - | 70 | 25 | 70 | 25 |
Technology Family | - | - | - | HC | HCT | HC | HCT |
tpd @ nom Voltage(Max)(ns) | - | - | - | 53 | 50 | 53 | 50 |
Rating | - | - | - | Military | Military | Catalog | Catalog |
IOL(Max)(mA) | - | - | - | -6 | -6 | 6 | 6 |
Package Group | - | - | - | CDIP|16 | CDIP|16 | PDIP|16,SOIC|16 | PDIP|16,SOIC|16 |
IOH(Max)(mA) | - | - | - | 6 | 6 | -6 | -6 |
VCC(Max)(V) | - | - | - | 6 | 5.5 | 6 | 5.5 |
ICC @ nom voltage(Max)(mA) | - | - | - | 0.04 | 0.04 | 0.04 | 0.04 |
VCC(Min)(V) | - | - | - | 2 | 4.5 | 2 | 4.5 |
Schmitt trigger | - | - | - | No | No | No | No |
Bits(#) | - | - | - | 2 | 2 | 2 | 2 |