DATASHEET
ISL75051ASEH, ISL73051ASEH
3A, Radiation Hardened, Positive, Ultra-Low Dropout Regulator
FN8964
Rev.3.00
May 16, 2019
The
ISL75051ASEH
and
ISL73051ASEH
are radiation
hardened low-voltage, high-current, single-output LDOs
specified for up to 3.0A of continuous output current.
These devices operate across an input voltage range of
2.2V to 6.0V and can provide output voltages of 0.8V to
5.0V adjustable, based on the resistor divider setting.
Dropout voltages as low as 65mV can be achieved using
the device.
The OCP pin allows the short-circuit output current limit
threshold to be programmed by a resistor from the OCP
pin to GND. The OCP setting range is 0.5A minimum to
8.5A maximum. The resistor sets the constant current
threshold for the output under fault conditions. The
thermal shutdown disables the output if the device
temperature exceeds the specified value. It subsequently
enters an ON/OFF cycle until the fault is removed. The
ENABLE feature allows the part to be placed into a low
current shutdown mode that typically draws about 10µA.
These devices are optimized for fast transient response and
Single Event Effects (SEE). This reduces the magnitude of
Single Event Transients (SET) seen on the output.
Additional protection diodes and filters are not needed.
These devices are stable with tantalum capacitors as low as
47µF and provide excellent regulation all the way from no
load to full load. Programmable soft-start allows the user
to program the inrush current by using the decoupling
capacitor value on the BYP pin.
Features
• DLA SMD
5962-11212
• Output current up to 3.0A at T
J
= +150°C
• Output accuracy ±1.5% over MIL temperature range
• Ultra low dropout:
• 65mV (typical) dropout at 1.0A
• 225mV (typical) dropout at 3.0A
• SET mitigation with no added filtering/diodes
• Input supply range: 2.2V to 6.0V
• Fast load transient response
• Shutdown current of 10µA (typical)
• Output adjustable using external resistors
• PSRR 66dB (typical) at 1kHz
• Enable and PGood features
• Programmable soft-start/inrush current limiting
• Over-temp shutdown and programmable OCP limits
• Stable with 47µF min tantalum capacitor
• Radiation hardness (ISL75051ASEH only)
• High dose rate (50-300rad(Si)/s): 100krad(Si)
• Low dose rate (≤0.01rad(Si)/s): 50krad(Si)
• Radiation hardness (ISL73051ASEH only)
• Low dose rate (≤0.01rad(Si)/s): 50krad(Si)
Applications
• LDO regulator for space applications
• DSP, FPGA, and µP core power supplies
• Post-regulation of switched mode power supplies
• Down-hole drilling
EN
ROCP
VIN
VIN
PG
220µF
0.1µF
VIN
2.67k
EN
OCP
ISL75051ASEH
Related Literature
• For a full list of related documents, visit our website:
•
ISL75051ASEH, ISL73051ASEH
device pages
0.30
BYP
ADJ
VOUT
GND
R
1
0.1µF 220µF
0.1µF
+150°C
0.25
Dropout Voltage (V)
VOUT
+125°C
0.20
0.15
0.10
0.05
0.00
0.00
+25°C
4.7nF
PG
R
2
100pF
0.50
1.00
1.50
2.00
I
OUT
(A)
2.50
3.00
3.50
Figure 1. Typical Application
Figure 2. Dropout vs I
OUT
FN8964 Rev.3.00
May 16, 2019
Page 1 of 22
ISL75051ASEH, ISL73051ASEH
Contents
1.
1.1
1.2
1.3
1.4
1.5
2.
2.1
2.2
2.3
2.4
2.5
3.
4.
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
5.
6.
7.
8.
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
3
4
5
5
Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Radiation Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
6
6
7
7
Typical Operating Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Applications Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Input Voltage Requirements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Adjustable Output Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input and Output Capacitor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power-Good. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Soft-Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current Limit Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
12
12
13
14
14
15
16
Die and Layout Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Metallization Mask Layout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Package Outline Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
FN8964 Rev.3.00
May 16, 2019
Page 2 of 22
ISL75051ASEH, ISL73051ASEH
1. Overview
1.
1.1
VIN
Overview
Block Diagram
Current
Limit ADJ
520mV
BYPASS
Reference
Bias
Current
Limit
Thermal
Shutdown
Power
PMOS
OCP
VOUT
ENABLE
Level
Shift
VADJ
PGOOD
Delay
450mV
GND
Figure 3. Block Diagram
1.2
Typical Application
EN
EN
511
OCP
VIN
VIN
VIN
VIN
VIN
VIN
VIN
PG
220µF
0.1µF
4.32k
2.67k
17
18
2
1
VOUT
GND
0.1µF
220µF
11
12
8
7
ADJ
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
0.2µF
10
9
BYP
13
14
15
16
ISL75051ASEH
6
5
4
3
4.7n
VIN
2.26k
5.49k
100pF
PG
Figure 4. Typical Application
FN8964 Rev.3.00
May 16, 2019
Page 3 of 22
ISL75051ASEH, ISL73051ASEH
1. Overview
1.3
Ordering Information
Part Number
ISL75051ASEHVF
ISL75051ASEHF/PROTO (Note
3)
ISL75051ASEHVX
ISL75051ASEHVFE
ISL75051ASEHFE/PROTO (Note
3)
ISL75051ASEHX/SAMPLE (Note
3)
ISL73051ASEHVF
ISL73051ASEHF/PROTO (Note
3)
ISL73051ASEHVX
ISL73051ASEHVFE
ISL73051ASEHFE/PROTO (Note
3)
ISL73051ASEHX/SAMPLE (Note
3)
ISL75051ASEHEV1Z (Note
4)
Temp Range
(°C)
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
Evaluation Board
Package
(RoHS Compliant)
18 Ld CDFP
18 Ld CDFP
Die
18 Ld CDFP with Bottom METAL K18.E
18 Ld CDFP with Bottom Metal
Die Sample
18 Ld CDFP
18 Ld CDFP
Die
18 Ld CDFP with Bottom Metal
18 Ld CDFP with Bottom Metal
Die Sample
K18.E
K18.E
K18.D
K18.D
K18.E
Pkg
Dwg. #
K18.D
K18.D
Ordering SMD Number
(Notes
1, 2)
5962R1121203VXC
N/A
5962R1121203V9A
5962R1121203VYC
N/A
N/A
5962L1121204VXC
N/A
5962L1121204V9A
5962L1121204VYC
N/A
N/A
N/A
Notes:
1. These Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible
with both SnPb and Pb-free soldering operations.
2. Specifications for Rad Hard QML devices are controlled by the Defense Logistics Agency Land and Maritime (DLA). The SMD
numbers listed must be used when ordering.
3. The /PROTO and /SAMPLE are not rated or certified for Total Ionizing Dose (TID) or Single Event Effect (SEE) immunity. These
parts are intended for engineering evaluation purposes only. The /PROTO parts meet the electrical limits and conditions across the
temperature range specified in the DLA SMD and are in the same form and fit as the qualified device. The /SAMPLE die is capable
of meeting the electrical limits and conditions specified in the DLA SMD at +25°C only. The /SAMPLE is a die and does not receive
100% screening across the temperature range to the DLA SMD electrical limits. These part types do not come with a certificate of
conformance because there is no radiation assurance testing and they are not DLA qualified devices.
4. Evaluation board uses the /PROTO parts. The /PROTO parts are not rated or certified for Total Ionizing Dose (TID) or Single Event
Effect (SEE) immunity.
Table 1. Key Differences Between Family of Parts
Part Numbers
ISL75051ASEH
ISL73051ASEH
HDR to 100krad(Si) RHA Tested
LDR to 50krad(Si) RHA Tested
LDR to 50krad(Si) RHA Tested
TID Ratings
FN8964 Rev.3.00
May 16, 2019
Page 4 of 22
ISL75051ASEH, ISL73051ASEH
1. Overview
1.4
Pin Configuration
18 Ld CDFP
Top View
GND
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VADJ
BYP
1
2
3
4
5
6
7
8
9
GND
18
17
16
15
14
13
12
11
10
PG
VIN
VIN
VIN
VIN
VIN
VIN
OCP
EN
Note: The ESD triangular mark indicates Pin #1. It is a part of the device
marking and is placed on the lid in the quadrant where Pin #1 is located.
1.5
1
Pin Descriptions
Pin Name
GND
VOUT
VADJ
BYP
EN
OCP
VIN
PG
GND
-
GND pin.
Output voltage pins.
The VADJ pin allows V
OUT
to be programmed with an external resistor divider.
To filter the internal reference, connect a 0.1µF capacitor from the BYP pin to GND.
V
IN
independent chip enable. TTL and CMOS compatible.
Allows the current limit to be programmed with an external resistor.
Input supply pins.
V
OUT
in regulation signal. Logic low defines when V
OUT
is not in regulation. Must be
grounded if not used.
The top lid is connected to the GND pin of the package.
The bottom E-pad is only available on the K18.E package and is not electrically connected.
Description
Pin Number
2, 3, 4, 5, 6, 7
8
9
10
11
12, 13, 14, 15, 16, 17
18
Top Lid
Bottom Metal
FN8964 Rev.3.00
May 16, 2019
Page 5 of 22
