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5962R9664301VXC

4000/14000/40000 SERIES, 6-BIT DRIVER, TRUE OUTPUT, CDFP16, CERAMIC, FP-16

器件类别:逻辑    逻辑   

厂商名称:Renesas(瑞萨电子)

厂商官网:https://www.renesas.com/

器件标准:

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器件参数
参数名称
属性值
是否无铅
不含铅
是否Rohs认证
符合
厂商名称
Renesas(瑞萨电子)
零件包装代码
DFP
包装说明
DFP, FL16,.3
针数
16
Reach Compliance Code
compliant
其他特性
ONE FUNCTION WITH TWO BITS; RADIATION HARDENED; IOH = 3MA @ VOH = 2.5V
控制类型
ENABLE LOW
系列
4000/14000/40000
JESD-30 代码
R-CDFP-F16
JESD-609代码
e4
逻辑集成电路类型
BUS DRIVER
最大I(ol)
0.0026 A
位数
6
功能数量
1
端口数量
2
端子数量
16
最高工作温度
125 °C
最低工作温度
-55 °C
输出特性
3-STATE
输出极性
TRUE
封装主体材料
CERAMIC, METAL-SEALED COFIRED
封装代码
DFP
封装等效代码
FL16,.3
封装形状
RECTANGULAR
封装形式
FLATPACK
峰值回流温度(摄氏度)
NOT SPECIFIED
电源
5/15 V
Prop。Delay @ Nom-Sup
203 ns
传播延迟(tpd)
203 ns
认证状态
Not Qualified
筛选级别
MIL-PRF-38535 Class V
座面最大高度
2.92 mm
最大供电电压 (Vsup)
18 V
最小供电电压 (Vsup)
3 V
标称供电电压 (Vsup)
5 V
表面贴装
YES
技术
CMOS
温度等级
MILITARY
端子面层
GOLD
端子形式
FLAT
端子节距
1.27 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
总剂量
100k Rad(Si) V
宽度
6.73 mm
Base Number Matches
1
文档预览
REVISIONS
LTR
A
DESCRIPTION
Changes in accordance with NOR 5962-R010-98.
DATE (YR-MO-DA)
97-12-12
APPROVED
Monica L. Poelking
B
Incorporate revision A. Update boilerplate to MIL-PRF-38535
requirements. Editorial changes throughout. – LTG
04-02-02
Thomas M. Hess
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
B
15
B
16
B
17
B
18
REV
SHEET
PREPARED BY
Marcia B. Kelleher
B
19
B
20
B
21
B
1
B
22
B
2
B
3
B
4
B
5
B
6
B
7
B
8
B
9
B
10
B
11
B
12
B
13
B
14
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
CHECKED BY
Monica L. Poelking
APPROVED BY
Monica L. Poelking
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216
http://www.dscc.dla.mil
DRAWING APPROVAL DATE
95-12-27
MICROCIRCUIT, DIGITAL, RADIATION
HARDENED CMOS, HEX BUFFER, MONOLITHIC
SILICON
AMSC N/A
REVISION LEVEL
SIZE
CAGE CODE
B
A
SHEET
67268
1 OF
22
5962-96643
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
5962-E132-04
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and
M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the
Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the
PIN.
1.2 PIN. The PIN is as shown in the following example:
5962
R
96643
01
V
X
C
Federal
stock class
designator
\
RHA
designator
(see 1.2.1)
/
Device
type
(see 1.2.2)
Device
class
designator
(see 1.2.3)
Case
outline
(see 1.2.4)
Lead
finish
(see 1.2.5)
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and
are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
01
02
Generic number
4503B
4503BN
Circuit function
Radiation hardened CMOS, hex buffer
Radiation hardened CMOS, hex buffer
with neutron irradiated die
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as
follows:
Device class
M
Q or V
Device requirements documentation
Vendor self-certification to the requirements for MIL-STD-883 compliant, non-
JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A
Certification and qualification to MIL-PRF-38535
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
E
X
Descriptive designator
CDIP2-T16
CDFP4-F16
Terminals
16
16
Package style
Dual-in-line package
Flat package
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535,
appendix A for device class M.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-96643
SHEET
B
2
1.3 Absolute maximum ratings. 1/ 2/ 3/
Supply voltage range (V
DD
) ........................................................................................
Input voltage range ...................................................................................................
DC input current, any one input .................................................................................
Device dissipation per output transistor .....................................................................
Storage temperature range (T
STG
)..............................................................................
Lead temperature (soldering, 10 seconds) ................................................................
Thermal resistance, junction-to-case (θ
JC
):
Case E ....................................................................................................................
Case X ....................................................................................................................
Thermal resistance, junction-to-ambient (θ
JA
):
Case E ....................................................................................................................
Case X ....................................................................................................................
Junction temperature (T
J
)...........................................................................................
Maximum power dissipation at T
A
= +125°C (P
D
): 4/
Case E ....................................................................................................................
Case X ....................................................................................................................
1.4 Recommended operating conditions.
Supply voltage range (V
DD
) ........................................................................................
Case operating temperature range (T
C
) .....................................................................
Input voltage (V
IN
) ......................................................................................................
Output voltage (V
OUT
) .................................................................................................
Radiation features:
Total dose .............................................................................................................
Single event phenomenon (SEP) effective
linear energy threshold, no upsets or latchup (see 4.4.4.5) ................................
Dose rate upset (20 ns pulse) ...............................................................................
Dose rate latch-up ................................................................................................
Dose rate survivability ..........................................................................................
Neutron irradiated..................................................................................................
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in
the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the
solicitation.
SPECIFICATION
DEPARTMENT OF DEFENSE
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
1/
2/
3/
4/
Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
Unless otherwise specified, all voltages are referenced to V
SS
.
The limits for the parameters specified herein shall apply over the full specified V
DD
range and case temperature range of
-55°C to +125°C unless otherwise noted.
If device power exceeds package dissipation capability, provide heat sinking or derate linearly (the derating is
based on
θ
JA
) at the following rate:
Case E ....................................................................................................................... 13.7 mW/°C
Case X ....................................................................................................................... 8.8 mW/°C
Guaranteed by design or process but not tested.
Device type 02 only.
3.0 V dc to +18 V dc
-55°C to +125°C
0 V to V
DD
0 V to V
DD
1 x 10 Rads (Si)
> 75 MeV/(cm /mg) 5/
8
> 5 x 10 Rads(Si)/s 5/
8
> 2 x 10 Rads(Si)/s 5/
11
> 5 x 10 Rads(Si)/s 5/
14
2
> 1 x 10 neutrons/cm 6/
2
5
-0.5 V dc to +20 V dc
-0.5 V dc to + 20.5 V dc
±10
mA
100 mW
-65°C to +150°C
+265°C
24°C/W
29°C/W
73°C/W
114°C/W
+175°C
0.68 W
0.44 W
5/
6/
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-96643
SHEET
B
3
STANDARDS
DEPARTMENT OF DEFENSE
MIL-STD-883 -
MIL-STD-1835 -
HANDBOOKS
DEPARTMENT OF DEFENSE
MIL-HDBK-103 -
MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
(Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for
device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified
herein.
3.1.1 Microcircuit die. For the requirements for microcircuit die, see appendix A to this document.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.
3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Truth table. The truth table shall be as specified on figure 2.
3.2.4 Radiation test connections. The radiation test connections shall be as specified in table III herein.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full
case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical
tests for each subgroup are defined in table I.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space
limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the
RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535.
Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A.
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in
MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-96643
SHEET
B
4
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see
6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this
drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535
and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for
device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.
3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2
herein) involving devices acquired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A.
3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain
the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made
available onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in
microcircuit group number 37 (see MIL-PRF-38535, appendix A).
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-96643
SHEET
B
5
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参数对比
与5962R9664301VXC相近的元器件有:5962R9664301VEC、5962R9664302V9A、5962R9664301V9A、5962R9664302VXC、5962R9664302VEC。描述及对比如下:
型号 5962R9664301VXC 5962R9664301VEC 5962R9664302V9A 5962R9664301V9A 5962R9664302VXC 5962R9664302VEC
描述 4000/14000/40000 SERIES, 6-BIT DRIVER, TRUE OUTPUT, CDFP16, CERAMIC, FP-16 4000/14000/40000 SERIES, 6-BIT DRIVER, TRUE OUTPUT, CDIP16, CERAMIC, DIP-16 4000/14000/40000 SERIES, 6-BIT DRIVER, TRUE OUTPUT, UUC16, DIE-16 4000/14000/40000 SERIES, 6-BIT DRIVER, TRUE OUTPUT, UUC16 4000/14000/40000 SERIES, 6-BIT DRIVER, TRUE OUTPUT, CDFP16, CERAMIC, FP-16 4000/14000/40000 SERIES, 6-BIT DRIVER, TRUE OUTPUT, CDIP16, CERAMIC, DIP-16
零件包装代码 DFP DIP DIE DIE DFP DIP
包装说明 DFP, FL16,.3 DIP, DIP16,.3 DIE, DIE, DFP, FL16,.3 DIP, DIP16,.3
针数 16 16 16 16 16 16
Reach Compliance Code compliant compliant unknown unknown compliant not_compliant
系列 4000/14000/40000 4000/14000/40000 4000/14000/40000 4000/14000/40000 4000/14000/40000 4000/14000/40000
JESD-30 代码 R-CDFP-F16 R-CDIP-T16 X-XUUC-N16 X-XUUC-N16 R-CDFP-F16 R-CDIP-T16
逻辑集成电路类型 BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER
位数 6 6 6 6 6 6
功能数量 1 1 1 1 1 1
端口数量 2 2 2 2 2 2
端子数量 16 16 16 16 16 16
最高工作温度 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C
最低工作温度 -55 °C -55 °C -55 °C -55 °C -55 °C -55 °C
输出特性 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
输出极性 TRUE TRUE TRUE TRUE TRUE TRUE
封装主体材料 CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED UNSPECIFIED UNSPECIFIED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
封装代码 DFP DIP DIE DIE DFP DIP
封装形状 RECTANGULAR RECTANGULAR UNSPECIFIED UNSPECIFIED RECTANGULAR RECTANGULAR
封装形式 FLATPACK IN-LINE UNCASED CHIP UNCASED CHIP FLATPACK IN-LINE
传播延迟(tpd) 203 ns 203 ns 203 ns 203 ns 203 ns 203 ns
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
筛选级别 MIL-PRF-38535 Class V MIL-PRF-38535 Class V MIL-PRF-38535 Class V MIL-PRF-38535 Class V MIL-PRF-38535 Class V MIL-PRF-38535 Class V
最大供电电压 (Vsup) 18 V 18 V 18 V 18 V 18 V 18 V
最小供电电压 (Vsup) 3 V 3 V 3 V 3 V 3 V 3 V
标称供电电压 (Vsup) 5 V 5 V 5 V 5 V 5 V 5 V
表面贴装 YES NO YES YES YES NO
技术 CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 MILITARY MILITARY MILITARY MILITARY MILITARY MILITARY
端子形式 FLAT THROUGH-HOLE NO LEAD NO LEAD FLAT THROUGH-HOLE
端子位置 DUAL DUAL UPPER UPPER DUAL DUAL
总剂量 100k Rad(Si) V 100k Rad(Si) V 100k Rad(Si) V 100k Rad(Si) V 100k Rad(Si) V 100k Rad(Si) V
Base Number Matches 1 1 1 1 1 1
是否Rohs认证 符合 符合 - - 符合 不符合
控制类型 ENABLE LOW ENABLE LOW - - ENABLE LOW ENABLE LOW
JESD-609代码 e4 - e0 e0 e4 -
最大I(ol) 0.0026 A 0.0026 A - - 0.0026 A 0.0026 A
封装等效代码 FL16,.3 DIP16,.3 - - FL16,.3 DIP16,.3
峰值回流温度(摄氏度) NOT SPECIFIED NOT SPECIFIED - - NOT SPECIFIED 225
电源 5/15 V 5/15 V - - 5/15 V 5/15 V
Prop。Delay @ Nom-Sup 203 ns 203 ns - - 203 ns 203 ns
端子面层 GOLD - TIN LEAD TIN LEAD GOLD -
端子节距 1.27 mm 2.54 mm - - 1.27 mm 2.54 mm
处于峰值回流温度下的最长时间 NOT SPECIFIED NOT SPECIFIED - - NOT SPECIFIED NOT SPECIFIED
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