8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE
PHOTOCOUPLER
Features:
•
High speed 10Mbit/s
•
Guaranteed performance from -40 to 85℃
•
Logic gate output
•
High isolation voltage between input
and output (Viso=5000 V rms )
•
Pb free and RoHS compliant.
•
UL approved (No. 214129)
•
VDE approved (No. 132249)
•
SEMKO approved
•
NEMKO approved
•
DEMKO approved
•
FIMKO approved
•
CSA approved (No. 2037145)
6N137
Description
The 6N137 consists of an infrared emitting diode optically
coupled to a high speed integrated photo detector logic gate
with a strobable output.
It is packaged in a 8-pin DIP package and available in
wide-lead spacing and SMD options.
Schematic
1
2
8
7
6
5
Applications
3
•
Ground loop elimination
•
LSTTL to TTL, LSTTL or 5 volt CMOS
•
Line receiver, data transmission
•
Data multiplexing
•
Switching power supplies
•
Pulse transformer replacement
•
Computer peripheral interface
4
A 0.1μF bypass capacitor must be
connected between pins 8 and 5
*3
Pin Configuration
1, No Connection
2, Anode
3, Cathode
4. No Connection
5, Gnd
6, Vout
7, V
E
8, V
CC
Truth Table (Positive Logic)
Input
H
L
H
L
H
L
Enable
H
H
L
L
NC
NC
Output
L
H
H
H
L
H
Everlight Electronics Co., Ltd.
Document No：DPC-000020 Rev. 2
1
http://www.everlight.com
February 23, 2009
8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE
PHOTOCOUPLER
Absolute Maximum Ratings (T
a
=25°C)
Parameter
Forward current
Input
Enable input voltage Not exceed V
CC
by
more than 500mV
Reverse voltage
Power dissipation
Power dissipation
Output
Output current
Output voltage
Supply voltage
Output Power Dissipation
Isolation voltage
*1
Operating temperature
Storage temperature
Soldering temperature
*2
Symbol
I
F
V
E
V
R
P
D
P
C
I
O
V
O
V
CC
P
O
V
ISO
T
OPR
T
STG
T
SOL
Rating
50
5.5
5
100
85
50
7.0
7.0
100
5000
-40 ~ +85
-55 ~ +125
260
6N137
Unit
mA
V
V
mW
mW
mA
V
V
mW
V rms
°C
°C
°C
Notes
*1 AC for 1 minute, R.H.= 40 ~ 60% R.H. In this test, pins 1 & 2 are shorted together, and pins 3 & 4
are shorted together.
*2 For 10 seconds.
Everlight Electronics Co., Ltd.
Document No：DPC-000020 Rev. 2
2
http://www.everlight.com
February 23, 2009
8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE
PHOTOCOUPLER
Electrical Characteristics (T
a
=-40 to 85°C unless specified otherwise)
Input
Parameter
Forward voltage
Reverse voltage
Temperature coefficient of
forward voltage
Input capacitance
Symbol
V
F
Min.
-
5.0
-
-
Typ.*
1.4
-
-1.8
60
Max.
1.8
-
-
-
Unit
V
V
mV/°C
pF
6N137
Condition
I
F
= 10mA
I
R
= 10μA
I
F
=10mA
V
F
=0, f=1MHz
V
R
ΔV
F
/
ΔT
A
C
IN
Output
Parameter
High level supply current
Low level supply current
High level enable current
Low level enable current
High level enable voltage
Low level enable voltage
Symbol
I
CCH
I
CCL
I
EH
I
EL
V
EH
V
EL
Min.
-
-
-
-
2.0
-
Typ.*
7
9
- 0.6
- 0.8
-
-
Max.
10
13
-1.6
-1.6
-
0.8
Unit
mA
mA
mA
mA
V
V
Condition
I
F
=10mA, V
E
=0.5V,
V
CC
=5.5V
I
F
=0mA, V
E
=0.5V,
V
CC
=5.5V
V
E
=0.5V, V
CC
=5.5V
V
E
=2.0V, V
CC
=5.5V
I
F
=10mA, V
CC
=5.5V
I
F
=10mA, V
CC
=5.5V
Transfer Characteristics
(T
a
=-40 to 85°C unless specified otherwise)
Parameter
HIGH Level Output Current
LOW Level Output Current
Input Threshold Current
Symbol
I
OH
Min.
-
-
-
Typ.*
2.1
0.35
2.5
Max.
100
0.6
5
Unit
uA
Condition
V
CC
=5.5V, V
O
=5.5V,
I
F
=250μA, V
E
=2.0V
V
CC
= 5.5V, I
F
=5mA,
V
E
=2.0V,I
CL
=13mA
V
CC
= 5.5V, V
O
=0.6V,
V
E
=2.0V,I
OL
=13mA
V
OL
I
FT
V
mA
Everlight Electronics Co., Ltd.
Document No：DPC-000020 Rev. 2
3
http://www.everlight.com
February 23, 2009
8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE
PHOTOCOUPLER
6N137
Switching Characteristics
(T
a
=-40 to 85°C, V
CC
=5V, I
F
=7.5mA unless specified otherwise)
Parameter
Propagation delay time to
output High level
(Fig.12)
Propagation delay time to
output Low level
(Fig.12)
Pulse width distortion
Output rise time
(Fig.12)
Output fall time
(Fig.12)
Symbol
T
PHL
Min.
-
Typ.*
35
Max.
75
Unit
ns
Condition
C
L
= 15pF, R
L
=350Ω,
TA=25°C
C
L
= 15pF, R
L
=350Ω,
TA=25°C
C
L
= 15pF, R
L
=350Ω
C
L
= 15pF, R
L
=350Ω
C
L
= 15pF, R
L
=350Ω
T
PLH
|Tphl – Tplh|
tr
tf
-
-
-
-
40
5
40
10
75
35
-
-
ns
ns
ns
ns
Switching Characteristics
(T
a
=-40 to 85°C, V
CC
=5V, I
F
=7.5mA unless specified otherwise)
Enable Propagation Delay
Time to Output High Level
(Fig.13)
Enable Propagation Delay
Time to Output Low Level
(Fig.13)
Common Mode Transient
Immunity at Logic High
*4
I
F
= 7.5mA , V
EH
=3.5V,
C
L
= 15pF, R
L
=350Ω
I
F
= 7.5mA , V
EH
=3.5V,
C
L
= 15pF, R
L
=350Ω
I
F
= 0mA , V
CM
=50Vp-p,
CM
H
5000
-
-
V/µS
V
OH
=2.0V, R
L
=350Ω,
TA=25°C
Common Mode Transient
Immunity at Logic Low
*5
I
F
= 7.5mA ,
CM
L
5000
-
-
V/µS
V
CM
=50Vp-p, V
OL
=0.8V,
R
L
=350Ω, TA=25°C
t
ELH
-
15
-
ns
t
EHL
-
15
-
ns
Everlight Electronics Co., Ltd.
Document No：DPC-000020 Rev. 2
4
http://www.everlight.com
February 23, 2009
8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE
PHOTOCOUPLER
Typical Performance Curves
6N137
Everlight Electronics Co., Ltd.
Document No：DPC-000020 Rev. 2
5
http://www.everlight.com
February 23, 2009
