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74AUP1G332GS

AUP/ULP/V SERIES, 3-INPUT OR GATE, PDSO6, 1 X 1 MM, 0.35 MM HEIGHT, SOT-1202, SON-6

器件类别:逻辑    逻辑   

厂商名称:NXP(恩智浦)

厂商官网:https://www.nxp.com

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
厂商名称
NXP(恩智浦)
零件包装代码
SON
包装说明
1 X 1 MM, 0.35 MM HEIGHT, SOT-1202, SON-6
针数
6
Reach Compliance Code
unknown
系列
AUP/ULP/V
JESD-30 代码
S-PDSO-N6
JESD-609代码
e3
长度
1 mm
逻辑集成电路类型
OR GATE
湿度敏感等级
1
功能数量
1
输入次数
3
端子数量
6
最高工作温度
125 °C
最低工作温度
-40 °C
封装主体材料
PLASTIC/EPOXY
封装代码
VSON
封装形状
SQUARE
封装形式
SMALL OUTLINE, VERY THIN PROFILE
峰值回流温度(摄氏度)
260
传播延迟(tpd)
18.7 ns
认证状态
Not Qualified
座面最大高度
0.35 mm
最大供电电压 (Vsup)
3.6 V
最小供电电压 (Vsup)
0.8 V
标称供电电压 (Vsup)
1.1 V
表面贴装
YES
技术
CMOS
温度等级
AUTOMOTIVE
端子面层
TIN
端子形式
NO LEAD
端子节距
0.35 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
30
宽度
1 mm
文档预览
74AUP1G332
Low-power 3-input OR-gate
Rev. 5 — 4 July 2012
Product data sheet
1. General description
The 74AUP1G332 provides a single 3-input OR gate.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
CC
range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using I
OFF
.
The I
OFF
circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
2. Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Low static power consumption; I
CC
= 0.9
A
(maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
CC
I
OFF
circuitry provides partial Power-down mode operation
Multiple package options
Specified from
40 C
to +85
C
and
40 C
to +125
C
NXP Semiconductors
74AUP1G332
Low-power 3-input OR-gate
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74AUP1G332GW
74AUP1G332GM
74AUP1G332GF
74AUP1G332GN
74AUP1G332GS
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
Name
SC-88
XSON6
XSON6
XSON6
XSON6
Description
plastic surface-mounted package; 6 leads
Version
SOT363
Type number
plastic extremely thin small outline package; no leads; SOT886
6 terminals; body 1
1.45
0.5 mm
plastic extremely thin small outline package; no leads; SOT891
6 terminals; body 1
1
0.5 mm
extremely thin small outline package; no leads;
6 terminals; body 0.9
1.0
0.35 mm
extremely thin small outline package; no leads;
6 terminals; body 1.0
1.0
0.35 mm
SOT1115
SOT1202
4. Marking
Table 2.
Marking
Marking code
[1]
aG
aG
aG
aG
aG
Type number
74AUP1G332GW
74AUP1G332GM
74AUP1G332GF
74AUP1G332GN
74AUP1G332GS
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
3
1
6
B
A
C
001aad933
Y
4
1
3
6
1
4
001aad934
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
B
A
C
001aad935
Y
Fig 3.
Logic diagram
74AUP1G332
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 5 — 4 July 2012
2 of 19
NXP Semiconductors
74AUP1G332
Low-power 3-input OR-gate
6. Pinning information
6.1 Pinning
74AUP1G332
74AUP1G332
A
GND
1
2
6
5
C
GND
V
CC
B
B
3
001aad930
A
1
6
C
A
GND
74AUP1G332
1
2
3
6
5
4
C
V
CC
Y
2
5
V
CC
3
4
Y
B
4
Y
001aad931
001aad932
Transparent top view
Transparent top view
Fig 4.
Pin configuration SOT363
Fig 5.
Pin configuration SOT886
Fig 6.
Pin configuration SOT891,
SOT1115 and SOT1202
6.2 Pin description
Table 3.
Symbol
A
GND
B
Y
V
CC
C
Pin description
Pin
1
2
3
4
5
6
Description
data input A
ground (0 V)
data input B
data output Y
supply voltage
data input C
7. Functional description
Table 4.
Input
A
H
X
X
L
[1]
H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
Function table
[1]
Output
B
X
H
X
L
C
X
X
H
L
Y
H
H
H
L
74AUP1G332
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 5 — 4 July 2012
3 of 19
NXP Semiconductors
74AUP1G332
Low-power 3-input OR-gate
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
V
I
< 0 V
[1]
Min
0.5
50
0.5
50
[1]
Max
+4.6
-
+4.6
-
+4.6
20
50
-
+150
250
Unit
V
mA
V
mA
V
mA
mA
mA
C
mW
V
O
< 0 V
Active mode and Power-down
mode
V
O
= 0 V to V
CC
0.5
-
-
50
65
T
amb
=
40 C
to +125
C
[2]
-
The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For SC-88 packages: above 87.5
C
the value of P
tot
derates linearly with 4.0 mW/K.
For XSON6 packages: above 118
C
the value of P
tot
derates linearly with 7.8 mW/K.
9. Recommended operating conditions
Table 6.
Symbol
V
CC
V
I
V
O
T
amb
t/V
Recommended operating conditions
Parameter
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
V
CC
= 0.8 V to 3.6 V
Active mode
Power-down mode; V
CC
= 0 V
Conditions
Min
0.8
0
0
0
40
0
Max
3.6
3.6
V
CC
3.6
+125
200
Unit
V
V
V
V
C
ns/V
74AUP1G332
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 5 — 4 July 2012
4 of 19
NXP Semiconductors
74AUP1G332
Low-power 3-input OR-gate
10. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
T
amb
= 25
C
V
IH
HIGH-level input voltage
V
CC
= 0.8 V
V
CC
= 0.9 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 3.0 V to 3.6 V
V
IL
LOW-level input voltage
V
CC
= 0.8 V
V
CC
= 0.9 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 3.0 V to 3.6 V
V
OH
HIGH-level output voltage
V
I
= V
IH
or V
IL
I
O
=
20 A;
V
CC
= 0.8 V to 3.6 V
I
O
=
1.1
mA; V
CC
= 1.1 V
I
O
=
1.7
mA; V
CC
= 1.4 V
I
O
=
1.9
mA; V
CC
= 1.65 V
I
O
=
2.3
mA; V
CC
= 2.3 V
I
O
=
3.1
mA; V
CC
= 2.3 V
I
O
=
2.7
mA; V
CC
= 3.0 V
I
O
=
4.0
mA; V
CC
= 3.0 V
V
OL
LOW-level output voltage
V
I
= V
IH
or V
IL
I
O
= 20
A;
V
CC
= 0.8 V to 3.6 V
I
O
= 1.1 mA; V
CC
= 1.1 V
I
O
= 1.7 mA; V
CC
= 1.4 V
I
O
= 1.9 mA; V
CC
= 1.65 V
I
O
= 2.3 mA; V
CC
= 2.3 V
I
O
= 3.1 mA; V
CC
= 2.3 V
I
O
= 2.7 mA; V
CC
= 3.0 V
I
O
= 4.0 mA; V
CC
= 3.0 V
I
I
I
OFF
I
OFF
I
CC
I
CC
C
I
C
O
input leakage current
power-off leakage current
additional power-off
leakage current
supply current
additional supply current
input capacitance
output capacitance
V
I
= GND to 3.6 V; V
CC
= 0 V to 3.6 V
V
I
or V
O
= 0 V to 3.6 V; V
CC
= 0 V
V
I
or V
O
= 0 V to 3.6 V;
V
CC
= 0 V to 0.2 V
V
I
= GND or V
CC
; I
O
= 0 A;
V
CC
= 0.8 V to 3.6 V
V
I
= V
CC
0.6 V; I
O
= 0 A;
V
CC
= 3.3 V
V
CC
= 0 V to 3.6 V; V
I
= GND or V
CC
V
O
= GND; V
CC
= 0 V
[1]
Conditions
Min
Typ
Max
-
-
-
-
Unit
V
V
V
V
0.70
V
CC
-
0.65
V
CC
-
1.6
2.0
-
-
-
-
V
CC
0.1
1.11
1.32
2.05
1.9
2.72
2.6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.8
1.7
0.30
V
CC
V
0.35
V
CC
V
0.7
0.9
-
-
-
-
-
-
-
-
0.1
0.3
V
CC
0.31
0.31
0.31
0.44
0.31
0.44
0.1
0.2
0.2
0.5
40
-
-
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
A
A
A
A
A
pF
pF
0.75
V
CC
-
74AUP1G332
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 5 — 4 July 2012
5 of 19
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参数对比
与74AUP1G332GS相近的元器件有:74AUP1G332GN。描述及对比如下:
型号 74AUP1G332GS 74AUP1G332GN
描述 AUP/ULP/V SERIES, 3-INPUT OR GATE, PDSO6, 1 X 1 MM, 0.35 MM HEIGHT, SOT-1202, SON-6 AUP/ULP/V SERIES, 3-INPUT OR GATE, PDSO6, 0.90 X 1 MM, 0.35 MM HEIGHT, SOT-1115, SON-6
是否Rohs认证 符合 符合
厂商名称 NXP(恩智浦) NXP(恩智浦)
零件包装代码 SON SON
包装说明 1 X 1 MM, 0.35 MM HEIGHT, SOT-1202, SON-6 0.90 X 1 MM, 0.35 MM HEIGHT, SOT-1115, SON-6
针数 6 6
Reach Compliance Code unknown unknown
系列 AUP/ULP/V AUP/ULP/V
JESD-30 代码 S-PDSO-N6 R-PDSO-N6
JESD-609代码 e3 e3
长度 1 mm 1 mm
逻辑集成电路类型 OR GATE OR GATE
湿度敏感等级 1 1
功能数量 1 1
输入次数 3 3
端子数量 6 6
最高工作温度 125 °C 125 °C
最低工作温度 -40 °C -40 °C
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 VSON SON
封装形状 SQUARE RECTANGULAR
封装形式 SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE
峰值回流温度(摄氏度) 260 260
传播延迟(tpd) 18.7 ns 18.7 ns
认证状态 Not Qualified Not Qualified
座面最大高度 0.35 mm 0.35 mm
最大供电电压 (Vsup) 3.6 V 3.6 V
最小供电电压 (Vsup) 0.8 V 0.8 V
标称供电电压 (Vsup) 1.1 V 1.1 V
表面贴装 YES YES
技术 CMOS CMOS
温度等级 AUTOMOTIVE AUTOMOTIVE
端子面层 TIN PURE TIN
端子形式 NO LEAD NO LEAD
端子节距 0.35 mm 0.3 mm
端子位置 DUAL DUAL
处于峰值回流温度下的最长时间 30 30
宽度 1 mm 0.9 mm
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