INTEGRATED CIRCUITS
DATA SHEET
74LVC1G08
Single 2-input AND gate
Product specification
Supersedes data of 2002 May 17
2002 Oct 02
Philips Semiconductors
Product specification
Single 2-input AND gate
FEATURES
•
Wide supply voltage range from 1.65 to 5.5 V
•
High noise immunity
•
Complies with JEDEC standard:
– JESD8-7 (1.65 to 1.95 V)
– JESD8-5 (2.3 to 2.7 V)
– JESD8B/JESD36 (2.7 to 3.6 V).
• ±24
mA output drive (V
CC
= 3.0 V)
•
CMOS low power consumption
•
Latch-up performance
≤250
mA
•
Direct interface with TTL levels
•
Inputs accept voltages up to 5 V
•
Multiple package options
•
Specified from
−40
to +125
°C.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
≤
2.5 ns.
SYMBOL
t
PHL
/t
PLH
PARAMETER
propagation delay
inputs A, B to output Y
CONDITIONS
V
CC
= 1.8 V; C
L
= 30 pF; R
L
= 1 kΩ
DESCRIPTION
74LVC1G08
The 74LVC1G08 is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families.
Input can be driven from either 3.3 or 5 V devices. These
features allow the use of these devices in a mixed
3.3 and 5 V environment.
Schmitt trigger action at all inputs makes the circuit tolerant
for slower input rise and fall time.
This device is fully specified for partial power-down
applications using I
off
. The I
off
circuitry disables the output,
preventing the damaging backflow current through the
device when it is powered down.
The 74LVC1G08 provides the single 2-input AND function.
TYPICAL
3.4
ns
ns
ns
ns
ns
pF
pF
UNIT
V
CC
= 2.5 V; C
L
= 30 pF; R
L
= 500
Ω
2.2
V
CC
= 2.7 V; C
L
= 50 pF; R
L
= 500
Ω
2.5
V
CC
= 3.3 V; C
L
= 50 pF; R
L
= 500
Ω
2.1
V
CC
= 5.0 V; C
L
= 50 pF; R
L
= 500
Ω
1.7
C
I
C
PD
Notes
input capacitance
power dissipation capacitance per buffer V
CC
= 3.3 V; notes 1 and 2
5
16
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW).
P
D
= C
PD
×
V
CC2
×
f
i
+ (C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts.
2. The condition is V
I
= GND to V
CC
.
2002 Oct 02
2
Philips Semiconductors
Product specification
Single 2-input AND gate
FUNCTION TABLE
See note 1.
INPUT
A
L
L
H
H
Note
1. H = HIGH voltage level;
L = LOW voltage level.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
74LVC1G08GW
74LVC1G08GV
PINNING
PIN
1
2
3
4
5
B
A
GND
Y
V
CC
SYMBOL
data input B
data input A
ground (0 V)
data output Y
supply voltage
DESCRIPTION
TEMPERATURE
RANGE
−40
to +125
°C
−40
to +125
°C
PINS
5
5
PACKAGE
SC-88A
SC-74A
MATERIAL
plastic
plastic
B
L
H
L
H
74LVC1G08
OUTPUT
Y
L
L
L
H
CODE
SOT353
SOT753
MARKING
VE
V08
handbook, halfpage
B 1
A 2
GND
3
MNA112
5 VCC
handbook, halfpage
1
2
B
A
Y
4
08
4
Y
MNA113
Fig.1 Pin configuration.
Fig.2 Logic symbol.
2002 Oct 02
3
Philips Semiconductors
Product specification
Single 2-input AND gate
74LVC1G08
handbook, halfpage
1
2
handbook, halfpage
&
A
4
Y
MNA114
B
MNA221
Fig.3 IEE/IEC logic symbol.
Fig.4 Logic diagram.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
CC
V
I
V
O
T
amb
t
r
, t
f
PARAMETER
supply voltage
input voltage
output voltage
operating ambient temperature
input rise and fall times
V
CC
= 1.65 to 2.7 V
V
CC
= 2.7 to 5.5 V
active mode
V
CC
= 0 V; Power-down mode
CONDITIONS
0
0
0
−40
0
0
MIN.
1.65
MAX.
5.5
5.5
V
CC
5.5
+125
20
10
V
V
V
V
°C
ns/V
ns/V
UNIT
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
, I
GND
T
stg
P
D
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. When V
CC
= 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
PARAMETER
supply voltage
input diode current
input voltage
output diode current
output voltage
output source or sink current
V
CC
or GND current
storage temperature
power dissipation per package
for temperature range from
−40
to +125
°C
V
I
< 0
note 1
V
O
> V
CC
or V
O
< 0
active mode; notes 1 and 2
V
O
= 0 to V
CC
CONDITIONS
−
−0.5
−
−0.5
−
−
−65
−
MIN.
−0.5
MAX.
+6.5
−50
+6.5
±50
+6.5
±50
±100
+150
250
V
mA
V
mA
V
mA
mA
°C
mW
UNIT
V
CC
+ 0.5 V
Power-down mode; notes 1 and 2
−0.5
2002 Oct 02
4
Philips Semiconductors
Product specification
Single 2-input AND gate
DC CHARACTERISTICS
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS
SYMBOL
PARAMETER
OTHER
Temperature range
−40
to +85
°C
V
IH
HIGH-level input
voltage
1.65 to 1.95
2.3 to 2.7
2.7 to 3.6
4.5 to 5.5
V
IL
LOW-level input
voltage
1.65 to 1.95
2.3 to 2.7
2.7 to 3.6
4.5 to 5.5
V
OL
LOW-level output
voltage
V
I
= V
IH
or V
IL
I
O
= 100
µA
I
O
= 4 mA
I
O
= 8 mA
I
O
= 12 mA
I
O
= 24 mA
I
O
= 32 mA
V
OH
HIGH-level output
voltage
V
I
= V
IH
or V
IL
I
O
=
−100 µA
I
O
=
−4
mA
I
O
=
−8
mA
I
O
=
−12
mA
I
O
=
−24
mA
I
O
=
−32
mA
I
LI
I
off
I
CC
∆I
CC
input leakage
current
V
I
= 5.5 V or GND
1.65 to 5.5
1.65
2.3
2.7
3.0
4.5
5.5
0
5.5
2.3 to 5.5
V
CC
−
0.1
1.2
1.9
2.2
2.3
3.8
−
−
−
−
−
−
−
−
−
−
±0.1
±0.1
0.1
5
1.65 to 5.5
1.65
2.3
2.7
3.0
4.5
−
−
−
−
−
−
−
−
−
−
−
−
0.65
×
V
CC
1.7
2.0
0.7
×
V
CC
−
−
−
−
−
−
−
−
−
−
−
−
V
CC
(V)
MIN.
TYP.
(1)
74LVC1G08
MAX.
UNIT
−
−
−
−
0.35
×
V
CC
0.7
0.8
0.3
×
V
CC
0.1
0.45
0.3
0.4
0.55
0.55
−
−
−
−
−
−
±5
±10
10
500
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
µA
µA
µA
µA
power OFF leakage V
I
or V
O
= 5.5 V
current
quiescent supply
current
V
I
= V
CC
or GND;
I
O
= 0
additional quiescent V
I
= V
CC
−
0.6 V;
supply current per
I
O
= 0
pin
2002 Oct 02
5
模拟与混合信号
