Changed Low Power Consumption from 2.5 mA to 2.5 µA....... 1
Changed
I
DD
Unit from mA to µA, Table 2 .................................... 4
4/12—Rev. 0 to Rev. A
Changes to Features Section............................................................ 1
Changes to Positive Supply Current, Table 2 ................................ 4
Changes to Ordering Guide .......................................................... 16
10/11—Revision 0: Initial Version
Rev. B | Page 2 of 16
Data Sheet
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
5 kΩ, 10 kΩ, and 80 kΩ versions: V
DD
= 2.3 V to 5.5 V, V
A
= V
DD
, V
B
= 0 V, −40°C < T
A
< +125°C, unless otherwise noted.
Table 2.
Parameter
DC CHARACTERISTICS—RHEOSTAT MODE
Resolution
Resistor Integral Nonlinearity
2
Symbol
N
R-INL
Test Conditions/Comments
Min
6
−2.5
−1
−1
−0.25
−1
−8
Typ
1
Max
AD5116
Unit
Bits
LSB
LSB
LSB
LSB
LSB
%
ppm/°C
Ω
Ω
Ω
R
AB
= 5 kΩ, V
DD
= 2.3 V to 2.7 V
R
AB
= 5 kΩ, V
DD
= 2.7 V to 5.5 V
R
AB
= 10 kΩ
R
AB
= 80 kΩ
Resistor Differential Nonlinearity
2
Nominal Resistor Tolerance
Resistance Temperature Coefficient
3
Wiper Resistance
R-DNL
ΔR
AB
/R
AB
(ΔR
AB
/R
AB
)/ΔT × 10
6
R
W
R
BS
R
TS
±0.5
±0.25
±0.25
±0.1
±0.25
35
70
45
70
+2.5
+1
+1
+0.25
+1
+8
140
80
140
Code = full scale
Code = zero scale
Code = bottom scale
Code = top scale
DC CHARACTERISTICS—POTENTIOMETER
DIVIDER MODE
Integral Nonlinearity
4
Differential Nonlinearity
4
Full-Scale Error
INL
DNL
V
WFSE
Zero-Scale Error
V
WZSE
Voltage Divider Temperature Coefficient
3
RESISTOR TERMINALS
Maximum Continuous I
A
, I
B
, and I
W
Current
3
Terminal Voltage Range
5
Capacitance A, Capacitance B
3
, 6
Capacitance W
3
, 6
Common-Mode Leakage Current
3
DIGITAL INPUTS (PU AND PD)
Input Logic
3
High
Low
Input Current
3
Input Capacitance
3
DIGITAL OUTPUT (
ASE)
Output High Voltage
3
Output Current
3
Three-State Leakage Current
3
Input Capacitance
3
(ΔV
W
/V
W
)/ΔT × 10
6
R
AB
= 5 kΩ
R
AB
=10 kΩ
R
AB
= 80 kΩ
R
AB
= 5 kΩ
R
AB
=10 kΩ
R
AB
= 80 kΩ
Code = half scale
R
AB
= 5 kΩ, 10 kΩ
R
AB
= 80 kΩ
−0.5
−0.5
−2.5
−1.5
−1
±0.15
±0.15
+0.5
+0.5
+1.5
+1
+0.25
±10
−6
−1.5
GND
20
35
50
+6
+1.5
V
DD
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
ppm/°C
mA
mA
V
pF
pF
nA
C
A
, C
B
C
W
f = 1 MHz, measured to GND,
code = half scale, V
W
= V
A
= 2.5 V
or V
W
= V
B
= 2.5 V
f = 1 MHz, measured to GND,
code = half scale, V
A
= V
B
= 2.5 V
V
A
= V
W
= V
B
V
INH
V
INL
I
N
C
IN
V
OH
I
O
I
OZ
C
IN
I
SINK
= 2 mA, V
DD
= 5 V
V
DD
= 5 V
2
0.8
±1
5
4.8
16
±1
5
V
V
µA
pF
V
mA
µA
pF
Rev. B | Page 3 of 16
AD5116
Parameter
POWER SUPPLIES
Single-Supply Power Range
Positive Supply Current
Symbol
Test Conditions/Comments
Min
2.3
I
DD
V
DD
= 5 V
V
DD
= 2.7 V
V
DD
= 2.3 V
0.75
Typ
1
Data Sheet
Max
5.5
3.5
2.5
2.4
Unit
V
µA
µA
µA
mA
µA
µW
dB
dB
dB
EEMEM Store Current
3
, 7
EEMEM Read Current
3
, 8
Power Dissipation
9
Power Supply Rejection
3
I
DD_NVM_STORE
I
DD_NVM_READ
P
DISS
PSR
V
IH
= V
LOGIC
or V
IL
= GND
∆V
DD
/∆V
SS
= 5 V ± 10%
R
AB
= 5 kΩ
R
AB
=10 kΩ
R
AB
= 80 kΩ
Code = half scale − 3 dB
R
AB
= 5 kΩ
R
AB
= 10 kΩ
R
AB
= 80 kΩ
V
A
= V
DD
/2 + 1 V rms, V
B
= V
DD
/2,
f = 1 kHz, code = half scale
R
AB
= 5 kΩ
R
AB
= 10 kΩ
R
AB
= 80 kΩ
V
A
= 5 V, V
B
= 0 V, ±0.5 LSB error
band
R
AB
= 5 kΩ
R
AB
= 10 kΩ
R
AB
= 80 kΩ
Code = half scale, T
A
= 25°C,
f = 100 kHz
R
AB
= 5 kΩ
R
AB
= 10 kΩ
R
AB
= 80 kΩ
T
A
= 25°C
100
2
320
5
−43
−50
−64
DYNAMIC CHARACTERISTICS
3
, 10
Bandwidth
BW
4
2
200
MHz
MHz
kHz
Total Harmonic Distortion
THD
−75
−80
−85
dB
dB
dB
V
W
Settling Time
t
s
2.5
3
10
µs
µs
µs
Resistor Noise Density
e
N_WB
7
9
20
1
50
nV/√Hz
nV/√Hz
nV/√Hz
MCycles
kCycles
Years
FLASH/EE MEMORY RELIABILITY
3
Endurance
11
Data Retention
1
2
12
Typical values represent average readings at 25°C, V
DD
= 5 V, V
SS
= 0 V, and V
LOGIC
= 5 V.
Resistor position nonlinearity error (R-INL) is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. The maximum wiper current is limited to 0.8 × V
DD
/R
AB
.
3
Guaranteed by design and characterization, not subject to production test.
4
INL and DNL are measured at V
WB
with the RDAC configured as a potentiometer divider similar to a voltage output DAC. V
A
= V
DD
and V
B
= 0 V. DNL specification limits
of ±1 LSB maximum are guaranteed monotonic operating conditions.
5
Resistor Terminal A, Resistor Terminal B, and Resistor Terminal W have no limitations on polarity with respect to each other.
6
C
A
is measured with V
W
= V
A
= 2.5 V, C
B
is measured with V
W
= V
B
= 2.5 V, and C
W
is measured with V
A
= V
B
= 2.5 V.
7
Different from operating current; supply current for NVM program lasts approximately 30 ms.
8
Different from operating current; supply current for NVM read lasts approximately 20 µs.
9
P
DISS
is calculated from (I
DD
× V
DD
).
10
All dynamic characteristics use V
DD
= 5.5 V, and V
LOGIC
= 5 V.
11
Endurance is qualified at 100,000 cycles per JEDEC Standard 22, Method A117 and measured at 150°C.
12
Retention lifetime equivalent at junction temperature (T
J
) = 125°C per JEDEC Standard 22, Method A117. Retention lifetime based on an activation energy of 1 eV
derates with junction temperature in the Flash/EE memory.
