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8-/16-Channel, 3 V/5 V, Serial Input,
Single-Supply, 12-/14-Bit Voltage Output
AD5390/AD5391/AD5392
FEATURES
AD5390: 16-channel, 14-bit voltage output DAC
AD5391: 16-channel, 12-bit voltage output DAC
AD5392: 8-channel, 14-bit voltage output DAC
Guaranteed monotonic
INL
±1 LSB max (AD5391)
±3 LSB max (AD5390-5/AD5392-5)
±4 LSB max (AD5390-3/AD5392-3)
On-chip 1.25 V/2.5 V, 10 ppm/°C reference
Temperature range: −40°C to +85°C
Rail-to-rail output amplifier
Power-down mode
Package types
64-lead LFCSP (9 mm × 9 mm)
52-lead LQFP (10 mm × 10 mm)
User interfaces
Serial SPI
®
-, QSPI
™
-, MICROWIRE
™
-, and DSP-compatible
(featuring data readback)
I
2
C
®
-compatible interface
INTEGRATED FUNCTIONS
Channel monitor
Simultaneous output update via LDAC
Clear function to user-programmable code
Amplifier boost mode to optimize slew rate
User-programmable offset and gain adjust
Toggle mode enables square wave generation
Thermal monitor
APPLICATIONS
Instrumentation and industrial control
Power amplifier control
Level setting (ATE)
Control systems
Microelectromechanical systems (MEMs)
Variable optical attenuators (VOAs)
Optical transceivers (MSA 300, XFP)
FUNCTIONAL BLOCK DIAGRAM
DV
DD
(×3)
DGND (×3/×4)
AV
DD
(×2)
AGND (×2)
DAC_GND (×2)
REF_GND
REFOUT/REFIN SIGNAL_GND (×2)
1.25V/2.5V
REFERENCE
AD5390
SPI/I
2
C
DCEN/AD1
14
INPUT
REG
0
14
14
INPUT
REG
1
14
14
14
14
DAC
REG
0
14
DAC 0
VOUT 0
m REG0
c REG0
14
14
DAC
REG
1
14
R
R
DIN/SDA
SCLK/SCL
SYNC/AD0
SDO
INTERFACE
CONTROL
LOGIC
STATE
MACHINE
AND
CONTROL
LOGIC
14
DAC 1
VOUT 1
VOUT 2
R
R
VOUT 3
VOUT 4
m REG1
c REG1
BUSY
PD
CLR
RESET
POWER-ON
RESET
14
INPUT
REG
6
14
14
INPUT
REG
7
14
MUX
MON_IN2
14
14
14
DAC
REG
6
14
DAC 6
VOUT 5
VOUT 6
m REG6
c REG6
14
14
DAC
REG
7
14
R
R
V
IN
0
V
IN
15
14
DAC 7
VOUT 7
VOUT 8
MON_IN1
m REG7
c REG7
×2
R
R
VOUT 15
MON_OUT
LDAC
Figure 1.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
03773-001
AD5390/AD5391/AD5392
TABLE OF CONTENTS
Features .............................................................................................. 1
Integrated Functions ........................................................................ 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
General Description ......................................................................... 3
AD5390-5/AD5391-5/AD5392-5 Specifications.......................... 4
AD5390-5/AD5391-5/AD5392-5 AC Characteristics................. 6
AD5390-3/AD5391-3/AD5392-3 Specifications.......................... 7
AD5390-3/AD5391-3/AD5392-3 AC Characteristics................. 9
Timing Characteristics................................................................... 10
Serial SPI-, QSPI-, MICROWIRE-, and DSP-
Compatible Interface.................................................................. 10
I
2
C Serial Interface...................................................................... 12
Absolute Maximum Ratings.......................................................... 13
ESD Caution................................................................................ 13
Pin Configuraton and Function Descriptions ............................ 14
Terminology .................................................................................... 17
Typical Performance Characteristics ........................................... 18
Functional Description .................................................................. 22
DAC Architecture....................................................................... 22
Data Decoding ............................................................................ 23
Interfaces.......................................................................................... 24
DSP-, SPI-, and MICROWIRE-
Compatible Serial Interface ...................................................... 24
I
2
C Serial Interface ..................................................................... 26
I
2
C Write Operation ....................................................................... 27
4-Byte Mode................................................................................ 27
3-Byte Mode................................................................................ 28
2-Byte Mode................................................................................ 29
AD539x On-Chip Special Function Registers........................ 30
Control Register Write............................................................... 32
Hardware Functions....................................................................... 34
Reset Function ............................................................................ 34
Asynchronous Clear Function.................................................. 34
BUSY and LDAC Functions...................................................... 34
Power-On Reset.......................................................................... 34
Power-Down ............................................................................... 34
Microprocessor Interfacing....................................................... 34
Application Information................................................................ 36
Power Supply Decoupling ......................................................... 36
Typical Configuration Circuit .................................................. 36
AD539x Monitor Function ....................................................... 37
Toggle Mode Function............................................................... 37
Thermal Monitor Function....................................................... 37
Outline Dimensions ....................................................................... 39
Ordering Guide .......................................................................... 40
REVISION HISTORY
3/06—Rev. A to Rev. B
Changes to Figure 1.......................................................................... 1
Changes to Table 9.......................................................................... 14
Changes to Table 12 and Table 15 ................................................ 23
Updated Outline Dimensions ....................................................... 39
Changes to Ordering Guide .......................................................... 40
10/04—Rev. 0 to Rev. A
Changes to Features.......................................................................... 1
Changes to Table 1............................................................................ 3
Changes to Table 2............................................................................ 4
Changes to Table 3.............................................................................6
Changes to Table 4.............................................................................7
Changes to Figure 36...................................................................... 35
Changes to Figure 37...................................................................... 36
Changes to Figure 38...................................................................... 36
Changes to Ordering Guide .......................................................... 41
4/04—Revision 0: Initial Version
Rev. B | Page 2 of 44
AD5390/AD5391/AD5392
GENERAL DESCRIPTION
The AD5390/AD5391 are complete single-supply, 16-channel,
14-bit and 12-bit DACs, respectively. The AD5392 is a complete
single-supply, 8-channel, 14-bit DAC. The devices are available
in either a 64-lead LFCSP or a 52-lead LQFP. All channels have
an on-chip output amplifier with rail-to-rail operation. All
devices include an internal 1.25/2.5 V, 10 ppm/°C reference, an
on-chip channel monitor function that multiplexes the analog
outputs to a common MON_OUT pin for external monitoring,
and an output amplifier boost mode that optimizes the output
amplifier slew rate.
The AD5390/AD5391/AD5392 contain a 3-wire serial interface
with interface speeds in excess of 30 MHz that are compatible
with SPI, QSPI, MICROWIRE, and DSP interface standards
and an I
2
C-compatible interface supporting a 400 kHz data
transfer rate.
An input register followed by a DAC register provides double-
buffering, allowing DAC outputs to be updated independently
or simultaneously using the LDAC input. Each channel has a
programmable gain and offset adjust register, letting the user
fully calibrate any DAC channel.
Power consumption is typically 0.25 mA per channel.
Table 1. Additional High Channel Count, Low Voltage, Single-Supply DACs in Portfolio
Model
AD5380BST-5
AD5380BST-3
AD5384BBC-5
AD5384BBC-3
AD5381BST-5
AD5381BST-3
AD5382BST-5
AD5382BST-3
AD5383BST-5
AD5383BST-3
Resolution
14 Bits
14 Bits
14 Bits
14 Bits
12 Bits
12 Bits
14 Bits
14 Bits
12 Bits
12 Bits
AV
DD
Range
4.5 V to 5.5 V
2.7 V to 3.6 V
4.5 V to 5.5 V
2.7 V to 3.6 V
4.5 V to 5.5 V
2.7 V to 3.6 V
4.5 V to 5.5 V
2.7 V to 3.6 V
4.5 V to 5.5 V
2.7 V to 3.6 V
Output Channels
40
40
40
40
40
40
32
32
32
32
Linearity Error (LSB)
±4
±4
±4
±4
±1
±1
±4
±4
±1
±1
Package Description
100-Lead LQFP
100-Lead LQFP
100-Lead CSPBGA
100-Lead CSPBGA
100-Lead LQFP
100-Lead LQFP
100-Lead LQFP
100-Lead LQFP
100-Lead LQFP
100-Lead LQFP
Package Option
ST-100
ST-100
BC-100
BC-100
ST-100
ST-100
ST-100
ST-100
ST-100
ST-100
Rev. B | Page 3 of 44
AD5390/AD5391/AD5392
AD5390-5/AD5391-5/AD5392-5 SPECIFICATIONS
AV
DD
= 4.5 V to 5.5 V; DV
DD
= 2.7 V to 5.5 V; AGND = DGND = 0 V; REFIN = 2.5 V external. All specifications T
MIN
to T
MAX
,
unless otherwise noted.
Table 2.
Parameter
ACCURACY
Resolution
Relative Accuracy
Differential Nonlinearity
Zero-Scale Error
Offset Error
Offset Error TC
Gain Error
Gain Temperature Coefficient
2
DC Crosstalk
2
REFERENCE INPUT/OUTPUT
Reference Input
2
Reference Input Voltage
DC Input Impedance
Input Current
Reference Range
Reference Output
3
AD5390-5
1
AD5392-5
1
14
±3
−1/+2
4
±4
±5
±0.024
±0.06
2
0.5
AD5391-5
1
12
±1
±1
4
±4
±5
±0.024
±0.06
2
0.5
Unit
Bits
LSB max
LSB max
mV max
mV max
μV/°C typ
% FSR max
% FSR max
ppm FSR/°C typ
LSB max
Test Conditions/Comments
Guaranteed monotonic over temperature
Measured at code 32 in the linear region
At 25°C T
MIN
to T
MAX
2.5
1
±1
1 V to
AV
DD
/2
2.5
1
±1
1 V to AV
DD
/2
V
MΩ min
μA max
V min/max
±1% for specified performance,
AV
DD
= 2 × REFIN + 50 mV
Typically 100 MΩ
Typically ±30 nA
Output Voltage
Reference TC
Output Impedance
OUTPUT CHARACTERISTICS
2
Output Voltage Range
4
Short-Circuit Current
Load Current
Capacitive Load Stability
R
L
= ∞
R
L
= 5 kΩ
DC Output Impedance
MONITOR OUTPUT PIN
Output Impedance
Three-State Leakage Current
LOGIC INPUTS
2
V
IH
, Input High Voltage
V
IL
, Input Low Voltage
Input Current
Pin Capacitance
2.495/2.505
1.22/1.28
±10
±15
2.2
0/AV
DD
40
±1
200
1000
0.5
500
100
2
0.8
±10
10
2.495/2.505
1.22/1.28
±10
±15
2.2
0/AV
DD
40
±1
200
1000
0.5
500
100
2
0.8
±10
10
V min/max
V min/max
ppm max
ppm max
kΩ typ
V min/max
mA max
mA max
pF max
pF max
Ω max
Ω typ
nA typ
Enabled via internal/external bit in control
register; REF select bit in control register
selects the reference voltage
At ambient, optimized for 2.5 V operation
At ambient when 1.25 V reference is selected
Temperature range: 25°C to 85°C
Temperature range: −40°C to +85°C
DV
DD
= 2.7 V to 5.5 V
V min
V max
μA max
pF max
Total for all pins, T
A
= T
MIN
to T
MAX
Rev. B | Page 4 of 44
