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High Common-Mode Voltage,
Difference Amplifier
AD629
FEATURES
Improved replacement for: INA117P and INA117KU
±270 V common-mode voltage range
Input protection to
±500 V common mode
±500 V differential mode
Wide power supply range (±2.5 V to ±18 V)
±10 V output swing on ±12 V supply
1 mA maximum power supply current
HIGH ACCURACY DC PERFORMANCE
3 ppm maximum gain nonlinearity (AD629B)
20 μV/°C maximum offset drift (AD629A)
10 μV/°C maximum offset drift (AD629B)
10 ppm/°C maximum gain drift
EXCELLENT AC SPECIFICATIONS
77 dB minimum CMRR @ 500 Hz (AD629A)
86 dB minimum CMRR @ 500 Hz (AD629B)
500 kHz bandwidth
FUNCTIONAL BLOCK DIAGRAM
REF(–)
1
–IN
2
+IN
3
–V
S
4
21.1kΩ
380kΩ
380kΩ
20kΩ
380kΩ
8
7
6
5
NC
+V
S
OUTPUT
REF(+)
00783-001
AD629
NC = NO CONNECT
Figure 1.
GENERAL DESCRIPTION
The AD629 is a difference amplifier with a very high input,
common-mode voltage range. It is a precision device that allows
the user to accurately measure differential signals in the
presence of high common-mode voltages up to ±270 V.
The AD629 can replace costly isolation amplifiers in
applications that do not require galvanic isolation. The device
operates over a ±270 V common-mode voltage range and has
inputs that are protected from common-mode or differential
mode transients up to ±500 V.
The AD629 has low offset, low offset drift, low gain error drift,
low common-mode rejection drift, and excellent CMRR over a
wide frequency range.
The AD629 is available in die and packaged form featuring
8-lead PDIP and 8-lead SOIC packages. For all packages
(including die) and grades, performance is guaranteed over
the industrial temperature range of −40°C to +85°C.
APPLICATIONS
High voltage current sensing
Battery cell voltage monitors
Power supply current monitors
Motor controls
Isolation
100
COMMON-MODE REJECTION RATIO (dB)
95
2mV/DIV
85
80
75
70
65
60
00783-002
OUTPUT ERROR (2mV/DIV)
90
55
50
20
100
1k
FREQUENCY (Hz)
10k
60V/DIV
–240
–120
0
120
COMMON-MODE VOLTAGE (V)
240
20k
Figure 2. Common-Mode Rejection Ratio vs. Frequency
Figure 3. Error Voltage vs. Input Common-Mode Voltage
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©1999-2011 Analog Devices, Inc. All rights reserved.
00783-003
AD629
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ...................................................................... 10
Applications..................................................................................... 11
Basic Connections...................................................................... 11
Single-Supply Operation ........................................................... 11
System-Level Decoupling and Grounding.............................. 11
Using a Large Sense Resistor..................................................... 12
Output Filtering.......................................................................... 12
Output Current and Buffering.................................................. 13
A Gain of 19 Differential Amplifier......................................... 13
Error Budget Analysis Example 1 ............................................ 13
Error Budget Analysis Example 2 ............................................ 14
Outline Dimensions ....................................................................... 15
Ordering Guide .......................................................................... 16
REVISION HISTORY
4/11—Rev. B to Rev. C
Changes to General Description Section ...................................... 1
Added Endnote 1 in Table 1............................................................ 3
Added Figure 5; Renumbered Sequentially .................................. 4
Added Table 3; Renumbered Sequentially .................................... 4
Added Pin Configuration and Function Descriptions Section,
Figure 6, and Table 4 ........................................................................ 5
Changes to Ordering Guide .......................................................... 16
3/07—Rev. A to Rev. B
Updated Format and Layout .............................................Universal
Changes to Ordering Guide .......................................................... 15
3/00—Rev. 0 to Rev. A
10/99—Revision 0: Initial Version
Rev. C | Page 2 of 16
AD629
SPECIFICATIONS
T
A
= 25°C, V
S
= ±15 V, unless otherwise noted.
Table 1.
Parameter
GAIN
Nominal Gain
Gain Error
Gain Nonlinearity
Gain vs. Temperature
OFFSET VOLTAGE
Offset Voltage
vs. Temperature
vs. Supply (PSRR)
INPUT
Common-Mode Rejection Ratio
Condition
V
OUT
= ±10 V, R
L
= 2 kΩ
Min
AD629A
1
Typ
Max
1
0.01
4
1
3
0.2
V
S
= ±5 V
T
A
= T
MIN
to T
MAX
V
S
= ±5 V to ± 15 V
V
CM
= ±250 V dc
T
A
= T
MIN
to T
MAX
V
CM
= 500 V p-p, dc to 500 Hz
V
CM
= 500 V p-p, dc to 1 kHz
Common mode
Differential
Common mode
Differential
R
L
= 10 kΩ
R
L
= 2 kΩ
V
S
= ±12 V, R
L
= 2 kΩ
Stable operation
6
100
88
Min
AD629B
Typ
Max
1
0.01
4
1
3
0.1
3
110
96
Unit
V/V
%
ppm
ppm
ppm/°C
mV
mV
μV/°C
dB
dB
dB
dB
dB
V
V
kΩ
kΩ
V
V
V
mA
pF
kHz
V/μs
kHz
μs
μs
μs
μV p-p
nV/√Hz
±18
1
V
mA
mA
°C
0.05
10
10
1
20
90
86
82
86
±270
±13
R
L
= 10 kΩ
T
A
= T
MIN
to T
MAX
0.03
10
3
10
0.5
1
10
84
77
73
77
88
90
±270
±13
200
800
±13
±12.5
±10
Operating Voltage Range
Input Operating Impedance
OUTPUT
Operating Voltage Range
200
800
±13
±12.5
±10
±25
1000
500
2.1
28
15
12
5
15
550
±2.5
±18
1
±2.5
1000
Output Short-Circuit Current
Capacitive Load
DYNAMIC RESPONSE
Small Signal –3 dB Bandwidth
Slew Rate
Full Power Bandwidth
Settling Time
±25
1.7
V
OUT
= 20 V p-p
0.01%, V
OUT
= 10 V step
0.1%, V
OUT
= 10 V step
0.01%, V
CM
= 10 V step, V
DIFF
= 0 V
1.7
500
2.1
28
15
12
5
15
550
OUTPUT NOISE VOLTAGE
0.01 Hz to 10 Hz
Spectral Density, ≥100 Hz
2
POWER SUPPLY
Operating Voltage Range
Quiescent Current
TEMPERATURE RANGE
For Specified Performance
1
2
V
OUT
= 0 V
T
MIN
to T
MAX
T
A
= T
MIN
to T
MAX
−40
0.9
1.2
0.9
1.2
−40
+85
+85
Specifications for the AD629 A grade are also valid for the die model (listed in the Ordering Guide as AD629AC-WP).
See Figure 21.
Rev. C | Page 3 of 16
AD629
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Supply Voltage, V
S
Internal Power Dissipation
1
8-Lead PDIP (N)
8-Lead SOIC (R)
Input Voltage Range, Continuous
Common-Mode and Differential, 10 sec
Output Short-Circuit Duration
Pin 1 and Pin 5
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering 60 sec)
1
1a
1b
Rating
±18 V
See Figure 4
See Figure 4
±300 V
±500 V
Indefinite
–V
S
− 0.3 V to +V
S
+ 0.3 V
150°C
−55°C to +125°C
−65°C to +150°C
300°C
2
7
Y
3
4
6b
6a
5a
X
DIE SIZE: 1655µm (X) by 2465µm (Y)
5b
00783-041
Specification is for device in free air:
8-Lead PDIP, θ
JA
= 100°C/W;
8-Lead SOIC, θ
JA
= 155°C/W.
Figure 5. Metallization Photograph
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
2.0
T
J
= 150°C
MAXIMUM POWER DISSIPATION (W)
8-LEAD PDIP
1.5
Table 3. Pin Pad Coordinates
Pad
1a
1b
2
3
4
5a
5b
6a
6b
Pin
REF(−)
Coordinates
1
X
Y
−677
+1082
−534
+1084
−661
−661
+680
+396
+538
+681
+681
+680
+939
−658
−800
−1084
−1084
−950
−807
+612
Description
For the die model, either
pad can be bonded because
1a and 1b are internally
shorted.
−IN
+IN
−V
S
REF(+)
1.0
OUTPUT
8-LEAD SOIC
0.5
00783-004
For the die model, either
pad can be bonded because
5a and 5b are internally
shorted.
For the die model, both
pads must be bonded
because 6a and 6b are not
internally shorted.
7
1
+V
S
0
–50 –40 –30 –20 –10 0 10 20 30 40 50 60
AMBIENT TEMPERATURE (°C)
70
80
90
All coordinates are with respect to the center of the die.
Figure 4. Maximum Power Dissipation vs. Temperature for SOIC and PDIP
ESD CAUTION
Rev. C | Page 4 of 16
