= 5 V 5%, AGND = DGND = 0 V, REF IN = 2.5 V. All specifications T
MIN
to T
MAX
,
unless otherwise noted.)
Y Version
Unit
Test Conditions/Comments
Sample Rate = 454.5 kSPS
3
(AD7891-1),
500 kSPS
3
(AD7891-2). Any channel.
A Version
1
B Version
70
70
–78
–80
–80
–80
–80
12
12
±
1
±
1
±
3
0.6
±
4
0.1
±
3
0.6
±
4
0.2
70
70
–78
–80
–80
–80
–80
12
12
±
0.75
±
1
±
3
0.6
±
4
0.1
±
3
0.6
±
4
0.2
70
70
–78
–80
–80
–80
–80
12
12
±
1
±
1
±
3
0.6
±
4
0.1
±
3
0.6
±
4
0.2
dB min
dB min
dB max
dB max
fa = 9 kHz, fb = 9.5 kHz.
dB typ
dB typ
dB max
Any channel.
Bits
Bits
LSB max
LSB max
LSB max
LSB typ
LSB max
LSB typ
LSB max
LSB typ
LSB max
LSB typ
1.5 LSB max.
Input ranges of 0 V to 2.5 V, 0 V to 5 V.
1 LSB max.
Input ranges of
±
2.5 V,
±
5 V,
±
10 V.
1.5 LSB max.
Input ranges of
±
2.5 V,
±
5 V,
±
10 V.
1.5 LSB max.
AD7891-1 V
INXA
Input Resistance
AD7891-1 V
INXA
Input Resistance
AD7891-2 Input Voltage Range
AD7891-2 V
INXA
Input Resistance
AD7891-2 V
INXA
Input Current
REFERENCE INPUT/OUTPUT
REF IN Input Voltage Range
Input Impedance
Input Capacitance
5
REF OUT Output Voltage
REF OUT Error @ 25∞C
T
MIN
to T
MAX
REF OUT Temperature Coefficient
REF OUT Output Impedance
LOGIC INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
INH
Input Capacitance
5
C
IN
±
5
±
10
7.5
15
0 to 2.5
0 to 5
±
2.5
1.5
±
50
2.375/2.625
1.6
10
2.5
±
10
±
20
25
5
2.4
0.8
±
10
10
±
5
±
10
7.5
15
0 to 2.5
0 to 5
±
2.5
1.5
±
50
2.375/2.625
1.6
10
2.5
±
10
±
20
25
5
2.4
0.8
±
10
10
V
V
kW min
kW min
V
V
V
kW min
nA max
V min/V max
kW min
pF max
V nom
mV max
mV max
ppm/∞C typ
kW nom
V min
V max
mA
max
pF max
Input applied to both V
INXA
and V
INXB
.
Input applied to V
INXA
, V
INXB
= AGND.
Input range of
±
5 V.
Input range of
±
10 V.
Input applied to both V
INXA
and V
INXB
.
Input applied to V
INXA
, V
INXB
= AGND.
Input applied to V
INXA
, V
INXB
= REF IN
6
.
Input ranges of
±
2.5 V and 0 V to 5 V.
Input range of 0 V to 2.5 V.
2.5 V
±
5%.
Resistor connected to internal reference node.
See REF IN input impedance.
V
DD
= 5 V
±
5%.
V
DD
= 5 V
±
5%.
–2–
REV. D
AD7891
Parameter
LOGIC OUTPUTS
Output High Voltage, V
OH
Output Low Voltage, V
OL
DB11to DB0
Floating-State Leakage Current
Floating-State Capacitance
5
Output Coding
A Version
1
4.0
0.4
±
10
15
B Version
4.0
0.4
±
10
15
Y Version
4.0
0.4
±
10
15
Unit
V min
V max
mA
max
pF max
Data format bit of control register = 0.
Data format bit of control register = 1.
1.6
0.6
0.7
0.4
5
21
80
105
400
ms
max
ms
max
ms
max
ms
max
V nom
mA max
mA
max
mW max
mW
max
Test Conditions/Comments
I
SOURCE
= 200
mA.
I
SINK
= 1.6 mA.
Straight (Natural) Binary
Twos Complement
CONVERSION RATE
Conversion Time
Track/Hold Acquisition Time
1.6
0.6
0.7
0.4
5
20
80
100
400
1.6
0.6
0.7
0.4
5
20
80
100
400
AD7891-1 hardware conversion.
AD7891-1 software conversion.
AD7891-2.
±
5% for specified performance.
POWER REQUIREMENTS
V
DD
I
DD
Normal Mode
Standby Mode
Power Dissipation
Normal Mode
Standby Mode
Logic inputs = 0 V or V
DD
.
V
DD
= 5 V.
Typically 82 mW.
Typically 75
mW.
NOTES
1
Temperature ranges for the A and B Versions: –40∞C to +85∞C. Temperature range for the Y Version: –55∞C to +105∞C.
2
The AD7891-1’s dynamic performance (THD and SNR) and the AD7891-2’s THD are measured with an input frequency of 10 kHz. The AD7891-2’s SNR is
evaluated with an input frequency of 100 kHz.
3
This throughput rate can only be achieved when the part is operated in the parallel interface mode. Maximum achievable throughput rate in the serial interface mode
is 357 kSPS.
4
See the Terminology section.
5
Sample tested during initial release and after any redesign or process change that may affect this parameter.
6
REF IN must be buffered before being applied to V
INXB
.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*
(T
A
= 25∞C, unless otherwise noted)
V
DD
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
V
DD
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7891 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
REV. D
–3–
AD7891
TIMING CHARACTERISTICS
1, 2
Parameter
t
CONV
Parallel Interface
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9 3
t
104
Serial Interface
t
11
t
123
t
13
t
14
t
153
t
163
t
17
t
184
t
18A4
t
19
t
20
t
21
t
22
A, B, Y Versions
1.6
0
35
25
5
0
35
55
35
25
5
30
30
20
25
25
5
15
20
0
30
0
30
20
15
10
30
Unit
ms
max
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns max
ns min
ns max
ns min
ns min
ns min
ns max
ns min
ns min
ns max
ns min
ns max
ns min
ns min
ns min
ns min
Test Conditions/Comments
Conversion Time
CS
to
RD/WR
Setup Time
Write Pulse Width
Data Valid to Write Setup Time
Data Valid to Write Hold Time
CS
to
RD/WR
Hold Time
CONVST
Pulse Width
EOC
Pulse Width
Read Pulse Width
Data Access Time after Falling Edge of
RD
Bus Relinquish Time after Rising Edge of
RD
RFS
Low to SCLK Falling Edge Setup Time
RFS
Low to Data Valid Delay
SCLK High Pulse Width
SCLK Low Pulse Width
SCLK Rising Edge to Data Valid Hold Time
SCLK Rising Edge to Data Valid Delay
RFS
to SCLK Falling Edge Hold Time
Bus Relinquish Time after Rising Edge of
RFS
Bus Relinquish Time after Rising Edge of SCLK
TFS
Low to SCLK Falling Edge Setup Time
Data Valid to SCLK Falling Edge Setup Time
Data Valid to SCLK Falling Edge Hold Time
TFS
Low to SCLK Falling Edge Hold Time
NOTES
1
Sample tested during initial release and after any redesign or process change that may affect this parameter. All input signals are measured with tr = tf = 1 ns (10% to
90% of 5 V) and timed from a voltage level of 1.6 V.
2
See Figures 2, 3, and 4.
3
Measured with the load circuit of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.4 V.
4
These times are derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 1. The measured number is then
extrapolated back to remove the effects of charging or discharging the 50 pF capacitor. This means that the times quoted in the timing characteristics are the true bus
relinquish times of the part and as such are independent of external bus loading capacitances.
Specifications subject to change without notice.
1.6mA
TO
OUTPUT
PIN
1.6V
50pF
200 A
Figure 1. Load Circuit for Access Time and Bus Relinquish Time
–4–
REV. D
AD7891
ORDERING GUIDE
Model
AD7891ACHIPS-1
AD7891ACHIPS-2
AD7891AS-1
AD7891ASZ-1
2
AD7891AP-1
AD7891AP-1REEL
AD7891BS-1
AD7891BP-1
AD7891BP-1REEL
AD7891YS-1
AD7891YS-1REEL
AD7891YP-1
AD7891YP-1REEL
AD7891AS-2
AD7891ASZ-2
2
AD7891AP-2
AD7891AP-2REEL
AD7891BS-2
AD7891BP-2
AD7891BP-2REEL
AD7891YS-2
AD7891YS-2REEL
EVAL-AD7891-1CB
EVAL-AD7891-2CB
Input Range
Relative
Sample Rate Accuracy
Temperature
Range
Package Option
1
DIE
DIE
S-44
S-44
P-44A
P-44A
S-44
P-44A
P-44A
S-44
S-44
P-44A
P-44A
S-44
S-44
P-44A
P-44A
S-44
P-44A
P-44A
S-44
S-44
Evaluation Board
Evaluation Board
±
5 V or
±
10 V
±
5 V or
±
10 V
±
5 V or
±
10 V
±
5 V or
±
10 V
±
5 V or
±
10 V
±
5 V or
±
10 V
±
5 V or
±
10 V
±
5 V or
±
10 V
±
5 V or
±
10 V
±
5 V or
±
10 V
±
5 V or
±
10 V
0 V to +5 V, 0 V to +2.5 V,
±
2.5 V
0 V to +5 V, 0 V to +2.5 V,
±
2.5 V
0 V to +5 V, 0 V to +2.5 V,
±
2.5 V
0 V to +5 V, 0 V to +2.5 V,
±
2.5 V
0 V to +5 V, 0 V to +2.5 V,
±
2.5 V
0 V to +5 V, 0 V to +2.5 V,
±
2.5 V
0 V to +5 V, 0 V to +2.5 V,
±
2.5 V
0 V to +5 V, 0 V to +2.5 V,
±
2.5 V
0 V to +5 V, 0 V to +2.5 V,
±
2.5 V
454 kSPS
454 kSPS
454 kSPS
454 kSPS
454 kSPS
454 kSPS
454 kSPS
454 kSPS
454 kSPS
454 kSPS
454 kSPS
500 kSPS
500 kSPS
500 kSPS
500 kSPS
500 kSPS
500 kSPS
500 kSPS
500 kSPS
500 kSPS
±
1 LSB
±
1 LSB
±
1 LSB
±
1 LSB
±
0.75 LSB
±
0.75 LSB
±
0.75 LSB
±
1 LSB
±
1 LSB
±
1 LSB
±
1 LSB
±
1 LSB
±
1 LSB
±
1 LSB
±
1 LSB
±
0.75 LSB
±
0.75 LSB
±
0.75 LSB
±
1 LSB
±
1 LSB
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
–55∞C to +105∞C
–55∞C to +105∞C
–55∞C to +105∞C
–55∞C to +105∞C
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
–55∞C to +105∞C
–55∞C to +105∞C
NOTES
1
S = Plastic Quad Flatpack (MQFP); P = Plastic Leaded Chip Carrier (PLCC).
