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ADC0804S030TS/C1:1

IC adc 8bit par 30mhz 28-ssop

器件类别:模拟混合信号IC    转换器   

厂商名称:NXP(恩智浦)

厂商官网:https://www.nxp.com

器件标准:

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器件参数
参数名称
属性值
是否无铅
不含铅
是否Rohs认证
符合
厂商名称
NXP(恩智浦)
零件包装代码
SSOP
包装说明
5.30 MM, PLASTIC, MO-150, SOT341-1, SSOP-28
针数
28
Reach Compliance Code
unknown
ECCN代码
EAR99
最大模拟输入电压
2.55 V
最小模拟输入电压
1.7 V
转换器类型
ADC, RESISTANCE LADDER
JESD-30 代码
R-PDSO-G28
JESD-609代码
e4
长度
10.2 mm
最大线性误差 (EL)
0.1953%
湿度敏感等级
1
模拟输入通道数量
1
位数
8
功能数量
1
端子数量
28
最高工作温度
70 °C
最低工作温度
输出位码
BINARY, 2\'S COMPLEMENT BINARY
输出格式
PARALLEL, 8 BITS
封装主体材料
PLASTIC/EPOXY
封装代码
SSOP
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度)
260
认证状态
Not Qualified
采样速率
30 MHz
座面最大高度
2 mm
标称供电电压
5 V
表面贴装
YES
温度等级
COMMERCIAL
端子面层
NICKEL PALLADIUM GOLD
端子形式
GULL WING
端子节距
0.65 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
30
宽度
5.3 mm
Base Number Matches
1
文档预览
ADC0804S030/040/050
Single 8 bits ADC, up to 30 MHz, 40 MHz or 50 MHz
Rev. 02 — 14 August 2008
Product data sheet
1. General description
The ADC0806030/040/050 are a family of 8-bit high-speed, low-power Analog-to-Digital
Converters (ADC) for professional video and other applications. It converts the analog
input signal into 8-bit binary coded digital signals at a maximum sampling rate of 50 MHz.
All digital inputs and outputs are Transistor-Transistor Logic (TTL) and CMOS compatible,
although a low-level sine wave clock input signal can also be used.
The device requires an external source to drive its reference ladder. If the application
requires that the reference is driven via internal sources, NXP recommends you use one
of the ADC1003S030/040/050 family.
2. Features
I
I
I
I
I
I
I
I
I
I
I
I
I
I
8-bit resolution
Sampling rate up to 50 MHz
DC sampling allowed
One clock cycle conversion only
High signal-to-noise ratio over a large analog input frequency range (7.8 effective bits
at 4.43 MHz full-scale input at f
clk
= 40 MHz)
No missing codes guaranteed
In-Range (IR) CMOS output
TTL and CMOS levels compatible digital inputs
3 V to 5 V CMOS digital outputs
Low-level AC clock input signal allowed
External reference voltage regulator
Power dissipation only 175 mW (typical)
Low analog input capacitance, no buffer amplifier required
No sample-and-hold circuit required
3. Applications
I
I
I
I
I
I
I
Video data digitizing
Radar
Transient signal analysis
Σ∆
modulators
Medical imaging
Barcode scanner
Global Positioning System (GPS) receiver
NXP Semiconductors
ADC0804S030/040/050
Single 8 bits ADC, up to 30 MHz, 40 MHz or 50 MHz
I
Cellular base stations
4. Quick reference data
Table 1.
Quick reference data
V
CCA
= V3 to V4 = 4.75 V to 5.25 V; V
CCD
= V11 to V12 and V28 to V27 = 4.75 V to 5.25 V;
V
CCO
= V13 to V14 = 3.0 V to 5.25 V; AGND and DGND shorted together; T
amb
= 0
°
C to 70
°
C;
typical values measured at V
CCA
= V
CCD
= 5 V and V
CCO
= 3.3 V, V
i(a)(p-p)
= 2.0 V; C
L
= 15 pF and
T
amb
= 25
°
C; unless otherwise specified.
Symbol
V
CCA
V
CCD
V
CCO
I
CCA
I
CCD
I
CCO
INL
DNL
f
clk(max)
Parameter
analog supply voltage
digital supply voltage
output supply voltage
analog supply current
digital supply current
output supply current
integral non-linearity
differential non-linearity
maximum clock
frequency
f
clk
= 40 MHz;
ramp input
f
clk
= 40 MHz
ramp input
f
clk
= 40 MHz
ramp input
ADC0804S030TS
ADC0804S040TS
ADC0804S050TS
P
tot
total power dissipation
f
clk
= 40 MHz;
ramp input
Conditions
Min
4.75
4.75
3.0
-
-
-
-
-
30
40
50
-
Typ
5.0
5.0
3.3
18
16
1
±0.2
±0.12
-
-
-
175
Max
5.25
5.25
5.25
24
21
2
±0.5
±0.22
-
-
-
247
Unit
V
V
V
mA
mA
mA
LSB
LSB
MHz
MHz
MHz
mW
5. Ordering information
Table 2.
Ordering information
Package
Name
ADC0804S030TS
ADC0804S040TS
ADC0804S050TS
SSOP28
SSOP28
SSOP28
Description
plastic shrink small outline package; 28 leads;
body width 5.3 mm
plastic shrink small outline package; 28 leads;
body width 5.3 mm
plastic shrink small outline package; 28 leads;
body width 5.3 mm
Version
Sampling
frequency
(MHz)
Type number
SOT341-1 30
SOT341-1 40
SOT341-1 50
ADC0804S030_040_050_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 14 August 2008
2 of 19
NXP Semiconductors
ADC0804S030/040/050
Single 8 bits ADC, up to 30 MHz, 40 MHz or 50 MHz
6. Block diagram
V
CCA
3
CLK
1
V
CCD2
11
OE
10
CLOCK DRIVER
RT
9
2
TC
25 D7
24 D6
R
lad
analog
voltage input
VI
8
ANALOG - TO - DIGITAL
CONVERTER
LATCHES
CMOS
OUTPUTS
23 D5
22 D4
21 D3
20 D2
RM
7
19 D1
18 D0
MSB
data outputs
LSB
RB
6
13
V
CCO
ADC0804S030
IN-RANGE LATCH
CMOS OUTPUT
26
IR
output
28
4
AGND
analog ground
12
DGND2
digital ground
14
OGND
output ground
27
DGND1
V
CCD1
digital ground
014aaa550
Fig 1. Block diagram
ADC0804S030_040_050_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 14 August 2008
3 of 19
NXP Semiconductors
ADC0804S030/040/050
Single 8 bits ADC, up to 30 MHz, 40 MHz or 50 MHz
7. Pinning information
7.1 Pinning
CLK
TC
V
CCA
AGND
n.c.
RB
RM
VI
RT
1
2
3
4
5
6
7
8
9
28 V
CCD1
27 DGND1
26 IR
25 D7
24 D6
23 D5
22 D4
21 D3
20 D2
19 D1
18 D0
17 n.c.
16 n.c.
15 n.c.
014aaa551
ADC0804S
030TS
OE 10
V
CCD2
11
DGND2 12
V
CCO
13
OGND 14
Fig 2.
Pin configuration
7.2 Pin description
Table 3.
Symbol
CLK
TC
V
CCA
AGND
n.c.
RB
RM
VI
RT
OE
V
CCD2
DGND2
V
CCO
OGND
n.c.
n.c.
n.c.
D0
D1
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
Description
clock input
two’s complement input (active LOW)
analog supply voltage (5 V)
analog ground
not connected
reference voltage BOTTOM input
reference voltage MIDDLE
analog input voltage
reference voltage TOP input
output enable input (CMOS level input, active LOW)
digital supply voltage 2 (5 V)
digital ground 2
supply voltage for output stages (3 V to 5 V)
output ground
not connected
not connected
not connected
data output; bit 0 (Least Significant Bit (LSB))
data output; bit 1
ADC0804S030_040_050_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 14 August 2008
4 of 19
NXP Semiconductors
ADC0804S030/040/050
Single 8 bits ADC, up to 30 MHz, 40 MHz or 50 MHz
Pin description
…continued
Pin
20
21
22
23
24
25
26
27
28
Description
data output; bit 2
data output; bit 3
data output; bit 4
data output; bit 5
data output; bit 6
data output; bit 7 (Most Significant Bit (MSB))
in-range data output
digital ground 1
digital supply voltage 1 (5 V)
Table 3.
Symbol
D2
D3
D4
D5
D6
D7
IR
DGND1
V
CCD1
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CCA
V
CCD
V
CCO
∆V
CC
Parameter
analog supply voltage
digital supply voltage
output supply voltage
supply voltage difference
V
CCA
V
CCD
V
CCD
V
CCO
V
CCA
V
CCO
V
I
V
i(clk)(p-p)
I
O
T
stg
T
amb
T
j
[1]
Conditions
[1]
[1]
[1]
Min
−0.3
−0.3
−0.3
−1.0
−1.0
−1.0
−0.3
-
-
−55
−40
-
Max
+7.0
+7.0
+7.0
+1.0
+4.0
+4.0
+7.0
V
CCD
10
+150
+85
150
Unit
V
V
V
V
V
V
V
V
mA
°C
°C
°C
input voltage
peak-to-peak clock input
voltage
output current
storage temperature
ambient temperature
junction temperature
referenced to AGND
referenced to DGND
The supply voltages V
CCA
, V
CCD
and V
CCO
may have any value between
−0.3
V and +7.0 V provided that
the supply voltage differences
∆V
CC
are respected.
9. Thermal characteristics
Table 5.
Symbol
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from junction
to ambient
Conditions
in free air
Typ
110
Unit
K/W
ADC0804S030_040_050_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 14 August 2008
5 of 19
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参数对比
与ADC0804S030TS/C1:1相近的元器件有:ADC0804S040TS/C1:1、ADC0804S050TS/C1:1、ADC0804S050TS/C1'1、ADC0804S050TS-C11、TDA18254HN-C1557、ADC0804S030TS/C1'1、ADC0804S040TS/C1'1。描述及对比如下:
型号 ADC0804S030TS/C1:1 ADC0804S040TS/C1:1 ADC0804S050TS/C1:1 ADC0804S050TS/C1'1 ADC0804S050TS-C11 TDA18254HN-C1557 ADC0804S030TS/C1'1 ADC0804S040TS/C1'1
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