Quick start ADC1443D/53D DB
Evaluation board for ADC1443D/53D series
Rev 03.1 — 2 June 2014
Quick start
Document information
Info
Content
Keywords
Abstract
Overview
ADC1443D DB,ADC1453D DB, ADC1159D DB, Evaluation board,
JESD204B ADC, Kintex-7, BSX0254.
This document describes how to setup the demonstration board
ADC1443D/53D DB with the Xilinx Kintex-7 KC705 development board.
The ADC1443D/53DWO Evaluation board is available in 4 versions:
ADC1443D125WO-DB; ADC1443D160WO-DB; ADC1453D250WO-DB, ADC1159D250WO-DB.
HMSC-FMC adaptor board is required to easily interoperate with Kintex-7 FMC connector.
Revision history
Rev
0.1
3.0
3.1
Date
18 April 2012
14 Feb 2013
2 June 2014
Description
Initial version
Rebranding IDT
Update to support ADC1453D250 and ADC1159D250
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Integrated Device
Technology
1. Overview of the evaluation board ADC1443D/53DWO-DB
main 5V Power
supply
USB to SPI interface
Clock input
Analog inputs
Clock input
FMC (HPC)
Connector
Adapter
Quick start ADC1443D/53D DB
Fig 1. ADC1443D/53DxxxWO/DB overall presentation
ADC1443D/53Dxx
x
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Integrated Device
Technology
2. Switch and Jumpers default state
Scrambler off
Ext clock
3.3V
Quick start ADC1443D/53D DB
Fig 2. Overall presentation of default switches and jumpers
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Integrated Device
Technology
Quick start ADC1443D/53D DB
3. Board goal and general description
The ADC1443D/53DxxxWO/DB board along with Xilinx KC705 development board are
aimed to provide a full and complete set to evaluate and demonstrate the
ADC1x43D/53D series, analog to digital converters, compliant with JESD204B JEDEC
serialization standard.
The ADCs
The board embeds 2 dual ADC devices with option for each ADC to receive a separate
external clock input.
ADC1 inputs
Clock inputs
ADC2
( optional, on
request when
ordering EVB)
Fig 3.
Analog and clock inputs
Each ADC is dual channel and needs to be fed with single-ended input ( from SMA
connector).
Power supplies
The board embeds a 5V power supply connector.
.
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IV
Integrated Device
Technology
Quick start ADC1443D/53D DB
Fig 4. 5V DC power connector
Downloading the FPGA bit file
The FPGA code, in the form of a bit file, requires to be downloaded via the KC705
external JTAG connector.
Fig 5.
Xilinx KC705 JTAG connector
To download the Kintex-7 bit file, ISE Design Suite 13.3 or later is required from Xilinx, or
at a minimum the Xilinx ChipeScope Pro 64-bit version tool.
The FPGA is responsible for de-serializing the serial stream coming From the ADC,
according to the JESD204B standard.
.
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