a
FEATURES
External Temperature Measurement with Remote
Diode (Two Channels)
On-Chip Temperature Sensor
Interrupt and Over-Temperature Outputs
Fault Tolerant Fan Control
Brownout Detection
LDCM Support
System Management Bus (SMBus)
Standby Mode to Minimize Power Consumption
Limit Comparison of all Monitored Values
APPLICATIONS
Network Servers and Personal Computers
Microprocessor-Based Office Equipment
Test Equipment and Measuring Instruments
Low-Cost PC Temperature
Monitor and Fan Control ASIC
ADM1022
GENERAL DESCRIPTION
The ADM1022 is a low cost temperature monitor and fan con-
troller for microprocessor-based systems. The temperature of
one or two remote sensor diodes may be measured, allowing
monitoring of processor temperature in single- or dual-pro-
cessor systems.
Measured values can be read out via a serial System Manage-
ment Bus, and values for limit comparisons can be programmed
in over the same serial bus.
The ADM1022 also contains a DAC for fan speed control.
Automatic hardware temperature trip points are provided and
the fan will be driven to full speed if they are exceeded.
Finally, the chip has two supply voltage monitors for brownout
detection.
The ADM1022’s 3.0 V to 5.5 V supply voltage range, low supply
current, and SMBus interface make it ideal for a wide range of
applications. These include hardware monitoring and protection
applications in personal computers, electronic test equipment
and office electronics.
FUNCTIONAL BLOCK DIAGRAM
V
CC
V
MON
ADD/NTEST_OUT
RST1
RESET
GENERATOR 1
ADM1022
SERIAL BUS
INTERFACE
SDA
SCL
RST2
V
CC
20k
RESET
GENERATOR 2
ANALOG
OUTPUT
REGISTER
AND 8-BIT DAC
ADDRESS
POINTER
REGISTER
VALUE AND
LIMIT
REGISTERS
LIMIT
COMPARATORS
ADC
INTERRUPT
STATUS
REGISTERS
INT MASK
REGISTER
MASK
GATING
CONFIGURATION
REGISTER
FAN_SPD/NTEST_IN
MR
BANDGAP
TEMPERATURE
SENSOR
D1+
D1–
D2+/GPI
D2–/THERM
ANALOG
MULTIPLEXER
2.5V
BANDGAP
REFERENCE
INT
FAN_OFF
GND
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000
ADM1022–SPECIFICATIONS
(T = T
A
MIN
to T
MAX
, V
CC
= V
MIN
to V
MAX
, unless otherwise noted.)
Typ
1
3.30
1.4
Max
5.5
2.6
±
3
±
2
±
5
±
3
Unit
V
mA
°C
°C
°C
°C
°C
°C
µA
µA
ms
V
%
%
LSB
LSB
LSB
mA
mA
V
mV
µs
ns
µs
kΩ
V
ms
µs
V
V
I
OUT
= 3.0 mA
I
SINK
= 1.2 mA
V
CC
= V
TH
(MAX)
Test Conditions
Parameter
POWER SUPPLY
Supply Voltage, V
CC
Supply Current, I
CC
TEMPERATURE-TO-DIGITAL CONVERTER
Internal Sensor Accuracy
Resolution
External Diode Sensor Accuracy
Resolution
Remote Sensor Source Current
Total Monitoring Cycle Time, t
C
ANALOG OUTPUT
Output Voltage Range
Total Unadjusted Error, TUE
Full-Scale Error
Zero Error
Differential Nonlinearity, DNL
Integral Nonlinearity
Output Source Current
Output Sink Current
VOLTAGE MONITOR THRESHOLDS
Reset Threshold, V
MON
, V
CC
Hysteresis
MR
INPUT
MR
Minimum Pulsewidth, t
MR
MR
Glitch Immunity
MR
to
RST2
Propagation Delay, t
MD
MR
Pull-Up Resistance
RESET OUTPUTS,
RST1, RST2
Reset Output Voltage, V
OL
Reset Active Timeout Period, t
RP
V
CC
to Reset Delay, t
D
DIGITAL OUTPUT ADD/NTEST_OUT
2
Output High Voltage, V
OH
Output Low Voltage, V
OL
OPEN-DRAIN DIGITAL OUTPUTS
(INT,
THERM, RST2, RST1)
Output Low Voltage, V
OL
High Level Output Leakage Current, I
OH
OPEN-DRAIN SERIAL DATA
BUS OUTPUT (SDA)
Output Low Voltage, V
OL
High Level Output Leakage Current, I
OH
SERIAL BUS DIGITAL INPUTS
(SCL, SDA)
Input High Voltage, V
IH
Input Low Voltage, V
IL
Input Leakage Current
Hysteresis
Min
3.0
Interface Inactive, ADC Active
±
1
1
T
A
= 85°C, Tested at Wafer Sort
T
A
= 85°C, Tested at Wafer Sort
High Level (D+ = D– +0.65 V)
Low Level (D+ = D– +0.65 V)
60
3.5
1
90
5.5
130
7.5
200
2.5
±
5
±
3
±
1
0
±
1
±
2
±
1
2
1
2.85
2.925
50
I
L
= 2 mA
No Load
Monotonic by Design
3.00
Measured with V
CC
Falling
10
100
0.5
20
10
30
0.3
140
180
20
560
2.4
0.4
0.1
0.4
1
V
µA
I
OUT
= –3.0 mA
V
OUT
= V
CC
0.1
0.4
1
V
µA
I
OUT
= –3.0 mA
V
OUT
= V
CC
2.1
0.8
±
5
500
V (min)
V (max)
µA
mV
–2–
REV. 0
ADM1022
Parameter
DIGITAL INPUT LOGIC LEVELS
(FAN_SPD/NTEST_IN,
ADD/NTEST_OUT,
MR,
GPI)
Input High Voltage, V
IH
Input Low Voltage, V
IL
DIGITAL INPUT LEAKAGE CURRENT
(ALL DIGITAL INPUTS)
Input High Current, I
IH
Input Low Current, I
IL
Input Capacitance, C
IN
SERIAL BUS TIMING
3
Clock Frequency, f
SCLK
Glitch Immunity, t
SW
Bus Free Time, t
BUF
Start Setup Time, t
SU:STA
Start Hold Time, t
HD:STA
Stop Condition Setup Time, t
SU:STO
SCL Low Time, t
LOW
SCL High Time, t
HIGH
SCL, SDA Rise Time, t
R
SCL, SDA Fall Time, t
F
Data Setup Time, t
SU:DAT
Data Hold Time, t
HD:DAT
Min
Typ
Max
Unit
Test Conditions
2.2
0.8
V
V
–1
–0.005
+0.005
5
+1
µA
µA
pF
kHz
ns
µs
ns
ns
ns
µs
µs
ns
ns
ns
ns
V
IN
= V
CC
V
IN
= 0
400
50
1.3
600
600
600
1.3
0.6
300
300
100
300
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
NOTES
1
Typicals are at T
A
= 25°C and represent most likely parametric norm. Standby current typ is measured with V
CC
= 3.3 V.
2
ADD is a three-state input that may be pulled high, low or left open-circuit.
3
Timing specifications are tested at logic levels of V
IL
= 0.8 V for a falling edge and V
IH
= 2.2 V for a rising edge.
Specifications subject to change without notice.
t
HD;STA
t
LOW
SCL
t
R
t
F
t
HD;STA
SDA
t
HD;DAT
t
HIGH
t
SU;DAT
t
SU;STA
t
SU;STO
t
BUF
P
S
S
P
Figure 1. Diagram for Serial Bus Timing
REV. 0
–3–
ADM1022
ABSOLUTE MAXIMUM RATINGS*
Positive Supply Voltage (V
CC
) . . . . . . . . . . . . . . . . . . . . . 6.5 V
Voltage On Digital Inputs Except Therm . . . –0.3 V to +6.5 V
Voltage On Therm Pin . . . . . . . . . . . . .–0.3 V to V
CC
+ 0.3 V
Voltage on Any Other Input
or Output Pin . . . . . . . . . . . . . . . . . . .–0.3 V to V
CC
+ 0.3 V
Input Current at Any Pin . . . . . . . . . . . . . . . . . . . . . . .
±
5 mA
Package Input Current . . . . . . . . . . . . . . . . . . . . . . .
±
20 mA
Maximum Junction Temperature (T
J
max) . . . . . . . . . . 150°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature, Soldering
Vapor Phase 60 sec . . . . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared 15 sec . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200°C
ESD Rating (Human Body Model) . . . . . . . . . . . . . . . 4000 V
*Stresses
above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
THERMAL CHARACTERISTICS
16-Lead QSOP Package
θ
JA
= 105°C/W
θ
JA
= 39°C/W
ORDERING GUIDE
Model
Temperature
Range
Package
Description
16-Lead QSOP
Package
Option
RQ-16
ADM1022ARQ 0°C to 85°C
PIN CONFIGURATION
FAN_OFF
1
MR
2
RST1
3
GND
4
16
SDA
15
SCL
14
INT
13
ADD/NTEST_OUT
TOP VIEW
V
CC 5
(Not to Scale)
12
D2+/GPI
11
ADM1022
V
MON 6
RST2
7
D2–/THERM
10
D1+
9
FAN_SPD/NTEST_IN
8
D1–
–4–
REV. 0
ADM1022
PIN FUNCTION DESCRIPTION
Pin
No. Mnemonic
1
FAN_OFF
Description
Digital Output (Open-Drain) Fan Off Request. When asserted low this indicates a request to shut
off the fan independent of the FAN_SPD output. When negated (output FET off) it indicates that
the fan may be turned on.
Digital Input, Manual Reset. A logic low on this input causes
RST2
to be asserted. Once this input
is negated that output will remain asserted for t
RP
. This input has an internal 20 kΩ pull-up resistor.
Leave unconnected if not used.
Digital I/O (Open-Drain). This pin is asserted low while V
CC
remains below the reset threshold. It
remains asserted for t
RP
after the reset condition is terminated. It is bidirectional so the ADM1022 can
be optionally reset; external logic must be used to prevent system auxiliary reset from occurring
when used as an input.
GROUND. Power and Signal Ground.
POWER 3.3 V. Power source and voltage monitor input for first reset generator.
Analog Input. Voltage monitor input for second reset generator.
Digital Output (Open-Drain). This pin is asserted low under any of the following conditions:
– V
MON
or V
CC
remains below the reset threshold
– while
MR
is held low
– while
RST1
is asserted.
It remains asserted for t
RP
after the reset conditions are terminated.
Analog Output/Test Input. An active-high input that enables NAND board-level connectivity testing.
Refer to section on NAND testing. Used as an analog output for fan speed control when NAND
test is not selected.
Remote Thermal Diode Negative Input. This is the negative input (current sink) from the remote
thermal diode. This also serves as the negative input into the A/D.
Remote Thermal Diode Positive Input. This is the positive input (current source) from the remote
thermal diode. This serves as the positive input into the A/D.
Analog Input/Digital I/O (Open-Drain). Can be programmed as negative input for a second diode
temperature sensor, or as a digital I/O pin. In this case it is an active low thermal overload output
that indicates a violation of a temperature set point (over-temperature). Also acts as an input to
provide external fan control. When this pin is pulled low by an external signal, a status bit is set and
the fan speed is set to full on.
Analog/Digital Input. Can be programmed as the positive input for a second diode sensor, or as a
general-purpose logic input. In this case it can be programmed as an active high or active low input
that sets Bit 4 of the Status Registers. This bit can only be reset by reading the status registers, pro-
vided GPI is in the inactive state.
Digital I/O. The lowest order programmable bit of the SMBus Address. ADD is sampled at power-
up and changing it while powered on will have no immediate effect. This pin also functions as an
output when doing a NAND test.
Digital Output (Open Drain), System Interrupt Output. This signal indicates a violation of a set
trip point. The output is enabled when Bit 1 of the Configuration Register is set to 1. The default
state is disabled.
Digital Input SMBus Clock.
Digital I/O (Open-Drain) SMBus Bidirectional Data.
2
MR
3
RST1
4
5
6
7
GND
V
CC
V
MON
RST2
8
FAN_SPD/NTEST_IN
9
10
11
D1–
D1+
D2–/THERM
12
D2+/GPI
13
ADD/NTEST_OUT
14
INT
15
16
SCL
SDA
REV. 0
–5–
