Changes to Ordering Guide .......................................................... 18
3/09—Rev. 0 to Rev. A
Changes to Table 2 ............................................................................ 4
Changes to Figure 18 to Figure 21 .................................................. 9
Changes to Figure 22 to 26 ............................................................ 10
7/08—Revision 0: Initial Version
Rev. C | Page 2 of 20
Data Sheet
SPECIFICATIONS
V
IN
= V
OUT
+ 0.4 V, V
BIAS
= 5 V, I
OUT
= 10 mA, C
IN
= 1
F,
C
OUT
= 1
F,
C
BIAS
= 1
F,
T
A
= 25°C, unless otherwise noted.
Table 1.
Parameter
INPUT VOLTAGE RANGE
BIAS VOLTAGE RANGE
OPERATING SUPPLY CURRENT
Symbol
V
IN
V
BIAS
I
VIN1
Conditions
T
J
= −40°C to +125°C
T
J
= −40°C to +125°C
I
OUT
= 0 μA
I
OUT
= 0 μA, T
J
= −40°C to +125°C
I
OUT
= 1 mA
I
OUT
= 1 mA, T
J
= −40°C to +125°C
I
OUT
= 100 mA
I
OUT
= 100 mA, T
J
= −40°C to +125°C
I
OUT
= 350 mA
I
OUT
= 350 mA, T
J
= −40°C to +125°C
T
J
= −40°C to +125°C
EN = GND
EN = GND, T
J
= −40°C to +85°C
EN = GND, T
J
= +85°C to +125°C
EN = GND
EN = GND, T
J
= −40°C to +125°C
I
OUT
= 10 mA
1 mA < I
OUT
< 350 mA, V
IN
= (V
OUT
+ 0.4 V) to 3.6 V
1 mA < I
OUT
< 350 mA, V
IN
= (V
OUT
+ 0.4 V) to 3.6 V,
T
J
= −40°C to +125°C
V
IN
= (V
OUT
+ 0.4 V) to 3.6 V, T
J
= –40°C to +125°C
I
OUT
= 10 mA to 350 mA
I
OUT
= 10 mA to 350 mA, T
J
= −40°C to +125°C
I
OUT
= 10 mA, V
BIAS
= 2.3 V, V
OUT
= 3 V
I
OUT
= 10 mA, V
BIAS
= 2.3 V, V
OUT
= 3 V,
T
J
= −40°C to +125°C
I
OUT
= 100 mA, V
BIAS
= 2.3 V, V
OUT
= 3 V
I
OUT
= 100 mA, V
BIAS
= 2.3 V, V
OUT
= 3 V,
T
J
= −40°C to +125°C
I
OUT
= 350 mA, V
BIAS
= 2.3 V, V
OUT
= 3 V
I
OUT
= 350 mA, V
BIAS
= 2.3 V, V
OUT
= 3 V,
T
J
= −40°C to +125°C
V
OUT
= 1.2 V
Min
1.2
2.3
Typ
ADP130
Max
3.6
5.5
44
25
40
58
100
130
160
220
16
28
0.1
1.0
20
0.1
−1
−2
−3
−0.10
0.001
0.005
2
3.5
17
28
70
100
200
550
150
15
1.2
0.4
0.1
1
2.1
1.5
180
1.0
+1
+2
+3
+0.10
BIAS OPERATING CURRENT
SHUTDOWN CURRENT
I
BIAS
I
SD-VIN
I
SD-VBIAS
FIXED OUTPUT VOLTAGE ACCURACY
V
OUT
Unit
V
V
μA
μA
μA
μA
μA
μA
μA
μA
μA
μA
μA
μA
μA
μA
μA
%
%
%
%/ V
%/mA
%/mA
mV
mV
mV
mV
mV
mV
μs
mA
C
C
V
V
μA
μA
V
V
mV
LINE REGULATION
LOAD REGULATION
2
DROPOUT VOLTAGE
3
∆V
OUT
/∆V
IN
∆V
OUT
/∆I
OUT
V
DROPOUT
START-UP TIME
4
CURRENT LIMIT THRESHOLD
5
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
EN INPUT
EN Input Logic High
EN Input Logic Low
EN Input Leakage Current
UNDERVOLTAGE LOCKOUT
Input Voltage Rising
Input Voltage Falling
Hysteresis
T
START-UP
I
LIMIT
TS
SD
TS
SD-HYS
V
IH
V
IL
V
I-LEAKAGE
UVLO
UVLO
RISE
UVLO
FALL
UVLO
HYS
400
T
J
rising
1000
2.3 V ≤ V
BIAS
≤ 5.5 V
2.3 V ≤ V
BIAS
≤ 5.5 V
EN = BIAS or GND
EN = BIAS or GND, T
J
= −40°C to +125°C
T
J
= −40°C to +125°C
T
J
= −40°C to +125°C
Rev. C | Page 3 of 20
ADP130
Parameter
OUTPUT NOISE
Symbol
OUT
NOISE
Conditions
10 Hz to 100 kHz, V
IN
= 3.6 V, V
OUT
= 0.8 V
10 Hz to 100 kHz, V
IN
= 3.6 V, V
OUT
= 1.2 V
10 Hz to 100 kHz, V
IN
= 3.6 V, V
OUT
= 1.5 V
10 Hz to 100 kHz, V
IN
= 3.6 V, V
OUT
= 2.5 V
10 Hz to 100 kHz, V
IN
= 3.6 V, V
OUT
= 3.0 V
Modulated bias, 10 kHz, V
OUT
= 3.0 V, V
IN
= 3.6 V,
V
BIAS
= 5 V
Modulated bias, 100 kHz, V
OUT
= 3.0 V, V
IN
= 3.6 V,
V
BIAS
= 5 V
Modulated V
IN
, 10 kHz, V
OUT
= 1.2 V, V
IN
= V
OUT
+ 1 V,
V
BIAS
= 5 V
Modulated V
IN
, 100 kHz, V
OUT
= 1.2 V, V
IN
= V
OUT
+ 1 V,
V
BIAS
= 5 V
Modulated V
IN
, 10 kHz, V
OUT
= 0.8 V, V
IN
= V
OUT
+ 1 V,
V
BIAS
= 5 V
Modulated V
IN
, 100 kHz, V
OUT
= 0.8 V, V
IN
= V
OUT
+ 1 V,
V
BIAS
= 5 V
Min
Typ
29
38
43
61
77
70
53
70
54
70
55
Data Sheet
Max
Unit
μV rms
μV rms
μV rms
μV rms
μV rms
dB
dB
dB
dB
dB
dB
POWER SUPPLY REJECTION RATIO
PSRR
1
2
I
VIN
= I
GND
− I
BIAS
, where I
GND
is the current flowing from the GND pin.
Based on an endpoint calculation using 1 mA and 350 mA loads.
3
Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output
voltages above 1.3 V.
4
Start-up time is defined as the time from the rising edge of EN to VOUT being at 90% of its nominal value.
5
Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 2.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 2.0 V, or 1.8 V.
INPUT AND OUTPUT CAPACITOR: RECOMMENDED SPECIFICATIONS
Table 2.
Parameter
MINIMUM INPUT AND OUTPUT CAPACITANCE
1
CAPACITOR ESR
1
Symbol
C
MIN
R
ESR
Conditions
T
A
= −40°C to +125°C
T
A
= −40°C to +125°C
Min
0.70
0.001
Typ
1
Max
1
Unit
μF
Ω
The minimum input and output capacitance should be >0.70 μF over the full range of operating conditions. The full range of operating conditions in the application
must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended. Y5V and
Z5U capacitors are not recommended for use with any LDO.
Rev. C | Page 4 of 20
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
VIN to GND
VBIAS to GND
EN to GND
VOUT to GND
Storage Temperature Range
Operating Temperature Range
Operating Junction Temperature
Lead Temperature (Soldering, 10 sec)
Rating
−0.3 V to +3.6 V
−0.3 V to +6 V
−0.3 V to VBIAS
−0.3 V to VIN
−65°C to +150°C
−40°C to +125°C
125°C
300°C
ADP130
The junction-to-ambient thermal resistance (θ
JA
) of the package
is based on modeling and calculation using a four-layer board.
The junction-to-ambient thermal resistance is highly dependent
on the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θ
JA
may vary, depending on
PCB material, layout, and environmental conditions. The specified
values of θ
JA
are based on a four-layer, 4 in × 3 in circuit board.
For details about board construction, refer to JEDEC JESD51-7.
Ψ
JB
is the junction-to-board thermal characterization parameter
with units of °C/W. Ψ
JB
of the package is based on modeling and
calculation using a four-layer board. The JEDEC JESD51-12
document,
Guidelines for Reporting and Using Package Thermal
Information,
states that thermal characterization parameters are
not the same as thermal resistances. Ψ
JB
measures the component
power flowing through multiple thermal paths rather than a single
path, as in thermal resistance (θ
JB
). Therefore, Ψ
JB
thermal paths
include convection from the top of the package as well as radiation
from the package, factors that make Ψ
JB
more useful in real world
applications. Maximum junction temperature (T
J
) is calculated
from the board temperature (T
B
) and power dissipation (P
D
), using
the following formula:
T
J
=
T
B
+ (P
D
×
Ψ
JB
)
Refer to the JEDEC JESD51-8 and JESD51-12 documents for
more detailed information about Ψ
JB
.
Stresses above those listed under absolute maximum ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply only individually, not in combi-
nation. The ADP130 may be damaged when junction temperature
limits are exceeded. Monitoring ambient temperature does not
guarantee that the junction temperature is within the specified
temperature limits. In applications with high power dissipation
and poor thermal resistance, the maximum ambient temperature
may need to be derated.
In applications with moderate power dissipation and low PCB
thermal resistance, the maximum ambient temperature can exceed
the maximum limit as long as the junction temperature is within
specification limits. The junction temperature (T
J
) of the device
is dependent on the ambient temperature (T
A
), the power
dissipation of the device (P
D
), and the junction-to-ambient thermal
resistance of the package (θ
JA
). T
J
is calculated using the
following formula:
T
J
=
T
A
+ (P
D
× θ
JA
)
THERMAL RESISTANCE
θ
JA
and Ψ
JB
are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
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