A
DVANCED
L
INEAR
D
EVICES,
I
NC.
ALD4706A/ALD4706B
ALD4706
QUAD ULTRA MICROPOWER RAIL-TO-RAIL CMOS OPERATIONAL AMPLIFIER
GENERAL DESCRIPTION
The ALD4706 is a quad monolithic CMOS ultra micropower high slew-rate
operational amplifier intended for a broad range of analog applications
using
±1V
to
±6V
dual power supply systems, as well as +2V to +12V
battery operated systems. All device characteristics are specified for +5V
single supply or
±2.5V
dual supply systems. Total supply current for four
operational amplifiers is 200µA maximum at 5V supply voltage. It is
manufactured with Advanced Linear Devices' enhanced ACMOS silicon
gate CMOS process.
The ALD4706 is designed to offer a trade-off of performance parameters
providing a wide range of desired specifications. It offers the popular
industry standard pin configuration of LM324 types and ICL7641 types.
The ALD4706 has been developed specifically for the +5V single supply or
±1V
to
±6V
dual supply user. Several important characteristics of the
device make application easier to implement at these voltages. First, each
operational amplifier can operate with rail-to-rail input and output voltages.
This means the signal input voltage and output voltage can be equal to or
near to the positive and negative supply voltages. This feature allows
numerous analog serial stages and flexibility in input signal bias levels.
Secondly, each device was designed to accommodate mixed applications
where digital and analog circuits may operate off the same power supply
or battery. Thirdly, the output stage can typically drive up to 25pF capacitive
and 20KΩ resistive loads. These features, combined with extremely low
input currents, high open loop voltage gain of 100V/mV, useful bandwidth
of 200KHz, a slew rate of 0.17V/µs, low power dissipation of 0.5mW, low
offset voltage and temperature drift, make the ALD4706 a versatile, ultra
micropower quad operational amplifier.
The ALD4706, designed and fabricated with silicon gate CMOS techno-
logy, offers 0.1pA typical input bias current. Due to low voltage and low
power operation, reliability and operating characteristics, such as input
bias currents and warm up time, are greatly improved.
FEATURES
• All parameters specified for + 5V single
supply or
±
2.5V dual supply systems
• Rail- to- rail input and output voltage ranges
• Unity gain stable
• Extremely low input bias currents -- 0.1pA
• High source impedance applications
• Dual power supply
±1.0V
to
±6.0V
• Single power supply +2V to +12V
• High voltage gain
• Output short circuit protected
• Unity gain bandwidth of 0.2MHz
• Slew rate of 0.17V/µs
• Power dissipation of 20µA per op amp
• Symmetrical output drive
APPLICATIONS
•
•
•
•
•
•
•
•
•
•
•
•
Voltage follower/buffer/amplifier
Charge integrator
Photodiode amplifier
Data acquisition systems
High performance portable instruments
Signal conditioning circuits
Sensor and transducer amplifiers
Low leakage amplifiers
Active filters
Sample/Hold amplifier
Picoammeter
Current to voltage converter
PIN CONFIGURATION
OUT
A
IN -
A
1
14
OUT
D
IN -
D
IN +
D
V-
IN +
C
IN -
C
OUT
C
2
13
ORDERING INFORMATION
IN +
A
3
4
12
Operating Temperature Range
-55°C to +125°C
0°C to +70°C
0°C to +70°C
14-Pin
CERDIP
Package
ALD4706A DB
ALD4706B DB
ALD4706 DB
14-Pin
Small Outline
Package (SOIC)
ALD4706A SB
ALD4706B SB
ALD4706 SB
14-Pin
Plastic Dip
Package
ALD4706A PB
ALD4706B PB
ALD4706 PB
V+
IN +
B
IN -
B
OUT
B
11
5
10
6
9
7
8
DB, PB, SB PACKAGE
* Contact factory for industrial temperature range
© 1998 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089 -1706 Tel: (408) 747-1155 Fax: (408) 747-1286 http://www.aldinc.com
ABSOLUTE MAXIMUM RATINGS
Supply voltage, V+
Differential input voltage range
Power dissipation
Operating temperature range PB,SB package
DB package
Storage temperature range
Lead temperature, 10 seconds
13.2V
-0.3V to V+ +0.3V
600 mW
0°C to +70°C
-55°C to +125°C
-65°C to +150°C
+260°C
OPERATING ELECTRICAL CHARACTERISTICS
T
A
= 25
°
C V
+
= +5.0V (V
S
=
±
2.5V in dual supply operation) unless otherwise specified
Parameter
Supply
Voltage
Input Offset
Voltage
Input Offset
Current
Input Bias
Current
Input Voltage
Range
Input
Resistance
Input Offset
Voltage Drift
Power Supply
Rejection Ratio
Common Mode
Rejection Ratio
Symbol
V
S
V
+
V
OS
I
OS
I
B
V
IR
-0.3
-2.8
10
13
0.1
0.1
4706A
Min Typ
±1.0
2.0
Max
±6.0
12.0
2.0
2.8
20
200
20
200
5.3
2.8
-0.3
-2.8
10
13
0.1
0.1
4706B
Min Typ Max
±1.0
2.0
±6.0
12.0
5.0
5.8
20
200
20
200
5.3
2.8
-0.3
-2.8
10
13
0.1
0.1
4706
Min Typ
±1.0
2.0
Max
±6.0
12.0
10.0
11.0
20
200
20
200
5.3
2.8
Unit
V
V
mV
mV
pA
pA
pA
pA
V
V
Ω
µV/°C
dB
dB
dB
dB
R
S
≤
100KΩ
R
S
≤
100KΩ
0°C
≤
T
A
≤
+70°C
R
S
≤
100KΩ
0°C
≤
T
A
≤
+70°C
Test
Conditions
Dual Supply
Single Supply
R
S
≤
100KΩ
0°C
≤
T
A
≤
+70°C
T
A
= 25°C
0°C
≤
T
A
≤
+70°C
T
A
= 25°C
0°C
≤
T
A
≤
+70°C
V
+
= +5V
V
S
=
±2.5V
R
IN
TCV
OS
PSRR
CMRR
65
65
65
65
7
83
83
83
83
65
65
65
65
7
83
83
83
83
60
60
60
60
10
83
83
83
83
Large Signal
Voltage Gain
A
V
10
10
60
300
10
10
60
300
7
7
0.01
50
300
V/mV
V/mV
V/mV
0.01
-2.25
V
V
V
V
R
L
= 100KΩ
R
L
≥
1MΩ
R
L
= 100KΩ
R
L
= 1MΩ V
+
= 5V
0°C
≤
T
A
≤
+70°C
R
L
= 100KΩ V
S
=
±2.5V
0°C
≤
T
A
≤
+70°C
Output
Voltage
Range
V
O
low
V
O
high
V
O
low
V
O
high
4.99
0.001
4.999
-2.40
2.40
0.01
-2.25
0.001
4.99 4.999
0.001
4.99 4.999
-2.40
2.40
2.25
2.25
-2.40 -2.25
2.40
2.25
Output Short
Circuit Current
Supply
Current
Power
Dissipation
I
SC
I
S
200
120
200
200
120
200
200
120
200
µA
µA
V
IN
= 0V
No Load
All amplifiers
V
S
=
±2.5V
P
D
1.0
1.0
1.0
mW
ALD4706A/ALD4706B
ALD4706
Advanced Linear Devices
2
OPERATING ELECTRICAL CHARACTERISTICS (cont'd)
T
A
= 25
°
C V
S
=
±
2.5V unless otherwise specified
Parameter
Input
Capacitance
Bandwidth
Slew Rate
Rise time
Overshoot
Factor
Settling
Time
Channel
Separation
t
s
Symbol
C
IN
B
W
S
R
t
r
4706A
Min
Typ
1
200
0.17
1.0
20
Max
4706B
Min Typ
1
200
0.17
1.0
20
Max
Min
4706
Typ
1
200
0.17
1.0
20
Max
Unit
pF
KHz
V/µs
µs
%
µs
R
L
= 100KΩ
A
V
= +1
R
L
= 100KΩ
R
L
= 100KΩ
C
L
= 25pF
0.1% A
V
= 1
C
L
= 25pF R
L
= 100KΩ
Test
Conditions
10.0
10.0
10.0
C
S
140
140
140
dB
A
V
= 100
T
A
= 25
°
C V
S
=
±
1.0V unless otherwise specified
Parameter
Power Supply
Rejection Ratio
Common Mode
Rejection Ratio
Large Signal
Voltage Gain
Output Voltage
Range
Bandwidth
Slew Rate
Symbol
PSRR
4706A
Min
Typ
80
Max
4706B
Min Typ
80
Max
Min
4706
Typ
80
Max
Unit
dB
Test
Conditions
R
S
≤
1MΩ
CMRR
80
80
80
dB
R
S
≤
1MΩ
A
V
V
O
low
V
O
high
B
W
S
R
50
-0.95
0.95
200
0.1
-.90
.90
50
-0.95
0.95
200
0.1
-.90
50
-0.95
.90 0.95
200
0.1
-.90
V/mV
V
V
KHz
V/µs
R
L
= 1MΩ
R
L
= 1MΩ
.90
A
V
=+1
C
L
= 25pF
V
S
=
±
2.5V –55
°
C
≤
T
A
≤
+125
°
C unless otherwise specified
4706A DB
Parameter
Input Offset
Voltage
Input Offset
Current
Input Bias
Current
Power Supply
Rejection Ratio
Common Mode
Rejection Ratio
Large Signal
Voltage Gain
Output Voltage
Range
Symbol
V
OS
I
OS
I
B
PSRR
CMRR
A
V
V
O
low
V
O
high
60
60
10
2.25
1
1
75
83
50
-2.40
2.40
-2.25
2.25
Min
Typ
Max
3.0
4
4
60
60
10
1
1
75
83
50
-2.40 -2.25
2.40
Min
4706B DB
Typ
Max
6.0
4
4
60
60
7
2.25
1
1
75
83
50
-2.40
2.40
-2.25
Min
4706 DB
Typ
Max
15.0
4
4
Unit
mV
nA
nA
dB
dB
V/mV
V
V
R
S
≤
1MΩ
R
S
≤
1MΩ
R
L
= 1MΩ
R
L
= 1MΩ
Test
Conditions
R
S
≤
1MΩ
ALD4706A/ALD4706B
ALD4706
Advanced Linear Devices
3
Design & Operating Notes:
1. The ALD4706 CMOS operational amplifier uses a 3 gain stage
architecture and an improved frequency compensation scheme to
achieve large voltage gain, high output driving capability, and better
frequency stability. In a conventional CMOS operational amplifier
design, compensation is achieved with a pole splitting capacitor
together with a nulling resistor. This method is, however, very bias
dependent and thus cannot accommodate the large range of supply
voltage operation as is required from a stand alone CMOS operational
amplifier. The ALD4706 is internally compensated for unity gain
stability using a novel scheme that does not use a nulling resistor. This
scheme produces a clean single pole roll off in the gain characteristics
while providing for more than 70 degrees of phase margin at the unity
gain frequency.
2. The ALD4706 has complementary p-channel and n-channel input
differential stages connected in parallel to accomplish rail to rail input
common mode voltage range. This means that with the ranges of
common mode input voltage close to the power supplies, one of the
two differential stages is switched off internally. To maintain
compatibility with other operational amplifiers, this switching point has
been selected to be about 1.5V below the positive supply voltage.
Since offset voltage trimming on the ALD4706 is made when the input
voltage is symmetrical to the supply voltages, this internal switching
does not affect a large variety of applications such as an inverting
amplifier or non-inverting amplifier with a gain larger than 2.5 (5V
operation), where the common mode voltage does not make excursions
above this switching point. The user should however, be aware that
this switching does take place if the operational amplifier is connected
as a unity gain buffer and should make provision in his design to allow
for input offset voltage variations.
3. The input bias and offset currents are essentially input protection diode
reverse bias leakage currents, and are typically less than 0.1pA at
room temperature. This low input bias current assures that the analog
signal from the source will not be distorted by input bias currents.
Normally, this extremely high input impedance of greater than 10
13
Ω
would not be a problem as the source impedance would limit the node
impedance. However, for applications where source impedance is
very high, it may be necessary to limit noise and hum pickup through
proper shielding.
4. The output stage consists of class AB complementary output drivers,
capable of driving a low resistance load. The output voltage swing is
limited by the drain to source on-resistance of the output transistors
as determined by the bias circuitry, and the value of the load resistor.
When connected in the voltage follower configuration, the oscillation
resistant feature, combined with the rail to rail input and output
feature, makes an effective analog signal buffer for medium to high
source impedance sensors, transducers, and other circuit networks.
5. The ALD4706 operational amplifier has been designed to provide full
static discharge protection. Internally, the design has been carefully
implemented to minimize latch up. However, care must be exercised
when handling the device to avoid strong static fields that may
degrade a diode junction, causing increased input leakage currents.
In using the operational amplifier, the user is advised to power up the
circuit before, or simultaneously with, any input voltages applied and
to limit input voltages to not exceed 0.3V of the power supply voltage
levels.
6. The ALD4706, with its ultra micropower operation, offers numerous
benefits in reduced power supply requirements, less noise coupling
and current spikes, less thermally induced drift, better overall reli-
ability due to lower self heating, and lower input bias current. It
requires practically no warm up time as the chip junction heats up to
only 0.1°C above ambient temperature under most operating
conditions.
TYPICAL PERFORMANCE CHARACTERISTICS
SUPPLY CURRENT AS A FUNCTION
OF SUPPLY VOLTAGE
1000
INPUTS GROUNDED
OUTPUT UNLOADED
320
T
A
= -55°C
240
160
80
+70°C
0
0
±1
±2
±3
±4
SUPPLY VOLTAGE (V)
±5
±6
+125°C
+25°C
OPEN LOOP VOLTAGE GAIN AS A
FUNCTION OF LOAD RESISTANCE
SUPPLY CURRENT (µA)
OPEN LOOP VOLTAGE
GAIN (V/mV)
-25°C
100
10
V
S
=
±2.5V
T
A
= 25°C
1
10K
100K
1M
10M
LOAD RESISTANCE (Ω)
COMMON MODE INPUT VOLTAGE RANGE
AS A FUNCTION OF SUPPLY VOLTAGE
±7
INPUT BIAS CURRENT AS A FUNCTION
OF AMBIENT TEMPERATURE
10000
INPUT BIAS CURRENT (pA)
±6
T
A
= 25°C
COMMON MODE INPUT
VOLTAGE RANGE (V)
1000
100
V
S
=
±2.5V
±5
±4
±3
±2
±1
0
0
±1
±2
±3
±4
±5
±6
±7
SUPPLY VOLTAGE (V)
10
1.0
0.1
-50
-25
0
25
50
75
100
125
AMBIENT TEMPERATURE (°C)
ALD4706A/ALD4706B
ALD4706
Advanced Linear Devices
4
TYPICAL PERFORMANCE CHARACTERISTICS
OPEN LOOP VOLTAGE GAIN AS A FUNCTION
OF SUPPLY VOLTAGE AND TEMPERATURE
OUTPUT VOLTAGE SWING (V)
1000
OUTPUT VOLTAGE SWING AS A FUNCTION
OF SUPPLY VOLTAGE
±6
±5
±4
±3
±2
±1
±25°C ≤
T
A
≤
+125°C
R
L
= 100KΩ
OPEN LOOP VOLTAGE
GAIN (V/mV)
100
10
±55°C ≤
T
A
≤
+125°C
R
L
= 100KΩ
1
0
±2
±4
SUPPLY VOLTAGE (V)
±6
0
±1
±2
±3
±4
±5
±6
±7
SUPPLY VOLTAGE (V)
INPUT OFFSET VOLTAGE AS A FUNCTION
OF AMBIENT TEMPERATURE
REPRESENTATIVE UNITS
INPUT OFFSET VOLTAGE (mV)
+5
+4
+3
+2
+1
0
-1
-2
-3
-4
-5
-50
-25
0
+25
+50
+75
+100 +125
AMBIENT TEMPERATURE (°C)
120
OPEN LOOP VOLTAGE GAIN AS
A FUNCTION OF FREQUENCY
100
80
60
40
20
0
-20
1
10
100
1K
10K 100K
FREQUENCY (Hz)
1M
0
45
90
135
180
10M
V
S
=
±2.5V
T
A
= 25°C
V
S
=
±2.5V
OPEN LOOP VOLTAGE
GAIN (dB)
PHASE SHIFT IN DEGREES
INPUT OFFSET VOLTAGE AS A FUNCTION
OF COMMON MODE INPUT VOLTAGE
INPUT OFFSET VOLTAGE (mV)
15
10
5
0
-5
-10
V
S
=
±2.5V
T
A
= 25°C
LARGE - SIGNAL TRANSIENT
RESPONSE
2V/div
V
S
=
±1.0V
T
A
= 25°C
R
L
= 100KΩ
C
L
= 25pF
500mV/div
-15
-2
-1
0
+1
+2
+3
COMMON MODE INPUT VOLTAGE (V)
10µs/div
LARGE - SIGNAL TRANSIENT
RESPONSE
5V/div
V
S
=
±2.5V
T
A
= 25°C
R
L
= 100KΩ
C
L
= 25pF
SMALL - SIGNAL TRANSIENT
RESPONSE
100mV/div
V
S
=
±2.5V
T
A
= 25°C
R
L
= 100KΩ
C
L
= 25pF
2V/div
10µs/div
50mV/div
10µs/div
ALD4706A/ALD4706B
ALD4706
Advanced Linear Devices
5
模拟与混合信号
