PRELIMINARY
C8051F040/1/2/3
Mixed-Signal ISP FLASH MCU Family
ANALOG PERIPHERALS
-
10 or 12-Bit SAR ADC
•
12-Bit (C8051F040/1) or 10-bit (C8051F042/3) Resolution
•
± 1 LSB INL, guaranteed no missing codes
•
Programmable Throughput up to 100 ksps
•
13 External Inputs; Single-Ended or Differential
•
SW Programmable High Voltage Difference Amplifier
•
Programmable Amplifier Gain: 16, 8, 4, 2, 1, 0.5
•
Data-Dependent Windowed Interrupt Generator
•
Built-in Temperature Sensor
-
8-bit SAR ADC
•
Programmable Throughput up to 500 ksps
•
8 External Inputs, Single-ended or differential
•
Programmable Amplifier Gain: 4, 2, 1, 0.5
-
Two 12-bit DACs
•
Can Synchronize Outputs to Timers for Jitter-Free Wave-
form Generation
HIGH SPEED 8051
µC
CORE
-
Pipelined Instruction Architecture; Executes 70% of
Instruction Set in 1 or 2 System Clocks
-
Up to 25 MIPS Throughput with 25 MHz Clock
-
20 Vectored Interrupt Sources
MEMORY
-
4352 Bytes Internal Data RAM (4k + 256)
-
64k Bytes FLASH; In-System programmable in 512-byte
-
Sectors
External 64k Byte Data Memory Interface (programma-
ble multiplexed or non-multiplexed modes)
DIGITAL PERIPHERALS
-
8 Byte-Wide Port I/O (C8051F040/2); 5V tolerant
-
4 Byte-Wide Port I/O (C8051F041/3); 5V tolerant
-
Bosch Controller Area Network (CAN 2.0B), Hardware
-
SMBus™ (I
2
C™ Compatible), SPI™, and Two UART
Serial Ports Available Concurrently
Programmable 16-bit Counter/Timer Array with
6 Capture/Compare Modules
5 General Purpose 16-bit Counter/Timers
Dedicated Watch-Dog Timer; Bi-directional Reset Pin
24.5 MHz
External Oscillator: Crystal, RC, C, or Clock
Real-Time Clock Mode using Timer 2, 3, 4, or PCA
-
Three Analog Comparators
•
Programmable Hysteresis/Response Time
-
Voltage Reference
-
Precision VDD Monitor/Brown-Out Detector
ON-CHIP JTAG DEBUG & BOUNDARY SCAN
-
On-Chip Debug Circuitry Facilitates Full- Speed, Non-
-
-
-
-
Intrusive In-Circuit/In-System Debugging
Provides Breakpoints, Single-Stepping, Watchpoints,
Stack Monitor; Inspect/Modify Memory and Registers
Superior Performance to Emulation Systems Using ICE-
Chips, Target Pods, and Sockets
IEEE1149.1 Compliant Boundary Scan
Complete Development Kit
-
-
CLOCK SOURCES
-
Internal Calibrated Programmable Oscillator: 3 to
-
-
SUPPLY VOLTAGE .......................... 2.7V TO 3.6V
-
Multiple Power Saving Sleep and Shutdown Modes
100-Pin TQFP and 64-Pin TQFP Packages Available
Temperature Range: -40°C to +85°C
ANALOG PERIPHERALS
TEMP
SENSOR
DIGITAL I/O
CROSSBAR
CAN
2.0B
UART0
UART1
SMBus
SPI Bus
PCA
Timer 0
Timer 1
Timer 2
Timer 3
Timer 4
Port 0
Port 1
External Memory Interface
AMUX
PGA
VREF
10/12-bit
100ksps
ADC
PGA
Port 2
Port 3
HV
DIFF AMP
8-bit
500ksps
ADC
+
-
+
-
AMUX
Port 4
Port 5
Port 6
Port 7
12-Bit
DAC
12-Bit
DAC
+
-
VOLTAGE
COMPARATORS
64 pin
100 pin
HIGH-SPEED CONTROLLER CORE
8051 CPU
(25MIPS)
20
INTERRUPTS
64KB
ISP FLASH
DEBUG
CIRCUITRY
4352 B
JTAG
SRAM
CLOCK
SANITY
CIRCUIT
CONTROL
DS005-1.2MAY03
CYGNAL Integrated Products, Inc.
© 2003
Page 1
C8051F040/1/2/3
PRELIMINARY
Notes
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DS005-1.2MAY03
© 2003 Cygnal Integrated Products, Inc.
PRELIMINARY
C8051F040/1/2/3
TABLE OF CONTENTS
1. SYSTEM OVERVIEW .........................................................................................................15
1.1. CIP-51™ Microcontroller Core ......................................................................................18
1.1.1. Fully 8051 Compatible ..........................................................................................18
1.1.2. Improved Throughput ............................................................................................18
1.1.3. Additional Features................................................................................................19
1.2. On-Chip Memory ............................................................................................................20
1.3. JTAG Debug and Boundary Scan ...................................................................................21
1.4. Programmable Digital I/O and Crossbar .........................................................................22
1.5. Programmable Counter Array .........................................................................................23
1.6. Controller Area Network.................................................................................................24
1.7. Serial Ports.......................................................................................................................25
1.8. 12-Bit Analog to Digital Converter.................................................................................25
1.9. 8-Bit Analog to Digital Converter...................................................................................27
1.10. Comparators and DACs...................................................................................................28
2. ABSOLUTE MAXIMUM RATINGS ..................................................................................29
3. GLOBAL DC ELECTRICAL CHARACTERISTICS ......................................................30
4. PINOUT AND PACKAGE DEFINITIONS........................................................................31
5. 12-BIT ADC (ADC0, C8051F040/1 ONLY) ........................................................................41
5.1. Analog Multiplexer and PGA..........................................................................................41
5.1.1. Analog Input Configuration...................................................................................42
5.2. High Voltage Difference Amplifier.................................................................................46
5.3. ADC Modes of Operation ...............................................................................................48
5.3.1. Starting a Conversion.............................................................................................48
5.3.2. Tracking Modes .....................................................................................................48
5.3.3. Settling Time Requirements ..................................................................................50
5.4. ADC0 Programmable Window Detector.........................................................................56
6. 10-BIT ADC (ADC0, C8051F042/3 ONLY) ........................................................................63
6.1. Analog Multiplexer and PGA..........................................................................................63
6.1.1. Analog Input Configuration...................................................................................64
6.2. High Voltage Difference Amplifier.................................................................................68
6.3. ADC Modes of Operation ...............................................................................................70
6.3.1. Starting a Conversion.............................................................................................70
6.3.2. Tracking Modes .....................................................................................................70
6.3.3. Settling Time Requirements ..................................................................................72
6.4. ADC0 Programmable Window Detector.........................................................................78
7. 8-BIT ADC (ADC2) ...............................................................................................................85
7.1. Analog Multiplexer and PGA..........................................................................................85
7.2. ADC2 Modes of Operation .............................................................................................86
7.2.1. Starting a Conversion.............................................................................................86
7.2.2. Tracking Modes .....................................................................................................86
7.2.3. Settling Time Requirements ..................................................................................88
7.3. ADC2 Programmable Window Detector.........................................................................94
7.3.1. Window Detector In Single-Ended Mode .............................................................94
© 2003 Cygnal Integrated Products, Inc.
DS005-1.2MAY03
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C8051F040/1/2/3
PRELIMINARY
7.3.2. Window Detector In Differential Mode.................................................................96
8. DACS, 12-BIT VOLTAGE MODE ......................................................................................99
8.1. DAC Output Scheduling..................................................................................................99
8.1.1. Update Output On-Demand ...................................................................................99
8.1.2. Update Output Based on Timer Overflow ...........................................................100
8.2. DAC Output Scaling/Justification.................................................................................100
9. VOLTAGE REFERENCE (C8051F040/2)........................................................................107
10. VOLTAGE REFERENCE(C8051F041/3) ........................................................................109
11. COMPARATORS................................................................................................................111
11.1. Comparator Inputs .........................................................................................................113
12. CIP-51 MICROCONTROLLER........................................................................................117
12.1. Instruction Set................................................................................................................118
12.1.1. Instruction and CPU Timing................................................................................118
12.1.2. MOVX Instruction and Program Memory...........................................................118
12.2. Memory Organization ...................................................................................................123
12.2.1. Program Memory .................................................................................................123
12.2.2. Data Memory .......................................................................................................124
12.2.3. General Purpose Registers ...................................................................................124
12.2.4. Bit Addressable Locations ...................................................................................124
12.2.5. Stack .................................................................................................................124
12.2.6. Special Function Registers...................................................................................125
12.2.6.1. SFR Paging..................................................................................................125
12.2.6.2. Interrupts and SFR Paging...........................................................................125
12.2.6.3. SFR Page Stack Example ............................................................................127
12.2.7. Register Descriptions ...........................................................................................140
12.3. Interrupt Handler ...........................................................................................................142
12.3.1. MCU Interrupt Sources and Vectors ...................................................................143
12.3.2. External Interrupts ...............................................................................................143
12.3.3. Interrupt Priorities................................................................................................145
12.3.4. Interrupt Latency..................................................................................................145
12.3.5. Interrupt Register Descriptions ............................................................................146
12.4. Power Management Modes ...........................................................................................152
12.4.1. Idle Mode .............................................................................................................152
12.4.2. Stop Mode............................................................................................................152
13. RESET SOURCES ..............................................................................................................155
13.1. Power-on Reset..............................................................................................................156
13.2. Power-fail Reset ............................................................................................................156
13.3. External Reset................................................................................................................156
13.4. Missing Clock Detector Reset .......................................................................................157
13.5. Comparator0 Reset ........................................................................................................157
13.6. External CNVSTR0 Pin Reset.......................................................................................157
13.7. Watchdog Timer Reset ..................................................................................................157
13.7.1. Enable/Reset WDT ..............................................................................................157
13.7.2. Disable WDT .......................................................................................................157
13.7.3. Disable WDT Lockout.........................................................................................158
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© 2003 Cygnal Integrated Products, Inc.
PRELIMINARY
C8051F040/1/2/3
13.7.4. Setting WDT Interval...........................................................................................158
14. OSCILLATORS...................................................................................................................161
14.1. Programmable Internal Oscillator .................................................................................161
14.2. External Oscillator Drive Circuit...................................................................................163
14.3. System Clock Selection.................................................................................................163
14.4. External Crystal Example..............................................................................................165
14.5. External RC Example ....................................................................................................165
14.6. External Capacitor Example..........................................................................................165
15. FLASH MEMORY ..............................................................................................................167
15.1.Programming The Flash Memory .................................................................................167
15.2. Non-volatile Data Storage .............................................................................................168
15.3. Security Options ............................................................................................................168
16. EXTERNAL DATA MEMORY INTERFACE AND ON-CHIP XRAM.......................173
16.1. Accessing XRAM..........................................................................................................173
16.1.1. 16-Bit MOVX Example.......................................................................................173
16.1.2. 8-Bit MOVX Example.........................................................................................173
16.2.Configuring the External Memory Interface .................................................................174
16.3. Port Selection and Configuration ..................................................................................174
16.4. Multiplexed and Non-multiplexed Selection.................................................................176
16.4.1. Multiplexed Configuration ..................................................................................176
16.4.2. Non-multiplexed Configuration...........................................................................177
16.5. Memory Mode Selection ...............................................................................................178
16.5.1. Internal XRAM Only ...........................................................................................178
16.5.2. Split Mode without Bank Select ..........................................................................178
16.5.3. Split Mode with Bank Select ...............................................................................179
16.5.4. External Only .......................................................................................................179
16.6. Timing .......................................................................................................................179
16.6.1. Non-multiplexed Mode........................................................................................181
16.6.1.1.16-bit MOVX: EMI0CF[4:2] = ‘101’, ‘110’, or ‘111’................................181
16.6.1.2. 8-bit MOVX without Bank Select: EMI0CF[4:2] = ‘101’ or ‘111’............182
16.6.1.3. 8-bit MOVX with Bank Select: EMI0CF[4:2] = ‘110’. ..............................183
16.6.2. Multiplexed Mode................................................................................................184
16.6.2.1.16-bit MOVX: EMI0CF[4:2] = ‘001’, ‘010’, or ‘011’................................184
16.6.2.2. 8-bit MOVX without Bank Select: EMI0CF[4:2] = ‘001’ or ‘011’............185
16.6.2.3. 8-bit MOVX with Bank Select: EMI0CF[4:2] = ‘010’. ..............................186
17. PORT INPUT/OUTPUT .....................................................................................................189
17.1. Ports 0 through 3 and the Priority Crossbar Decoder....................................................190
17.1.1. Crossbar Pin Assignment and Allocation ............................................................191
17.1.2. Configuring the Output Modes of the Port Pins ..................................................192
17.1.3. Configuring Port Pins as Digital Inputs ...............................................................193
17.1.4. Weak Pull-ups......................................................................................................193
17.1.5. Configuring Port 1, 2, and 3 Pins as Analog Inputs ............................................193
17.1.6. External Memory Interface Pin Assignments ......................................................194
17.1.7. Crossbar Pin Assignment Example......................................................................197
17.2. Ports 4 through 7 (C8051F040/F042 only) ...................................................................208
© 2003 Cygnal Integrated Products, Inc.
DS005-1.2MAY03
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电源技术
