CD4020BC • CD4040BC • CD4060BC 14-Stage Ripple Carry Binary Counters • 12-Stage Ripple Carry Binary
Counters • 14-Stage Ripple Carry Binary Counters
October 1987
Revised January 1999
CD4020BC • CD4040BC • CD4060BC
14-Stage Ripple Carry Binary Counters •
12-Stage Ripple Carry Binary Counters •
14-Stage Ripple Carry Binary Counters
General Description
The CD4020BC, CD4060BC are 14-stage ripple carry
binary counters, and the CD4040BC is a 12-stage ripple
carry binary counter. The counters are advanced one count
on the negative transition of each clock pulse. The
counters are reset to the zero state by a logical “1” at the
reset input independent of clock.
Features
s
Wide supply voltage range:
s
High noise immunity:
1.0V to 15V
0.45 V
DD
(typ.)
s
Low power TTL compatibility: Fan out of 2 driving 74L
or 1 driving 74LS
s
Medium speed operation: 8 MHz typ. at V
DD
=
10V
s
Schmitt trigger clock input
Ordering Code:
Order Number
CD4020BCM
CD4020BCN
CD4040BCM
CD4040BCSJ
CD4040BCN
CD4060BCM
CD4060BCN
Package Number
M16A
N16E
M16A
M16D
N16E
M16A
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
Pin Assignments for DIP and SOIC
CD4020BC
Pin Assignments for DIP, SOIC and SOP
CD4040BC
Top View
Top View
© 1999 Fairchild Semiconductor Corporation
DS005953.prf
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CD4020BC • CD4040BC • CD4060BC
Connection Diagrams
(Continued)
Pin Assignments for DIP and SOIC
CD4060BC
Top View
Schematic Diagrams
CD4020BC
CD4040BC
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2
CD4020BC • CD4040BC • CD4060BC
CD4060BC
CD4060B Typical Oscillator Connections
RC Oscillator
Crystal Oscillator
3
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CD4020BC • CD4040BC • CD4060BC
Absolute Maximum Ratings
(Note 1)
(Note 2)
Supply Voltage (V
DD
)
Input Voltage (V
IN
)
Storage Temperature Range (T
S
)
Package Dissipation (P
D
)
Dual-In-Line
Small Outline
Lead Temperature (T
L
)
(Soldering, 10 seconds)
260°C
700 mW
500 mW
−0.5V
to
+18V
−0.5V
to V
DD
+0.5V
−65°C
to
+150°C
Recommended Operating
Conditions
Supply Voltage (V
DD
)
Input Voltage (V
IN
)
Operating Temperature Range (T
A
)
+3V
to
+15V
0V to V
DD
−40°C
to
+85°C
Note 1:
“Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. They are not meant to imply
that the devices should be operated at these limits. The tables of “Recom-
mended Operating Conditions” and “Electrical Characteristics” provide con-
ditions for actual device operation.
Note 2:
V
SS
=
0V unless otherwise specified.
DC Electrical Characteristics
(Note 2)
Symbol
I
DD
Parameter
Quiescent Device Current
Conditions
V
DD
=
5V, V
IN
=
V
DD
or V
SS
V
DD
=
10V, V
IN
=
V
DD
or V
SS
V
DD
=
15V, V
IN
=
V
DD
or V
SS
V
OL
LOW Level Output Voltage
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
V
OH
HIGH Level Output Voltage
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
V
IL
LOW Level Input Voltage
V
DD
=
5V, V
O
=
0.5V or 4.5V
V
DD
=
10V, V
O
=
1.0V or 9.0V
V
DD
=
15V, V
O
=
1.5V or 13.5V
V
IH
HIGH Level Input Voltage
V
DD
=
5V, V
O
=
0.5V or 4.5V
V
DD
=
10V, V
O
=
1.0V or 9.0V
V
DD
=
15V, V
O
=
1.5V or 13.5V
I
OL
LOW Level Output Current
(Note 3)
I
OH
HIGH Level Output Current
(Note 3)
I
IN
Input Current
V
DD
=
5V, V
O
=
0.4V
V
DD
=
10V, V
O
=
0.5V
V
DD
=
15V, V
O
=
1.5V
V
DD
=
5V, V
O
=
4.6V
V
DD
=
10V, V
O
=
9.5V
V
DD
=
15V, V
O
=
13.5V
V
DD
=
15V, V
IN
=
0V
V
DD
=
15V, V
IN
=
15V
3.5
7.0
11.0
0.52
1.3
3.6
−0.52
−1.3
−3.6
−0.30
0.30
4.95
9.95
14.95
1.5
3.0
4.0
3.5
7.0
11.0
0.44
1.1
3.0
−0.44
−1.1
−3.0
−40°C
Min
Max
20
40
80
0.05
0.05
0.05
4.95
9.95
14.95
0
0
0
5
10
15
2
4
6
3
6
9
0.88
2.25
8.8
−0.88
−2.25
−8.8
−10
−5
10
−5
−0.30
0.30
1.5
3.0
4.0
3.5
7.0
11.0
0.36
0.9
2.4
−0.36
−0.9
−2.4
−1.0
1.0
Min
+25°C
Typ
Max
20
40
80
0.05
0.05
0.05
4.95
9.95
14.95
1.5
3.0
4.0
+85°C
Min
Max
150
300
600
0.05
0.05
0.05
Units
µA
µA
µA
V
V
V
V
V
V
V
V
V
V
V
V
mA
mA
mA
mA
mA
mA
µA
µA
Note 3:
Data does not apply to oscillator points
φ
0
and
φ
0
of CD4060BC. I
OH
and I
OL
are tested one output at a time.
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4
CD4020BC • CD4040BC • CD4060BC
AC Electrical Characteristics
Symbol
t
PHL1
, t
PLH1
Parameter
Propagation Delay Time to Q
1
(Note 4)
Conditions
Min
Typ
250
100
75
150
60
45
100
50
40
125
50
40
Max
550
210
150
330
125
90
200
100
80
335
125
100
No Limit
No Limit
No Limit
1.5
4
5
4
10
12
200
100
80
200
100
80
5
50
450
210
170
450
210
170
7.5
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
pF
pF
CD4020BC, CD4040BC T
A
=
25
°
C, C
L
=
50 pF, R
L
=
200k, t
r
=
t
f
=
20 ns, unless otherwise noted
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
t
PHL
, t
PLH
Interstage Propagation Delay Time
from Q
n
to Q
n+1
t
THL
, t
TLH
Transition Time
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
t
WL
, t
WH
Minimum Clock Pulse Width
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
t
rCL
, t
fCL
Maximum Clock Rise and Fall Time
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
f
CL
Maximum Clock Frequency
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
t
PHL(R)
Reset Propagation Delay
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
t
WH(R)
Minimum Reset Pulse Width
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
C
IN
C
PD
Average Input Capacitance
Power Dissipation Capacitance
Any Input
Note 4:
AC Parameters are guaranteed by DC correlated testing.
5
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