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CD54ACT103A

Dual “J-K” Flip-Flop with Set and Reset

厂商名称:Intersil ( Renesas )

厂商官网:http://www.intersil.com/cda/home/

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S E M I C O N D U C T O R
CD54AC109/3A
CD54ACT109/3A
Dual “J-K” Flip-Flop with Set and Reset
Functional Diagram
1S
1J
1K
1CP
1R
2S
2J
2K
2CP
5
2
3
4
1
11
14
13
12
15
GND = 8
V
CC
= 16
FF 2
FF 1
June 1997
COMPLETE DATA SHEET
COMING SOON!
Description
The CD54AC109/3A and CD54ACT109/3A are dual “J-K”
flip-flops with set and reset that utilize the Harris Advanced
CMOS Logic technology. These flip-flops have independent
J, K, Set, Reset and Clock inputs and Q and Q outputs. The
CD54AC109/3A and CD54ACT109/3A changes state on the
positive-going transition of the clock. Set and Reset are
accomplished asynchronously by low-level inputs.
The CD54AC109/3A and CD54ACT109/3A are supplied in
16 lead dual-in-line ceramic packages (F suffix).
ACT INPUT LOAD TABLE
INPUT
J, CP, CP
K
S, R
NOTE:
1. Unit load is
∆I
CC
limit specified in DC Electrical Specifications
Table, e.g., 2.4mA Max at +25
o
C.
UNIT LOAD
(NOTE 1)
1
0.53
6
1Q
7
1Q
10
2Q
9
2Q
2R
0.58
Absolute Maximum Ratings
DC Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +6V
DC Input Diode Current, I
IK
For V
I
< -0.5V or V
I
> V
CC
+ 0.5V
. . . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, I
OK
For V
O
< -0.5V or V
O
> V
CC
+ 0.5V
. . . . . . . . . . . . . . . . . . . . .±50mA
DC Output Source or Sink Current, Per Output Pin, I
O
For V
O
> -0.5V or V
O
< V
CC
+ 0.5V
. . . . . . . . . . . . . . . . . . . . .±50mA
DC V
CC
or GND Current, I
CC
or I
GND
For Up to 4 Outputs Per Device, Add
±25mA
For Each
Additional Output
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±100mA
Power Dissipation Per Package, P
D
T
A
= -55
o
C to +100
o
C (Package F) . . . . . . . . . . . . . . . . . . 500mW
T
A
= +100
o
C to +125
o
C (Package F) . . . . . . . . Derate Linearly at
8mW/
o
C to 300mW
Operating Temperature Range, T
A
Package Type F . . . . . . . . . . . . . . . . . . . . . . . . . . -55
o
C to +125
o
C
Storage Temperature, T
STG
. . . . . . . . . . . . . . . . . . -65
o
C to +150
o
C
Lead Temperature (During Soldering)
At Distance 1/16in.
±
1/32in. (1.59mm
±
0.79mm)
From Case For 10s Max . . . . . . . . . . . . . . . . . . . . . . . . . . +265
o
C
Unit Inserted Into a PC Board (Min Thickness 1/16in., 1.59mm)
With Solder Contacting Lead Tips Only. . . . . . . . . . . . . . . +300
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Recommended Operating Conditions
Supply Voltage Range, V
CC
Unless Otherwise Specified, All Voltages Referenced to GND
T
A
= Full Package Temperature Range
CD54AC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V
CD54ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, V
I
, V
O
. . . . . . . . . . . . . . . . . . 0V to V
CC
Operating Temperature, T
A
. . . . . . . . . . . . . . . . . . . -55
o
C to +125
o
C
Input Rise and Fall Slew Rate, dt/dv
at 1.5V to 3V (AC Types) . . . . . . . . . . . . . . . . . . . 0ns/V to 50ns/V
at 3.6V to 5.5V (AC Types) . . . . . . . . . . . . . . . . . 0ns/V to 20ns/V
at 4.5V to 5.5V (AC Types) . . . . . . . . . . . . . . . . . 0ns/V to 10ns/V
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures.
Copyright
©
Harris Corporation 1994
File Number
3885
1
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参数对比
与CD54ACT103A相近的元器件有:CD54AC103A、CD54AC109、CD54ACT109。描述及对比如下:
型号 CD54ACT103A CD54AC103A CD54AC109 CD54ACT109
描述 Dual “J-K” Flip-Flop with Set and Reset Dual “J-K” Flip-Flop with Set and Reset Dual “J-K” Flip-Flop with Set and Reset Dual “J-K” Flip-Flop with Set and Reset
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器件捷径:
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