Multi-Core MIPS64 Processors
R
OCTEON II CN67XX Multi-Core MIPS64 Processors
Product Brief
OVERVIEW
The OCTEON II CN67XX family of Multi-Core MIPS64 Processors targets high-performance, high-throughput,
service-rich applications in secure datacenter, mobile internet, and borderless enterprise applications. The family
includes six software and pin-compatible processors, with 8 to 16 cnMIPS64 v2 cores and full pin and software
compatibility with the OCTEON II CN68XX processor family which enables scaling up to a 32 cores using the same
hardware and software design. The CN67XX also offers over 60 application acceleration engines and the latest
standards-based connectivity including PCIe Gen2, XAUI, Double-speed XAUI, RXAUI, and Interlaken and provides
major compute performance, throughput, and services performance advantages over alternative solutions.
®
FEATURES
•
Up to 16 MIPS64 cores and 2x DDR3 controllers with
BENEFITS
•
Up to 24 GHz of total compute in a single chip
•
•
•
•
•
•
•
•
•
scalability in the same pinout to 32 cores and 4x
DDR3 controllers; SW compatible with OCTEON Plus
Latest, Highest-Bandwidth Serial I/O’s for Standard
Connectivity: XAUI/RXAUI, Interlaken, PCIe Gen 2
New LZS storage compression mode, compression/
decompression performance up to 20Gbps
Third generation Reg Ex Engine with revolutionary
Hyper Finite Automata (HFA) up to 15 Gbps
High-bandwith, low-latency I/O and coprocessor
networks
Hardware and software virtualization
Power Optimizer Technology with flexible, dynamic
control of device core power consumption
•
•
•
> 200Gbps DDR3 bandwidth
> 40 Gbps packet processing and security processing
with seamless connectivity to peripherals
Accelerates LZS to address additional storage
applications in addition to ZIP/PKZIP/GZIP support
Deterministic pattern matching performance,
independent of # of flows and rules, most compact
graph size
Linear performance scaling with full coprocessor
services at line rate
Ability to partition into multiple virtual SoCs
Flexible, dynamic power control to achieve best
performance/Watt
OCTEON
®
II CN67XX - Block Diagram
DMA
x20
Gen2
SERDES
FPA
Timers
10G or
4x 1G
Interlaken
Interlaken-LA
PCIe v2
2x 10G
10G or
4x 1G
10G or
4x 1G
Application
Acceleration
Manager
Compression
/Decomp
v3
RAID/
XOR
TCP
x4
x4
x4
x4
x4
If x4
If x8
Power
Optimizer
Crypto
Security
Packet
CN67XX
Crypto
Security
Packet
Secure Vault
MIPS64 r2
Integer Core
MIPS64 r2
8-16
cnMIPS II
Integer Core
cores
37K Icache
37K Icache
Misc I/0
HFA
(Pattern
Matching)
32K Dcache
Write Back Buffer
32K Dcache
Write Back Buffer
Boot/Flash
(NOR &
NAND), CF,
16 GPIO,
DUART, 2x
I2C,
USB 2.0
w/PHY,
1xRG/MII
PCIe v2
Packet
Input v2
Packet
Output v2
2x Hyper
Access
Memory
Controller v2
I/O
Network
Coproc
Network
4MB Shared
L2 Cache
2x 72b
2315 N. First Street
San Jose, CA 95131
T
408-943-7100
F
408-577-1992
E
sales@cavium.com
www.cavium.com
Multi-Core MIPS64 Processors
R
OCTEON II CN67XX Multi-Core MIPS64 Processors
Product Brief
OCTEON
®
II CN67XX - Based System Block Diagrams
Leading Services/ATCA Blade Solution
2, 4x 72 bits
DDR3
MISC I/O
Peripherals
or Control
PCle v2
XAUI/
RXAUI
®
Leading Appliance Solution
2,4x 72 bits
DDR3
MISC I/O
XAUI/
RXAUI
SGMII
Peripherals
or Control
PHY
PHY
CN68XX
CN67XX
Interlaken
XAUI/
RXAUI
PCle v2
PHY
PHY
40 Gbps I/F
to Backplane
PHY
PHY
PCle v2
40 Gbps I/F
to Front Panel
PHY
PHY
XAUI/
RXAUI
XAUI/
RXAUI
XAUI/
RXAUI
XAUI/
RXAUI
Up to
4x 10GbE
12x GbE
per
CN68XX/
CN67XX
PHY
PHY
PHY
PHY
CN68XX
CN67XX
Interlaken
Interlaken-LA
XAUI/
RXAUI
CN68XX
CN67XX
XAUI/
RXAUI
MISC I/O
2, 4x 72 bits
DDR3
Peripherals
or Control
Additional
OCTEON
FPGA/ASIC
Coprocessor
OCTEON II APPLICATIONS
•
Borderless Enterprise
- High-End Enterprise Switches + Routers
- Wireless LAN Controllers
- Uni ed Threat Management Appliances
- WAN Optimization Appliances
•
Secure Cloud Services
- Application Delivery Switches
- Secure Storage switches, FC to IP bridges
- Load Balancers
- Security Appliances and Blades
•
Mobile Internet
- 3G/4G/LTE Gateways
- ATCA Blades and AMC’s
- xGSNs, Evolved Packet Core (ePC)
OCTEON II SOFTWARE SUPPORT
•
Cavium SDK includes:
-
Up to 32-way SMP LINUX support
-
Cavium Simple Executive for data plane applications
-
Complete GNU tool-chain, GCC, GDB and DDD
-
Viewzilla, Perfzilla, and Opro le for performance tuning
-
Optimized C libraries for security, regular expression,
de/compression processing o oad
-
Support for run-to-completion or pipelined software
models
•
Complete production quality development toolkits for
TCP/IP, IPsec, SSL, SSL-VPN and Deep Packet Inspection
available
•
Comprehensive Ecosystem support
-
Popular third-party Operating systems and Toolchains
-
Broad range of third-party application software vendors
-
Appliances, AMC, ATCA cards from Cavium’s Ecosystem
support
•
MIPS64/32 support enables thousands of MIPS and other
C/C++ applications to be easily ported to OCTEON
OCTEON
®
II CN67XX - Product Family
Performance
Option
L2
Cache
Networking
Interfaces
PCI-Express/
SRIO
Memory IO
w/ECC
Package
Device
Part Number
cnMIPS
cores
Max. Available
Instructions
Per Second
A
A
P
Y
Y
Y
C
P
Y
Y
Y
CN6740
CN6750
CN6760
CN6740-XXXBG1936- Option Code
CN6750-XXXBG1936- Option Code
CN6760-XXXBG1936- Option Code
8
12
16
24B
36B
48B
4MB
Up to 3x [XAUI or 4x
SGMII]+ [1x XAUI
or 2x RXAUI], Up to 1x
Interlaken/LA x4
+1x RG/MII
Up to 1 x8
+ 1 x4
PCIe v2
2x 72-bit DDR3
1936 FCB6A
2315 N. First Street
San Jose, CA 95131
T
408-943-7100
F
408-577-1992
E
sales@cavium.com
www.cavium.com
Device Options:
Device Speed Grade (800 = 800 MHz, 1000 = 1 GHz, 1200 = 1.2 GHz, 1500 = 1.5 GHz)
Option code for device family listed below:
AAP = Application Acceleration Processor: Includes RAID, encryption, RegEx acceleration, compression/decompression,
networking, TCP acceleration, and QoS
CP = Communication Processor: Includes networking, TCP acceleration, and QoS
2011 Cavium, Inc. All Rights reserved. NITROX and OCTEON are registered trademarks of Cavium, Inc.
All other brands and product names are registered trademarks of their respective owners.
CN67XX-PB-1.0 Printed in the USA
实时操作系统RTOS
