DLR3416
HIGH EFFICIENCY RED
DLO3416
GREEN
DLG3416
RED
0.270" 4-Character 5 x 7 Dot Matrix
Alphanumeric Intelligent Display
®
Devices
with Memory/Decoder/Driver
Dimensions in inches (mm)
.157 (.40)
±.007
(.18)
.325
(8.26)
.175
(4.45)
.260 (6.60)
±.007
(.18)
.790
(20.07)
±.010
(.25)
.270
(6.86)
1.300 (33.02) max
.600 (15.24)
±.020
(.51)
at Seating
Plane
Pin 1
Indicator
EIA Date Code
DLX3416
OSRAM
Luminous
Intensity Code
Z
340 (8.64)
.160 (4.06)
±.020
(.51)
YYWW
FEATURES
• 0.270" 5 x 7 Dot Matrix Characters
• 128 Special ASCII Characters for English,
German, Italian, Swedish, Danish, and
Norwegian Languages
• Wide Viewing Angle: X Axis 50° Maximum,
Y Axis ±75° Maximum
• Close Vertical Row Spacing, 0.800" Centers
• Fast Access Time, 110 ns at 25°C
• Full Size Display for Stationary Equipment
• Built-in Memory
• Built-in Character Generator
• Built-in Multiplex and LED Drive Circuitry
• Each Character Independently Accessed
• TTL Compatible, 5.0 Volt Power,
V
IH
=2.0 V,
V
IL
=0.8 V
• Independent Cursor Function
• Memory Clear Function
• Display Blank Function for Blinking and Dimming
• End-Stackable, 4-Character Package
• Intensity Coded for Display Uniformity
• Extended Operating Temperature Range:
–40°C to +85°C
• Wave Solderable
See Appnotes 18, 19, 22, and 23 at www.infineon.com/
opto.
Part
No.
.145 (3.68)
±.015
(.38)
at Seating Plane
.100 (2.54)
±.015
(38)
at Seating Plane
.020 (.51) x .012(.30)
Leads 22 pl.
DESCRIPTION
The DLR/DLO/DLG3416 is a four character 5 x 7 dot matrix display
module with a built-in CMOS integrated circuit.
The integrated circuit contains memory, ASCII ROM decoder, multi-
plexing circuitry and drivers. Data entry is asynchronous and can be
random. A display system can be built using any number of DLX3416s
since each character can be addressed independently and will con-
tinue to display the character last stored until replaced by another.
System interconnection is very straightforward. The least significant
two address bits (A0, A1) are normally connected to the like-named
inputs of all displays in the system. With four chip enables, four dis-
plays (16 characters) can easily be interconnected without a decoder.
Data lines are connected to all DLX3416s directly and in parallel, as is the
write line (WR). The display will then behave as a write-only memory.
The cursor function causes all dots of a character position to illuminate
at half brightness. The cursor is not a character, and when removed
the previously displayed character will reappear.
The DLX3416 has several features superior to competitive devices.
True “blanking” allows the designer to dim the display for more flexi-
bility of display presentation. Finally the CLR clear function will clear
the cursor RAM and the ASCII character RAM simultaneously.
2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA
www.infineon.com/opto • 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany
www.osram-os.com • +49-941-202-7178
1
March 24, 2000-01
DESCRIPTION
(continued)
The character set consists of 128 special ASCII characters for
English, German, Italian, Swedish, Danish, and Norwegian.
All products are subjected to out-going AQL’s of 0.25% for
brightness matching, visual alignment and dimensions,
0.065% for electrical and functional.
Maximum Ratings
DC Supply Voltage .........................................–0.5 V to +7.0 Vdc
Input Voltage, Respect to GND
(all inputs)............................................–0.5 V to
V
CC
+0.5 Vdc
Operating Temperature .....................................–40
°
C to +85
°
C
Storage Temperature.......................................–40°C to +100°C
Relative Humidity at 85°C
(non-condensing) .............................................................85%
Maximum Solder Temperature, 0.063" (1.59 mm)
below Seating Plane, t<5.0 s ........................................ 260°C
Optical Characteristics
Spectral Peak Wavelength
Red ...................................................................... 660 nm typ.
HER ..................................................................... 630 nm typ.
Green .................................................................. 565 nm typ.
Character Height .............................................0.270" (6.86 mm)
Time Averaged Luminous Intensity
at
V
CC
=5.0 V
Red................................................................ 60
µcd/LED
typ.
HER............................................................. 120
µcd/LED
typ.
Green .......................................................... 140
µcd/LED
typ.
Dot to Dot Intensity Matching
at
V
CC
=5.0 V ....................................................... 1.8:1.0 max.
LED to LED Hue Matching
(Green only) at
V
CC
=5.0 V ................................
±
2.0 nm max.
Viewing Angle (off normal axis)
Horizontal ..............................................................
±
50
°
max.
Vertical ...................................................................
±75°
max.
Figure 1. Top View
22 21 20 1918 17 16 15 14 13 12
Pins and Functions
Pin
1
2
3
4
5
6
7
8
9
10
11
Function
CE1 Chip Enable
CE2 Chip Enable
CE3
Chip Enable
CE4
Chip Enable
CLR
Clear
V
CC
A0 Digit Select
A1 Digit Select
WR
Write
CU Cursor Select
CUE Cursor Select
Pin
12
13
14
15
16
17
18
19
20
21
22
Function
GND
NC
BL
Blanking
NC
D0 Data Input
D1 Data Input
D2 Data Input
D3 Data Input
D4 Data Input
D5 Data Input
D6 Data Input
Figure 2. Timing Characteristics—Write Cycle Waveforms
CE1, CE2
CE3, C34
CU, CLR
2.0 V
0.8 V
Tces
Tcus
Tclrd
Tas
Tah
Tceh
Tcuh
A0, A1
2.0 V
0.8 V
2.0 V
0.8 V
Tds
Tdh
2.0 V
0.8 V
TW
Tacc
D0-D6
WR
Note:
These waveforms are not edge triggered.
digit 3 digit 2
digit 1 digit 0
1 2 3 4 5 6 7 8 9 10 11
DC Characteristics
Parameter
–40°C
Min.
I
CC
80 dots on
I
CC
Cursor
I
CC
Blank
I
IL
(all inputs)
V
IH
(all inputs)
V
IL
(all inputs)
V
CC
—
—
—
30
2.0
—
4.5
Typ.
150
—
2.8
60
—
—
5.0
Max.
190
170
4.0
120
—
0.8
5.5
+25°C
Min.
—
—
—
25
2.0
—
4.5
Typ.
135
—
2.3
50
—
—
5.0
Max.
165
140
3.0
100
—
0.8
5.5
+55°C
Min.
—
—
—
20
2.0
—
4.5
Typ.
118
—
2.0
40
—
—
5.0
Max.
150
125
2.5
80
—
0.8
5.5
mA
mA
mA
µ
A
V
V
V
V
CC
=5.0 V
V
CC
=5.0 V
V
CC
=5.0 V,
BL
=0.8 V
V
IN
=0.8 V,
V
CC
=5.0 V
V
CC
=5.0 V
V
CC
=5.0 V
—
DLR/DLO/DLG3416
Units
Condition
2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA
www.infineon.com/opto • 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany
www.osram-os.com • +49-941-202-7178
2
March 24, 2000-01
AC Characteristics
(guaranteed minimum timing parameters at
V
CC
=5.0 V ±0.5 V)
Parameter
Chip Enable Set Up Time
Address Set Up Time
Cursor Set Up Time
Chip Enable Hold Time
Address Hold Time
Cursor Hold Time
Clear Disable Time
Write Time
Data Set Up Time
Data Hold Time
Clear Time
Access Time
Note:
T
ACC
=Set Up Time+Write Time+Hold Time.
Symbol
T
CES
T
AS
T
CUS
T
CEH
T
AH
T
CUH
T
CLRD
T
W
T
DS
T
DH
T
CLR
T
ACC
–40
°
C
0
10
10
0
20
20
1.0
60
20
20
1.0
90
+25
°
C
0
10
10
0
30
30
1.0
70
30
30
1.0
110
+85
°
C
0
10
10
0
40
40
1.0
90
50
40
1.0
140
Unit
ns
ns
ns
ns
ns
ns
µ
s
ns
ns
ns
µ
s
ns
Figure 3. Internal Block Diagram
Display
Rows 0 to 6
3
Row Control Logic
&
Row Drivers
2
1
0
Columns 0 to 19
BL
OSC
÷
128
Counter
÷
7
Counter
Timing and Control Logic
RAM Read Logic
D6
D5
D4
D3
D2
D1
D0
Column Decoder
Row Decoder
Latches
7 Bit ASCII Code
ROM
128 X 35 Bit
ASCII
Character
Decode
4480 bits
Column Data
RAM
Memory
4 X 7 bit
Address Lines
Column Enable
Latches and
Column Drivers
Cursor
Memory
4 X 1 bit
Cursor Memory Bits 0 to 3
WR
A0
A1
Write
Address
Decoder
CUE
2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA
www.infineon.com/opto • 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany
www.osram-os.com • +49-941-202-7178
DLR/DLO/DLG3416
3
March 24, 2000-01
Table 1. Typical Loading Data State Table
Control
BL
H
H
H
H
H
H
H
H
H
H
L
H
H
H
CE1 CE2 CE3
X
L
X
X
X
X
H
H
H
H
X
H
X
H
X
X
L
X
X
X
H
H
H
H
X
H
X
H
X
X
X
H
X
X
L
L
L
L
X
L
X
L
CE4 CUE
X
X
X
X
H
X
L
L
L
L
X
L
X
L
L
L
L
L
L
L
L
L
L
L
X
L
L
L
CU
X
X
X
X
X
X
H
H
H
H
X
H
X
H
WR
H
X
X
X
X
H
L
L
L
L
H
L
X
L
CLR
H
H
H
H
H
H
H
H
H
H
H
H
L
H
X
Address
A1
A0
D6
D5
D4
Data
D3
D2
D1
D0
Display Digit
3
G
X
X
X
X
X
L
L
H
L
X
X
X
X
X
H
H
H
L
X
X
X
X
X
L
L
L
H
X
X
X
X
X
H
H
L
L
G
G
G
G
G
G
G
G
B
2
R
R
R
R
R
R
R
R
L
L
1
E
E
E
E
E
E
E
U
U
U
0
Y
Y
Y
Y
Y
Y
E
E
E
E
previously loaded display
X
X
X
X
X
L
L
H
H
X
H
X
X
X
X
X
L
H
L
H
X
H
X
X
X
X
X
H
H
H
L
L
L
X
X
X
X
X
L
L
L
L
X
X
X
X
X
L
H
L
L
blank display
L
L
L
H
H
H
G
—
see character set
L
U
E
clears character display
X
—
see character code
X=don’t care
Table 2. Loading Cursor State Table
Control
BL
H
H
H
H
H
H
H
H
H
H
CE1
X
X
H
H
H
H
H
X
H
X
CE2
X
X
H
H
H
H
H
X
H
X
CE
3
X
X
L
L
L
L
L
X
L
X
CE
4
X
X
L
L
L
L
L
X
L
X
CUE
L
H
H
H
H
H
H
L
L
H
CU
X
X
L
L
L
L
L
X
L
X
WR
H
H
L
L
L
L
L
H
L
H
CLR
H
H
H
H
H
H
H
H
H
H
Address
A1
A0
D6
D5
D4
Data
D3
D2
D1
D0
3
B
B
X
X
X
X
H
X
X
X
X
L
H
H
H
H
L
B
B
B
s
s
B
X
X
X
X
L
B
B
Digit
2
E
E
E
E
s
s
E
E
E
E
1
A
A
A
s
s
s
s
A
A
s
0
R
R
s
s
s
s
s
R
R
s
previously loaded display
display previously stored cursors
L
L
H
H
H
L
H
L
H
L
X
X
X
X
H
X
X
X
X
L
X
X
X
X
L
X
X
X
X
L
disable cursor display
H
H
X
X
display stored cursors
X=don’t care
s
= all dots on
2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA
www.infineon.com/opto • 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany
www.osram-os.com • +49-941-202-7178
DLR/DLO/DLG3416
4
March 24, 2000-01
Loading Data
Setting the chip enable (CE1, CE2, CE3, CE4) to their true state
will enable loading. The desired data code (D0-D6) and digit
address (A0, A1) must be held stable during the write cycle for
storing new data.
Data entry may be asynchronous and random. Digit 0 is defined
as right hand digit with A1=A2=0.
To clear the entire internal four-digit memory hold the clear
(CLR) low for 1.0
µs.
All illuminated dots will be turned off
within one complete display multiplex cycle, 1.0 msec mini-
mum. The clear function will clear both the ASCII RAM and
the cursor RAM.
Loading Cursor
Setting the chip enables (CE1,
CE2
, CE3, CE4) and cursor
select (CU) to their true state will enable cursor loading. A write
(WR) pulse will now store or remove a cursor into the digit loca-
tion addressed by A0, A1, as defined in data entry. A cursor will
be stored if D0=1 and will removed if D0=0. The cursor (CU)
pulse width should not be less than the write (WR) pulse or
erroneous data may appear in the display.
If the cursor is not required, the cursor enable signal (CUE) may
be tied low to disable the cursor function. For a flashing cursor,
simply pulse CUE. If the cursor has been loaded to any or all
positions in the display, then CUE will control whether the cur-
sor(s) or the characters will appear. CUE does not affect the
contents of cursor memory.
Display Blanking
Blank the display by loading a blank or space into each digit of
the display or by using the (BL) display blank input.
Setting the (BL) input low does not affect the contents of either
data or cursor memory. A flashing display can be achieved by
pulsing (BL). A flashing circuit can be constructed using a 555 a
stable multivibrator. Figure 4 illustrates a circuit in which vary-
ing R2 (100K~10K) will have a flash rate of 1.0 Hz~10 Hz.
The display can be dimmed by pulsing (BL) line at a frequency
sufficiently fast to not interfere with the internal clock. The dim-
ming signal frequency should be 2.5 kHz or higher. Dimming
the display also reduces power consumption.
An example of a simple dimming circuit using a 556 is illus-
trated in Figure 5. Adjusting potentiometer R3 will dim the dis-
play by changing the blanking pulse duty cycle.
Figure 4. Flashing Circuit Using a 555 and Flashing
(Blanking) Timing
VCC=5.0 V
1
2
3
To BL
Pin on
Display
4
555
Timer
8
7
6
5
C4
0.01
µF
R1
4.7 KΩ
R2
100 KΩ
C3
10
µF
1
0
Blanking Pulse Width
≈50%
Duty Factor
~
500 ms
~
~
2 Hz Blanking Frequency
~
Figure 5. Dimming Circuit Using a 556
VCC=5.0 V
R2
47 KΩ
R1
200Ω
C2
0.01
µF
1
2
3
4
5
C1
4700 pF
6
7
556
Dual Timer
Dimming (Blanking)
Control
14
13
12
11
10
9
8
To BL Pin
on Display
C4
0.01
µF
C3
1000 pF
R3
500 KΩ
1
Design Considerations
For details on design and applications of the DLX3416 using
standard bus configurations in multiple display systems, or par-
allel I/O devices, such as the 8255 with an 8080 or memory
mapped addressing on processors such as the 8080, Z80,
6502, or 6800, refer to Appnote 15 at www.infineon.com/opto.
0
~
200
µs
~
~
5 KHz Blanking Frequency
~
Blanking Pulse Width
4
µs
min., 196
µs
max.
2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA
www.infineon.com/opto • 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany
www.osram-os.com • +49-941-202-7178
DLR/DLO/DLG3416
5
March 24, 2000-01
