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54LS74 DM54LS74A DM74LS74A Dual Positive-Edge-Triggered

D Flip-Flops with Preset Clear and Complementary Outputs

June 1989

54LS74 DM54LS74A DM74LS74A

Dual Positive-Edge-Triggered D Flip-Flops

with Preset Clear and Complementary Outputs

General Description

This device contains two independent positive-edge-trig-

gered D flip-flops with complementary outputs The informa-

tion on the D input is accepted by the flip-flops on the posi-

tive going edge of the clock pulse The triggering occurs at a

voltage level and is not directly related to the transition time

of the rising edge of the clock The data on the D input may

be changed while the clock is low or high without affecting

the outputs as long as the data setup and hold times are not

violated A low logic level on the preset or clear inputs will

set or reset the outputs regardless of the logic levels of the

other inputs

Features

Alternate military aerospace device (54LS74) is avail-

able Contact a National Semiconductor Sales Office

Distributor for specifications

Connection Diagram

Dual-In-Line Package

TL F 6373 – 1

Order Number 54LS74DMQB 54LS74FMQB 54LS74LMQB

DM54LS74AJ DM54LS74AW DM74LS74AM or DM74LS74AN

See NS Package Number E20A J14A M14A N14A or W14B

Function Table

Inputs

CLR

CLK

Outputs

High Logic Level

Either Low or High Logic Level

Low Logic Level

Positive-going Transition

This configuration is nonstable that is it will not persist when either the preset

and or clear inputs return to their inactive (high) level

The output logic level of Q before the indicated input conditions were established

1995 National Semiconductor Corporation

TL F 6373

RRD-B30M105 Printed in U S A

Absolute Maximum Ratings

(Note)

If Military Aerospace specified devices are required

please contact the National Semiconductor Sales

Office Distributors for availability and specifications

Supply Voltage

Input Voltage

Operating Free Air Temperature Range

55 C to

125 C

DM54LS and 54LS

DM74LS

0 C to

70 C

Storage Temperature Range

65 C to

150 C

Note

The ‘‘Absolute Maximum Ratings’’ are those values

beyond which the safety of the device cannot be guaran-

teed The device should not be operated at these limits The

parametric values defined in the ‘‘Electrical Characteristics’’

table are not guaranteed at the absolute maximum ratings

The ‘‘Recommended Operating Conditions’’ table will define

the conditions for actual device operation

Recommended Operating Conditions

Symbol

CLK

Parameter

Min

Supply Voltage

High Level Input Voltage

Low Level Input Voltage

High Level Output Current

Low Level Output Current

Clock Frequency (Note 2)

Clock Frequency (Note 3)

Pulse Width

(Note 2)

Clock High

Preset Low

Clear Low

Pulse Width

(Note 3)

Clock High

Preset Low

Clear Low

Setup Time (Notes 1 and 2)

Setup Time (Notes 1 and 3)

Hold Time (Note 1 and 4)

Free Air Operating Temperature

DM54LS74A

Nom

Max

Min

4 75

0 4

DM74LS74A

Nom

Max

5 25

Units

0 4

MHz

125

Note 1

The symbol (

) indicates the rising edge of the clock pulse is used for reference

Note 2

15 pF R

2 kX T

25 C and V

Note 3

50 pF R

2 kX T

25 C and V

Note 4

25 C and V

Electrical Characteristics

over recommended operating free air temperature range (unless otherwise noted)

Symbol

Parameter

Input Clamp Voltage

High Level Output

Voltage

Low Level Output

Voltage

Conditions

Min I

e b

18 mA

Min I

Max

Max V

Min

Min I

Max

Max V

Min

4 mA V

Min

Input Current Max

Input Voltage

Max

DM54

DM74

DM54

DM74

Data

Clock

Preset

Clear

High Level Input

Current

Max

2 7V

Data

Clock

Clear

Preset

Low Level Input

Current

Max

0 4V

Data

Clock

Preset

Clear

Short Circuit

Output Current

Supply Current

Max

(Note 2)

Max (Note 3)

DM54

DM74

Min

Typ

(Note 1)

Max

1 5

Units

0 25

0 35

0 25

0 4

0 8

100

Note 1

All typicals are at V

5V T

25 C

Note 2

Not more than one output should be shorted at a time and the duration should not exceed one second For devices with feedback from the outputs where

shorting the outputs to ground may cause the outputs to change logic state an equivalent test may be performed where V

2 25V and 2 125V for DM54 and

DM74 series respectively with the minimum and maximum limits reduced by one half from their stated values This is very useful when using automatic test

equipment

Note 3

With all outputs open I

is measured with CLOCK grounded after setting the Q and Q outputs high in turn

Switching Characteristics

at V

5V and T

25 C (See Section 1 for Test Waveforms and Output Load)

Symbol

Parameter

From (Input)

To (Output)

2 kX

15 pF

Min

MAX

PLH

PHL

PLH

PHL

PLH

PHL

Maximum Clock Frequency

Propagation Delay Time

Low to High Level Output

Propagation Delay Time

High to Low Level Output

Propagation Delay Time

Low to High Level Output

Propagation Delay Time

High to Low Level Output

Propagation Delay Time

Low to High Level Output

Propagation Delay Time

High to Low Level Output

Clock to

Q or Q

Clock to

Q or Q

Preset

to Q

Preset

to Q

Clear

to Q

Clear

to Q

Max

50 pF

Min

Max

MHz

Units

Physical Dimensions

inches (millimeters)

Ceramic Leadless Chip Carrier Package (E)

Order Number 54LS74LMQB

NS Package Number E20A

14-Lead Ceramic Dual-In-Line Package (J)

Order Number 54LS74DMQB or DM54LS74AJ

NS Package Number J14A

Physical Dimensions

inches (millimeters) (Continued)

14-Lead Small Outline Molded Package (M)

Order Number DM74LS74AM

NS Package Number M14A

14-Lead Molded Dual-In-Line Package (N)

Order Number DM74LS74AN

NS Package Number N14A

参数对比

与DM54LS74AJ相近的元器件有：74LS74、DM54LS74A、DM54LS74AW、54LS74LMQB、54LS74FMQB、54LS74DMQB、54LS74、DM74LS74AM、DM74LS74AN。描述及对比如下：

型号	DM54LS74AJ	74LS74	DM54LS74A	DM54LS74AW	54LS74LMQB	54LS74FMQB	54LS74DMQB	54LS74	DM74LS74AM	DM74LS74AN
描述	LS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14	LS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14	LS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14	LS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14	LS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14	LS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14	LS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14	LS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14	LS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14	LS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14
系列	LS	LS	LS	LS	LS	LS	LS	LS	LS	LS
位数	1	1	1	1	1	1	1	1	1	1
功能数量	2	2	2	2	2	2	2	2	2	2
端子数量	14	14	14	14	14	14	14	14	14	14
输出极性	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY
温度等级	MILITARY	COMMERCIAL	COMMERCIAL	MILITARY	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
端子形式	THROUGH-HOLE	GULL WING	GULL WING	FLAT	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	THROUGH-HOLE
端子位置	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
触发器类型	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE
表面贴装	NO	Yes	Yes	YES	Yes	Yes	Yes	Yes	Yes	-
最大工作温度	-	70 Cel	70 Cel	-	70 Cel	70 Cel	70 Cel	70 Cel	70 Cel	70 Cel
最小工作温度	-	0.0 Cel	0.0 Cel	-	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel
最大供电/工作电压	-	5.25 V	5.25 V	-	5.25 V	5.25 V	5.25 V	5.25 V	5.25 V	5.25 V
最小供电/工作电压	-	4.75 V	4.75 V	-	4.75 V	4.75 V	4.75 V	4.75 V	4.75 V	4.75 V
额定供电电压	-	5 V	5 V	-	5 V	5 V	5 V	5 V	5 V	5 V
加工封装描述	-	0.150 INCH, MS-120, SOIC-14	0.150 INCH, MS-120, SOIC-14	-	0.150 INCH, MS-120, SOIC-14	0.150 INCH, MS-120, SOIC-14	0.150 INCH, MS-120, SOIC-14	0.150 INCH, MS-120, SOIC-14	0.150 INCH, MS-120, SOIC-14	0.300 INCH, PLASTIC, MS-001, DIP-14
状态	-	ACTIVE	ACTIVE	-	ACTIVE	ACTIVE	ACTIVE	ACTIVE	ACTIVE	ACTIVE
工艺	-	TTL	TTL	-	TTL	TTL	TTL	TTL	TTL	TTL
包装形状	-	RECTANGULAR	RECTANGULAR	-	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
包装尺寸	-	SMALL OUTLINE	SMALL OUTLINE	-	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	IN-LINE
端子间距	-	1.27 mm	1.27 mm	-	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	2.54 mm
端子涂层	-	TIN LEAD	TIN LEAD	-	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD
包装材料	-	PLASTIC/EPOXY	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
逻辑IC类型	-	D FLIP-FLOP	D FLIP-FLOP	-	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP
传播延迟TPD	-	35 ns	35 ns	-	35 ns	35 ns	35 ns	35 ns	35 ns	35 ns
最大-最小频率	-	25 MHz	25 MHz	-	25 MHz	25 MHz	25 MHz	25 MHz	25 MHz	25 MHz