19-6224; Rev 2; 3/12
Spread-Spectrum EconOscillator
General Description
The DS1086 EconOscillator™ is a programmable clock
generator that produces a spread-spectrum (dithered)
square-wave output of frequencies from 260kHz to
133MHz. The selectable dithered output reduces radi-
ated-emission peaks by dithering the frequency 2% or
4% below the programmed frequency. The DS1086 has
a power-down mode and an output-enable control for
power-sensitive applications. All the device settings are
stored in nonvolatile (NV) EEPROM memory allowing it
to operate in stand-alone applications.
Features
o
User-Programmable Square-Wave Generator
o
Frequencies Programmable from 260kHz to
133MHz
o
2% or 4% Selectable Dithered Output
o
Glitchless Output-Enable Control
o
2-Wire Serial Interface
o
Nonvolatile Settings
o
5V Supply
o
No External Timing Components Required
o
Power-Down Mode
o
10kHz Master Frequency Step Size
o
EMI Reduction
DS1086
Applications
Printers
Copiers
PCs
Computer Peripherals
Cell Phones
Cable Modems
Ordering Information
PART
DS1086U
DS1086U+
DS1086Z
DS1086Z+
TEMP RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
PIN-PACKAGE
8 µSOP
8 µSOP
8 SO
8 SO
Note:
Contact the factory for custom settings.
+Denotes
a lead(Pb)-free/RoHS-compliant package.
Typical Operating Circuit
DITHERED 260kHz TO
133MHz OUTPUT
V
CC
N.C.
OUT
SPRD
V
CC
GND
DECOUPLING CAPACITORS
(0.1µF and 0.01µF)
*SDA AND SCL CAN BE CONNECTED DIRECTLY HIGH IF THE DS1086 NEVER NEEDS
TO BE PROGRAMMED IN-CIRCUIT, INCLUDING DURING PRODUCTION TESTING.
SCL*
V
CC
Pin Configuration
TOP VIEW
MICRO-
PROCESSOR
XTL1/OSC1
XTL2/OSC2
OUT 1
SPRD 2
8
7
SCL
SDA
PDN
OE
DS1086
SDA*
PDN
OE
DS1086
V
CC
3
6
5
GND 4
µSOP/SO
EconOscillator is a trademark of Maxim Integrated Products, Inc.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Spread-Spectrum EconOscillator
DS1086
ABSOLUTE MAXIMUM RATINGS
Voltage on V
CC
Relative to Ground ......................-0.5V to +6.0V
Voltage on SPRD,
PDN,
OE, SDA,
SCL Relative to Ground (See Note 1).......-0.5 to (V
CC
+ 0.5V)
Continuous Power Dissipation (T
A
= +70°C)
µSOP (derate 4.5mW/°C above +70°C)........................362mW
SO (derate 5.9mW/°C above +70°C) .........................470.6mW
Note 1:
This voltage must not exceed 6.0V.
Junction Temperature ......................................................+150°C
Operating Temperature Range...............................0°C to +70°C
Storage Temperature Range .............................-55°C to +125°C
Soldering Temperature (reflow)
Lead(Pb)-free................................................................+260°C
Containing lead(Pb) .....................................................+240°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED DC OPERATING CONDITIONS
(V
CC
= 5V ±5%, T
A
= 0°C to +70°C.)
PARAMETER
Supply Voltage
High-Level Input Voltage
(SDA, SCL)
Low-Level Input Voltage
(SDA, SCL)
High-Level Input Voltage
(SPRD,
PDN,
OE)
Low-Level Input Voltage
(SPRD,
PDN,
OE)
SYMBOL
V
CC
V
IH
V
IL
V
IH
V
IL
(Note 1)
CONDITIONS
MIN
4.75
0.7 x
V
CC
-0.3
2
-0.3
TYP
5.00
MAX
5.25
V
CC
+
0.3
0.3 x
V
CC
V
CC
+
0.3
0.8
UNITS
V
V
V
V
V
DC ELECTRICAL CHARACTERISTICS
(V
CC
= 5V ±5%, T
A
= 0°C to +70°C.)
PARAMETER
High-Level Output Voltage (OUT)
Low-Level Output Voltage (OUT)
High-Level Input Current
Low-Level Input Current
Supply Current (Active)
Standby Current (Power-Down)
SYMBOL
V
OH
V
OL
I
IH
I
IL
I
CC
I
CCQ
I
OL
= 4mA
V
CC
= 5.25V
V
IL
= 0V
C
L
= 15pF (output at default frequency)
Power-down mode
-1
35
35
CONDITIONS
I
OH
= -4mA, V
CC
= min
MIN
2.4
0.4
1
TYP
MAX
UNITS
V
V
µA
µA
mA
µA
2
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Spread-Spectrum EconOscillator
MASTER OSCILLATOR CHARACTERISTICS
(V
CC
= 5V ±5%, T
A
= 0°C to +70°C.)
PARAMETER
Master Oscillator Range
Default Master Oscillator Frequency
Master Oscillator Frequency
Tolerance
Voltage Frequency Variation
SYMBOL
f
OSC
f
0
∆
f
0
f
0
∆
f
V
f
0
∆
f
T
f
0
∆
f
f
0
INL
V
CC
= 5V,
T
A
= +25°C
(Notes 3,17)
Over voltage range,
T
A
= +25°C (Note 4)
Over temperature
range, V
CC
= 5V
(Note 5)
Default frequency (f
0
)
DAC step size
Default frequency
DAC step size
Default frequency
133MHz
66MHz
-0.75
-0.75
-0.75
-0.75
-0.5
-0.5
-1.0
2
4
-0.4
10
10.24
500
5.12
RANGE
(5 LSBs of
RANGE register)
f
0
/4096
+0.4
(Note 2)
CONDITION
MIN
66
97.1
+0.75
%
+0.75
+0.75
+0.75
+0.5
+0.5
+1.0
%
%
kHz
MHz
decimal
MHz
%
%
TYP
MAX
133
UNITS
MHz
MHz
DS1086
Temperature Frequency Variation
Dither Frequency Range
Integral Nonlinearity of Frequency
DAC
DAC Step Size
DAC Span
DAC Default
Offset Step Size
Prescaler bit J0 = 1 (Note 6)
Prescaler bit J0 = 0 (Note 6)
Entire range (Note 7)
∆
between two consecutive DAC values
(Note 8)
Frequency range for one offset setting
(see Table 2)
Factory default register setting
∆
between two consecutive offset values
(see Table 2)
Offset Default
Dither Rate
OS
Factory default OFFSET register setting
(5 LSBs) (see Table 2)
hex
Hz
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3
Spread-Spectrum EconOscillator
DS1086
AC ELECTRICAL CHARACTERISTICS
(V
CC
= 5V ±5%, T
A
= 0°C to +70°C.)
PARAMETER
Frequency Stable After Prescaler
Change
Frequency Stable After DAC or
Offset Change
Power-Up Time
Enable of OUT After Exiting
Power-Down Mode
OUT High-Z After Entering
Power-Down Mode
Load Capacitance
Output Duty Cycle (OUT)
PDN
Rise/Fall Time
(Note 9)
t
por
+ t
stab
(Note 10)
t
stab
t
pdn
C
L
(Note 11)
40
15
0.2
0.1
SYMBOL
CONDITION
MIN
TYP
MAX
1
1
0.5
500
0.1
50
60
1
UNITS
Period
ms
ms
µs
ms
pF
%
µs
AC ELECTRICAL CHARACTERISTICS: 2-WIRE INTERFACE
(V
CC
= 5V ±5%, T
A
= 0°C to +70°C.)
PARAMETER
SCL Clock Frequency
Bus Free Time Between a STOP
and START Condition
Hold Time (Repeated) START
Condition
LOW Period of SCL
HIGH Period of SCL
Setup Time for a Repeated
START
Data Hold Time
Data Setup Time
Rise Time of Both SDA and SCL
Signals
Fall Time of Both SDA and SCL
Signals
SYMBOL
f
SCL
t
BUF
t
HD:STA
t
LOW
t
HIGH
t
SU:STA
t
HD:DAT
t
SU:DAT
t
R
t
F
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
CONDITION
(Note 12)
(Note 12)
(Notes 12, 13)
(Note 12)
(Note 12)
(Note 12)
(Notes 12, 14, 15)
(Note 12)
(Note 16)
(Note 16)
1.3
4.7
0.6
4.0
1.3
4.7
0.6
4.0
0.6
4.7
0
100
250
20 + 0.1C
B
20 + 0.1C
B
20 + 0.1C
B
20 + 0.1C
B
0.9
MIN
TYP
MAX
400
100
UNITS
kHz
µs
µs
µs
µs
µs
µs
ns
300
1000
300
1000
ns
ns
4
_______________________________________________________________________________________
Spread-Spectrum EconOscillator
AC ELECTRICAL CHARACTERISTICS: 2-WIRE INTERFACE (continued)
(V
CC
= 5V ±5%, T
A
= 0°C to +70°C.)
PARAMETER
Setup Time for STOP
Capacitive Load for Each Bus
Line
NV Write-Cycle Time
Input Capacitance
SYMBOL
t
SU:STO
C
B
t
WR
C
I
5
Fast mode
Standard mode
(Note 16)
CONDITION
MIN
0.6
4.0
400
10
TYP
MAX
UNITS
µs
pF
ms
pF
DS1086
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10:
Note 11:
Note 12:
Note 13:
Note 14:
Note 15:
Note 16:
Note 17:
All voltages are referenced to ground.
DAC and OFFSET register settings must be configured to maintain the master oscillator frequency within this range.
Correct operation of the device is not guaranteed if these limits are exceeded.
This is the absolute accuracy of the master oscillator frequency at the default settings.
This is the change that is observed in master oscillator frequency with changes in voltage from nominal voltage at
T
A
= +25°C.
This is the percentage frequency change from the +25°C frequency due to temperature at V
CC
= 5V. The maximum tem-
perature change varies with the master oscillator frequency setting. The minimum occurs at the default master oscillator
frequency (f
default
). The maximum occurs at the extremes of the master oscillator frequency range (66MHz or 133MHz)
(see Figure 2).
The dither deviation of the master oscillator frequency is unidirectional and lower than the undithered frequency.
The integral nonlinearity of the frequency adjust DAC is a measure of the deviation from a straight line drawn between the
two endpoints of a range. The error is in percentage of the span.
This is true when the prescaler = 1.
Frequency settles faster for small changes in value. During a change, the frequency transitions smoothly from the original
value to the new value.
This indicates the time elapsed between power-up and the output becoming active. An on-chip delay is intentionally
introduced to allow the oscillator to stabilize. t
stab
is equivalent to approximately 512 master clock cycles and therefore
depends on the programmed clock frequency.
Output voltage swings can be impaired at high frequencies combined with high output loading.
A fast-mode device can be used in a standard-mode system, but the requirement t
SU:DAT
> 250ns must then be met.
This is automatically the case if the device does not stretch the LOW period of the SCL signal. If such a device does
stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line at least t
R MAX
+ t
SU:DAT
=
1000ns + 250ns = 1250ns before the SCL line is released.
After this period, the first clock pulse is generated.
A device must internally provide a hold time of at least 300ns for the SDA signal (referred to as the V
IH MIN
of the SCL sig-
nal) in order to bridge the undefined region of the falling edge of SCL.
The maximum t
HD:DAT
need only be met if the device does not stretch the LOW period (t
LOW
) of the SCL signal.
C
B
—total capacitance of one bus line, timing referenced to 0.9 x V
CC
and 0.1 x V
CC
.
Typical frequency shift due to aging is ±0.5%. Aging stressing includes Level 1 moisture reflow preconditioning (24hr
+125°C bake, 168hr 85°C/85%RH moisture soak, and 3 solder reflow passes +240 +0/-5°C peak) followed by 1000hr
max V
CC
biased 125°C HTOL, 1000 temperature cycles at -55°C to +125°C, 96hr 130°C/85%RH/5.5V HAST and 168hr
121°C/2 ATM Steam/Unbiased Autoclave.
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