Product Specification
10km 100GBASE-LR4 QSFP28 Optical Transceiver Module
FTLC1154RDPL
PRODUCT FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
Hot-pluggable QSFP28 form factor
Supports 103.1Gb/s aggregate bit
rate
Power dissipation < 3.5W
RoHS-6 compliant
Commercial case temperature range
of 0°C to 70°C
Adaptive CTLE
Single 3.3V power supply
Maximum link length of 10km on
Single Mode Fiber (SMF)
4x25Gb/s DFB-based
LAN-WDM transmitter
4x25G retimed electrical interface
Duplex LC receptacles
I2C management interface
APPLICATIONS
•
100GBASE-LR4 100G Ethernet
Finisar’s FTLC1154RDPL QSFP28 transceiver modules are designed for use in 100
Gigabit Ethernet links on up to 10km of single mode fiber. They are compliant with the
QSFP28 MSA
1
, IEEE 802.3ba 100GBASE-LR4
2
and IEEE 802.3bm CAUI-4
3
. Digital
diagnostic functions are available via the I2C interface, as specified by the QSFP28 MSA
and Finisar Application Notes AN-2152
4
and AN-2153
5
. The optical transceiver is
compliant per the RoHS-6 Directive 2011/65/EU
6
. See Finisar Application Note AN-
2038
7
for more details.
PRODUCT SELECTION
FTLC1154RDPL
4:
R:
D:
P:
L:
Gen 2
100GE-LR4 maximum bit rate (103.1 Gb/s)
4x25G LAN-WDM optical architecture
Pull-tab release
LC straight receptacles
Finisar Corporation – 13-July-2018
Rev. B2
Page 1
FTLC1154RDPL Product Specification – July 2018
I.
Pin Descriptions
Figure 1 – QSFP28-compliant 38-pin connector (per SFF-8679)
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Symbol
GND
Tx2n
Tx2p
GND
Tx4n
Tx4p
GND
ModSelL
ResetL
Vcc Rx
SCL
SDA
GND
Rx3p
Rx3n
GND
Rx1p
Rx1n
GND
GND
Rx2n
Rx2p
GND
Rx4n
Rx4p
GND
ModPrsL
IntL
Vcc Tx
Vcc1
LPMode
Name/Description
Ground
Transmitter Inverted Data Input
Transmitter Non-Inverted Data Input
Ground
Transmitter Inverted Data Input
Transmitter Non-Inverted Data Input
Ground
Module Select
Module Reset
+3.3 V Power supply receiver
2-wire serial interface clock
2-wire serial interface data
Ground
Receiver Non-Inverted Data Output
Receiver Inverted Data Output
Ground
Receiver Non-Inverted Data Output
Receiver Inverted Data Output
Ground
Ground
Receiver Inverted Data Output
Receiver Non-Inverted Data Output
Ground
Receiver Inverted Data Output
Receiver Non-Inverted Data Output
Ground
Module Present
Interrupt
+3.3 V Power supply transmitter
+3.3 V Power Supply
Low Power Mode
Rev. B2
Notes
1
1
1
1
1
1
1
1
1
Finisar Corporation – 13-July-2018
Page 2
FTLC1154RDPL Product Specification – July 2018
32
33
34
35
36
37
38
GND
Tx3p
Tx3n
GND
Tx1p
Tx1n
GND
Ground
Transmitter Non-Inverted Data Input
Transmitter Inverted Data Input
Ground
Transmitter Non-Inverted Data Input
Transmitter Inverted Data Input
Ground
1
1
1
Notes
1. Circuit ground is internally isolated from chassis ground.
2. The IntL pin (“Interrupt Low”, pin 28) can be configured to act as an Rx_LOS output;
The LPMode pin (“Low Power Mode”, pin 31) can be configured to act as an input for Tx_Disable;
See Finisar Application Note AN-2038
8
for more details.
II.
Absolute Maximum Ratings
Module performance is not guaranteed beyond the operating range (see Section VI).
Exceeding the limits below may damage the transceiver module permanently.
Parameter
Maximum Supply Voltage
Storage Temperature
Case Operating Temperature
Relative Humidity
Receiver Damage Threshold, per Lane
Notes:
1. Non-condensing.
Symbol
Vcc
T
S
T
OP
RH
P
Rdmg
Min
-0.5
-40
0
15
5.5
Typ
Max
3.6
+85
+70
85
Unit
V
C
C
%
dBm
Ref.
1
III.
Electrical Characteristics
(EOL, T
OP
= 0 to +70
C,
V
CC
= 3.135 to 3.465 Volts)
Symbol
Vcc
Icc
P
Min
3.135
Typ
Max
3.465
1.12
3.5
Unit
V
A
W
GBd
mV
dB
dB
%
UI
mV
mV
GBd
mVpp
UI
dB
Page 3
2
Ref.
Parameter
Supply Voltage
Supply Current
Module total power
Transmitter
Signaling rate per lane
Differential data input swing per lane
Differential input return loss (min)
Differential to common mode input
return loss (min)
Differential termination mismatch
Stressed input parameters
Eye width
Applied pk-pk sinusoidal jitter
Eye height
DC common mode voltage
Receiver
Signaling rate per lane
Differential data output swing
Eye width
Vertical eye closure
Finisar Corporation – 13-July-2018
1
Vin,pp
RLd(f)
RLdc(f)
25.78125 ± 100 ppm
900
9.5 – 0.37f, 0.01≤f<8
4.75 – 7.4log
10
(f/14), 8 ≤f<19
22-20(f/25.78), 0.01≤f<12.89
15-6(f/25.78), 12.89≤f<19
10
0.46
Per IEEE 802.3bm Table 88-13
95
-350
2850
25.78125 ± 100 ppm
100
400
300
600
400
800
600
1200
0.57
5.5
Vout,pp
Rev. B2
FTLC1154RDPL Product Specification – July 2018
Differential output return loss (min)
Common to differential mode
conversion return loss (min)
Differential termination mismatch
Transition time, 20% to 80%
RLd(f)
RLdc(f)
t
r
t
f
9.5 – 0.37f, 0.01≤f<8
4.75 – 7.4log
10
(f/14), 8 ≤f<19
22-20(f/25.78), 0.01≤f<12.89
15-6(f/25.78), 12.89≤f<19
10
12
dB
dB
%
ps
Notes:
1. Maximum total power value is specified across the full temperature and voltage range. Power
consumption ≤ 3.5W when stabilized, but may be > 3.5W during locking acquisition.
2. Output voltage is settable in 4 discrete ranges via I2C. Default range is 400 – 800 mV.
IV.
Optical Characteristics
(EOL, T
OP
= 0 to +70
C,
V
CC
= 3.135 to 3.465 Volts)
Parameter
Symbol
Min
Typ
Max
Unit
Gb/s
nm
Ref.
1
Transmitter
Signaling Speed per Lane
Lane center wavelengths (range)
Total Average Launch Power
Transmit OMA per Lane
Average Launch Power per Lane
Optical Extinction Ratio
Sidemode Suppression ratio
Average launch power of OFF
transmitter, per lane
Relative Intensity Noise
Optical Return Loss Tolerance
Transmitter Reflectance
Transmitter eye mask definition {X1,
X2, X3, Y1, Y2, Y3}
Receiver
Signaling Speed per Lane
Lane center wavelengths (range)
P
OUT
TxOMA
TXP
x
ER
SSR
min
25.78125 ± 100 ppm
1294.53 – 1296.59
1299.02 – 1301.09
1303.54 – 1305.63
1308.09 – 1310.19
10.5
-1.3
4.5
-4.3
4.5
4
30
-30
-130
20
-12
{0.25, 0.4, 0.45, 0.25, 0.28, 0.4}
dBm
dBm
dBm
dB
dB
dBm
dB/Hz
dB
dB
2,7
RIN
3
GBd
nm
25.78125 ± 100 ppm
1294.53 – 1296.59
1299.02 – 1301.09
1303.54 – 1305.63
1308.09 – 1310.19
4
Receive Power (OMA) per Lane
RxOMA
4.5
dBm
Average Receive Power per Lane
RXP
x
-10.6
4.5
dBm
5,7
Receiver Sensitivity (OMA) per Lane
Rxsens
-8.6
dBm
Return Loss
RL
-26
dB
Stressed Receiver Sensitivity (OMA)
SRS
-6.8
dBm
6
per Lane
Receive electrical 3 dB upper cutoff
31
GHz
frequency, per lane
LOS De-Assert
LOS
D
-11.6
dBm
LOS Assert
LOS
A
-24
-13.6
dBm
LOS Hysteresis
1.2
dB
Notes:
1. Transmitter consists of 4 lasers operating at 25.78Gb/s each.
2. Minimum value is informative.
3. Hit ratio 5x10
-5
.
4. Receiver consists of 4 photodetectors operating at 25.78Gb/s each.
5. Minimum value is informative, equals min TxOMA with infinite ER and max channel insertion loss.
6. SRS is measured with vertical eye closure penalty of 1.8 dB max, J2 of 0.30 UI, and J9 of 0.47 UI.
Finisar Corporation – 13-July-2018
Rev. B2
Page 4
FTLC1154RDPL Product Specification – July 2018
7.
Power value and power accuracy are with all channels on.
V.
General Specifications
Min
Typ
Max
103.1
10
-12
Units
Gb/s
Ref.
1
2
Parameter
Symbol
Bit Rate (all wavelengths combined)
BR
Bit Error Ratio @25.78Gb/s
BER
Maximum Supported Distances
Fiber Type
SMF per G.652
Lmax
Notes:
1.
Supports 100GBASE-LR4 per IEEE 802.3ba.
2. Tested with a 2
31
– 1 PRBS.
10
km
VI.
Environmental Specifications
Finisar FTLC1154RDPL QSFP28 transceivers have an operating case temperature range
of 0°C to +70°C.
Parameter
Case Operating Temperature
Storage Temperature
Symbol
T
op
T
sto
Min
0
-40
Typ
Max
+70
+85
Units
°C
°C
Ref.
VII.
Regulatory Compliance
Finisar FTLC1154RDPL QSFP28 transceivers are Class 1 Laser Products. They are
certified per the following standards:
Feature
Laser Eye Safety
Agency
FDA/CDRH
CSA
TüV
CSA
TüV
UL/CSA
Standard
CDRH 21 CFR 1040 and Laser Notice 50
IEC60825-2:2004+A1+A2
EN60825-1:2014 & EN60825-2:2006+A1+A2
IEC60950-1:2005+A1+A2
EN60950-1:2006+A11+A1+A12+A2
CLASS 3862.13 & CLASS 3862.93
Electrical Safety
Copies of the referenced certificates are available at Finisar Corporation upon request.
VIII. Digital Diagnostics Functions
FTLC1154RDPL QSFP28 transceivers support the I2C-based diagnostics interface
specified by the SFF Commitee
1
. See also Finisar Application Notes AN-2152
4
and AN-
2153
5
.
Finisar Corporation – 13-July-2018
Rev. B2
Page 5
