Intel
®
Ethernet Controller X710/
XXV710/XL710 Datasheet
Ethernet Networking Division (ND)
Order No.: 332464-015
Revision: 3.6
November 2018
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2
Front Matter — Ethernet Controller X710/XXV710/XL710
Revision History
Revision
3.6
Date
November 2018
Notes
Added NVM Recovery Mode Information.
Sections revised:
• 6.0 (Non-volatile Memory Map).
• 7.4.9.5.9.11 (Add Cloud Filters Command; Opcode: 0x025C).
• 7.4.9.5.9.12 (Remove Cloud filters; 0x025D).
• 7.10 (Admin Queues).
• 10.0 (Programming Interface).
• 12.0 (Reliability, Diagnostics and Testability).
• 13.5 (SVR Board Connectivity Guidelines).
• 14.3 (Power Supplies).
Table revised:
• 2-14 (Integrated SVR pins).
• 13-1 (Absolute Maximum Ratings).
• 13-2 (Recommended Operating Conditions).
• B-16 (Integrated SVR pins).
Removed references to 802.1BR.
Changing branding string from 710 Series to X710/XXV710/XL710.
Updated Table 14-5 (Proposed Flash Device; Winbond Flash device part number).
Initial Release (Intel Public).
Sections revised:
13.5.2 (VCCD connectivity).
Tables revised:
2-14 (Integrated SVR pins).
2-16 (Pull-up and pull-down resistors).
B-16 (Integrated SVR pins).
Sections revised:
• 2.2.3 (NC-SI interface pins).
• 2.2.11 (Power supply pins).
• 13.2.2 (Recommended Operating Conditions).
Table revised:
• B-20 (0.86V External AVDD power supply specification).
Sections revised:
• 2.2.11 (Power supply pins).
• 13.2.1 (Absolute Maximum Ratings).
• 13.2.2 (Recommended Operating Conditions).
• 13.5.2 (VCCD connectivity).
• B.3.6 (Mechanical package).
• B.10 (Power Supplies).
• B.10.1 (Power Supply Sequencing; updated figure).
• B.10.2 (Power Supply Filtering).
Figure removed:
• Figure B.2 (AVDD power noise mask).
Table revised:
• 13-4 (External VCCD Power Supply Specification).
• B-20 (0.86V External AVDD power supply specification).
• B-20 (1.00V External AVDD power supply specification).
• B-28 (Minimum Number of Bypass Capacitors Per Power Rail).
•
•
•
Removed Section 6.3.16. Duplication of Section 6.3.15.
Added Intel
®
Ethernet Controller XXV710-specific information.
Added 25 Gb/s functionality.
3.5
3.4
3.3
3.2
3.1
February 2018
January 2018
September 2017
September 2017
June 2017
3.0
April 2017
2.9
March 2017
2.8
2.7
2.6
January 2017
December 2016
December 2016
3
Ethernet Controller X710/XXV710/XL710 — Front Matter
Revision
2.5
Date
March 2016
Notes
• Reflects the latest X710/XXV710/XL710 firmware release (FVL5).
• Removed all references to FCoE. X710/XXV710/XL710 does not support FCoE.
• Removed all references to Storm Control.
• Added GLPRT_ERRBC and GLPRT_MSPDC register information.
Sections added:
• 14.12.3 (POR without power cycle for NVM update).
Sections revised:
• 5.2.2 (PCIe link power management; removed ASPM statements).
• 7.7.1.2.2 (Normal Partitioning of Rx Packet Buffer; setting a null low watermark is not
allowed).
• 7.11.3 (Statistics Consistency Rules; added debug register description).
• 8.4.3.1.2 (Transmit Queue Disable Flow; updated cross reference).
• 10.2.2.2.44 (PCIe PM Support - GLPCI_PMSUP (0x000BE4B0; RO); changed bit
settings to reserved).
• 10.2.2.16.32 (Port Unicast Packets Received Count High; updated description for bits
15:0).
• 11.3.5.7 (Link Capabilities Register (0xAC; RO); updated description for bits 11:10).
• 15.10 (Common application schematic; changed pin Y19 to Y17).
Table revised:
13-16 (t
CSS
value).
13-22 (Duty cycle value).
Sections revised:
• 6.3.12.5 and 6.3.12.6 (added Combo Image Version offset information).
• 6.3.16.12.3 (changed Length default value to 0x10).
• 14.5 (SVR Board Connectivity Guidelines).
• 14.6.5.2 (Clock Generator Specification description and note).
Table revised:
• 16-1 (TDP specification).
Fourth Release (Intel Public).
Third Release (Intel Public).
Second Release (Intel Public).
Initial Release (Intel Public).
2.4
October 2015
2.3
2.2
2.1
2.0
July 2015
May 2015
December 2014
July 2014
4
Introduction — Ethernet Controller X710/XXV710/XL710
1.0
Introduction
This document describes the external architecture (including device operation, pin descriptions, register
definitions, etc.) for the Intel
®
Ethernet Controller X710/XXV710/XL710 (X710/XXV710/XL710), a
dual-port 40 Gigabit Ethernet (GbE), dual-port 25 GbE
1
, or quad-port 10 GbE Network Interface
Controller. It reflects the silicon device capability while the
Intel
®
Ethernet Controller X710/XXV710/
XL710 Feature Support Matrix
reflects the features and interfaces actually supported in the NVM and
software (http://www.intel.com/content/www/us/en/embedded/products/networking/xl710-ethernet-
controller-feature-matrix.html).
This document is intended as a reference for architects, logic designers, firmware and software device
driver developers, board designers, test engineers, or anyone else who might need specific technical or
programming information about the X710/XXV710/XL710.
The X710/XXV710/XL710 combines standard Ethernet stateless Network Interface Card (NIC) and
Internet Small Computer System Interface (iSCSI) block storage acceleration functionality into a single
silicon device. It is designed to address the target markets listed in
Table 1-1.
Note:
The X710/XXV710/XL710 does NOT support Fibre Channel over Ethernet (FCoE).
Table 1-1.
X710/XXV710/XL710 target markets
Description
Cloud networking — In the emerging cloud networking market, where computing infrastructure and software are
sold as services, and where the large data centers of Internet portal companies such as Google*, Microsoft* and
Amazon* drive unique requirements, the X710/XXV710/XL710 has these strengths: networking performance,
energy efficiency, automation (including resource provisioning and monitoring, and workload balancing),
sophisticated packet header parsing, and quality open source drivers.
As shown in
Figure 1-1,
the X710/XXV710/XL710 is targeted for use in rack mounted or pedestal
servers, where it can be deployed as an add-in NIC or LAN on Motherboard (LOM). Some types of
Ethernet cables, such as SFP+ direct attach, can be driven directly by the X710/XXV710/XL710, while
other types, such as 10GBASE-T, require the external Physical Layer (PHY) component(s) shown. The
X710/XXV710/XL710 can connect up to four Ethernet ports or it can be configured to connect two 40
GbE ports. The X710/XXV710/XL710 is also targeted for use in blade servers, where it can be deployed
as a mezzanine card or LOM. The X710/XXV710/XL710 supports direct connection to backplanes that
support the following signaling standards: 40GBASE-KR4 (up to two ports) or 1000BASE-KX (up to four
ports supported).
Blade backplanes typically connect Ethernet controllers in a dual-redundant star to two separate
Ethernet switches. In this configuration, the X710/XXV710/XL710 can be connected with up to 2 x 10
GbE ports per switch or 1 x 40 GbE port per switch.
1.
Pinout and mechanical specifications for the Intel
®
Ethernet Controller XXV710 (XXV710) are described in
Appendix B.
5
微控制器 MCU
