HI-1579, HI-1581
February 2017
MIL-STD-1553 / 1760
3.3V Monolithic Dual Transceivers
PIN CONFIGURATIONS
44 -
43 BUSA
42 BUSA
41 BUSA
40 BUSA
39 VDDA
38 VDDA
37 TXA
36 TXA
35 -
34 -
- 1
RXENA 2
GNDA 3
GNDA 4
GNDA 5
VDDB 6
VDDB 7
BUSB 8
BUSB 9
BUSB 10
BUSB 11
DESCRIPTION
The HI-1579 and HI-1581 are low power CMOS dual
transceivers designed to meet the requirements of the
MIL-STD-1553 and MIL-STD-1760 specifications.
The transmitter section of each bus takes complementary
CMOS / TTL Manchester II bi-phase data and converts it to
differential voltages suitable for driving the bus isolation
transformer. Separate transmitter inhibit control signals are
provided for each transmitter.
The receiver section of the each bus converts the 1553 bus
bi-phase data to complementary CMOS / TTL data suitable
for input to a Manchester decoder. Each receiver has a
separate enable input, which forces the receiver outputs to
logic "0" (HI-1579) or logic 1 (HI-1581).
To minimize the package size for this function, the
transmitter outputs are internally connected to the receiver
inputs, so that only two pins are required for connection to
each coupling transformer.
1579PCI
1579PCT
1579PCM
1581PCI
1581PCT
1581PCM
12
13
14
15
16
17
18
19
20
21
22
33 -
32 -
31 TXINHA
30 RXA
29 RXA
28 -
27 -
26 TXB
25 TXB
24 TXINHB
23 -
44 Pin Plastic 7mm x 7mm
Chip-scale package
VDDA 1
BUSA 2
BUSA 3
RXENA 4
GNDA 5
VDDB 6
BUSB 7
BUSB 8
RXENB 9
GNDB 10
20
19
18
17
16
15
14
13
12
11
TXA
TXA
TXINHA
RXA
RXA
TXB
TXB
TXINHB
RXB
RXB
FEATURES
·
Compliant
to MIL-STD-1553A and B,
MIL-STD-1760 and ARINC 708A
·
3.3V single supply operation
·
Smallest footprint available in 7mm x 7mm
44 pin plastic chip-scale package (QFN)
20 Pin Plastic ESOIC - WB package
VDDA 1
BUSA 2
BUSA 3
RXENA 4
GNDA 5
VDDB 6
BUSB 7
BUSB 8
RXENB 9
GNDB 10
20 TXA
19 TXA
·
1.0W
typical power dissipation
(50% duty cycle)
and extended temperature
ranges
·
Industrial
·
Industry standard pin configurations
20 Pin Ceramic DIP package
HOLT INTEGRATED CIRCUITS
(DS1579 Rev. P)
www.holtic.com
02/17
-
-
-
-
RXENB
GNDB
GNDB
GNDB
RXB
RXB
-
1579PSI
1579PST
1579PSM
1581PSI
1581PST
1581PSM
1579CDI
1579CDT
1579CDM
1581CDI
1581CDT
1581CDM
18 TXINHA
17 RXA
16 RXA
15 TXB
14 TXB
13 TXINHB
12 RXB
11 RXB
HI-1579, HI-1581
PIN DESCRIPTIONS
PIN
(DIP & SOIC)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
-
PIN
(QFN)
38, 39
40, 41
42, 43
2
3, 4, 5
6, 7
8, 9
10, 11
16
17, 18, 19
20
21
24
25
26
29
30
31
36
37
1, 12, 13, 14, 15
33, 34, 35, 44
SYMBOL
VDDA
BUSA
BUSA
RXENA
GNDA
VDDB
BUSB
BUSB
RXENB
GNDB
RXB
RXB
TXINHB
TXB
TXB
RXA
RXA
TXINHA
TXA
TXA
No
FUNCTION
power supply
analog
analog
digital input
power supply
power supply
analog
analog
digital input
power supply
digital output
digital output
digital input
digital input
digital input
digital output
digital output
digital input
digital input
digital input
-
DESCRIPTION
+3.3 volt power for transceiver A
MIL-STD-1533 bus driver A, positive signal
MIL-STD-1553 bus driver A, negative signal
Receiver A enable. If low, forces RXA and RXA low
Ground for transceiver A
+3.3 volt power for transceiver B
MIL-STD-1533 bus driver B, positive signal
MIL-STD-1553 bus driver B, negative signal
Receiver B enable. If low, forces RXB and RXB low
Ground for transceiver B
Receiver B output, inverted
Receiver B output, non-inverted
Transmit inhibit, bus B. If high BUSB, BUSB disabled
Transmitter B digital data input, non-inverted
Transmitter B digital data input, inverted
Receiver A output, inverted
Receiver A output, non-inverted
Transmit inhibit, bus A. If high BUSA, BUSA disabled
Transmitter A digital data input, non-inverted
Transmitter A digital data input, inverted
-
22, 23, 27, 28, 32 Connect
FUNCTIONAL DESCRIPTION
The HI-1579 family of dual data bus transceivers contains
differential voltage source drivers and differential receiv-
ers. It is intended for applications using a MIL-STD-1553
A/B data bus. The device produces a trapezoidal output
waveform during transmission.
TRANSMITTER
Data input to the device’s transmitter section is from the
complementary CMOS inputs TXA/B and TXA/B. The
transmitter accepts Manchester II bi-phase data and con-
verts it to differential voltages on BUSA/B and BUSA/B.
The transceiver outputs are either direct- or transformer-
coupled to the MIL-STD-1553 data bus. Both coupling
methods produce a nominal voltage on the bus of 7.5 volts
peak to peak.
The transmitter is automatically inhibited and placed in the
high impedance state when both TXA/B and TXA/B are
driven with the same logic state. A logic “1” applied to the
TXINHA/B input forces the transmitter to the high imped-
ance state, regardless of the state of TXA/B and TXA/B.
RECEIVER
The receiver accepts bi-phase differential data from the
MIL-STD-1553 bus through the same direct- or trans-
former- coupled interface as the transmitter. The re-
ceiver’s differential input stage drives a filter and threshold
comparator to produce CMOS data at the RXA/B and RXA/B
output pins. When the MIL-STD-1553 bus is idle and RXENA
or RXENB are high, RXA/B will be logic “0” on HI-1579 and
logic “1” on HI-1581.
The receiver outputs are forced to the bus idle state (logic "0”
for HI-1579 or logic “1” for HI-1581) when the RXENA or
RXENB is low.
MIL-STD-1553 BUS INTERFACE
A direct-coupled interface (see Figure 2) uses a 1:2.5 ratio
isolation transformer and two 55 ohm isolation resistors
between the transformer and the bus. The primary center-tap
of the isolation transformer must be connected to GND.
In a transformer-coupled interface (see Figure 2), the
transceiver is also connected to a 1:2.5 isolation transformer
which in turn is connected to a 1:1.4 coupling transformer. The
transformer coupled method also requires two coupling
resistors equal to 75% of the bus characteristic impedance
(Zo) between the coupling transformer and the bus.
Figure 3 and Figure 4 show test circuits for measuring
electrical characteristics of both direct- and transformer-
coupled interfaces respectively.
(See electrical
characteristics on the following pages).
HOLT INTEGRATED CIRCUITS
2
HI-1579, HI-1581
Each Bus
TRANSMITTER
Data Bus
Isolation
Transformer
Coupler
Network
Direct or
Transformer
BUSA/B
TXA/B
Transmit
Logic
TXA/B
TXINHA/B
RECEIVER
RXA/B
Receive
Logic
RXA/B
RXENA/B
BUSA/B
Slope
Control
Input
Filter
Comparator
Figure 1. Block Diagram
TRANSMIT WAVEFORM - EXAMPLE PATTERN
TXA/B
TXA/B
BUSA/B - BUSA/B
RECEIVE WAVEFORMS - EXAMPLE PATTERN
Vin
(Line to Line)
t
DR
t
DR
t
DR
t
DR
RXA/B (HI-1579)
t
RG
t
RG
RXA/B (HI-1579)
RXA/B (HI-1581)
t
RG
t
RG
RXA/B (HI-1581)
HOLT INTEGRATED CIRCUITS
3
HI-1579, HI-1581
ABSOLUTE MAXIMUM RATINGS
Supply voltage (V
DD
)
Logic input voltage range
Receiver differential voltage
Driver peak output current
Power dissipation at 25°C
ceramic DIL, derate
Reflow Solder Temperature
Junction Temperature
Storage Temperature
-0.3 V to +5 V
-0.3 V dc to +3.6 V
50 Vp-p
+1.0 A
1.0 W
7mW/°C
260°C
175°C
-65°C to +150°C
NOTE:
Stresses above absolute maximum
ratings or outside recommended operating
conditions may cause permanent damage to the
device. These are stress ratings only. Operation
at the limits is not recommended.
RECOMMENDED OPERATING CONDITIONS
Supply Voltage
V
DD
....................................... 3.3V... ±5%
Temperature Range
Industrial ........................ -40°C to +85°C
Hi-Temp ....................... -55°C to +125°C
DC ELECTRICAL CHARACTERISTICS
V
DD
= 3.3 V, GND = 0V, T
A
= Operating Temperature Range (unless otherwise specified).
PARAMETER
Operating Voltage
Total Supply Current
SYMBOL
V
DD
I
CC1
I
CC2
I
CC3
CONDITION
Not Transmitting
Transmit one bus @
50% duty cycle
Transmit one bus @
100% duty cycle
Not Transmitting
Transmit one bus @
100% duty cycle
Digital inputs
Digital inputs
Digital inputs
Digital inputs
I
OUT
= -1.0mA, Digital outputs
I
OUT
= 1.0mA, Digital outputs
MIN
3.15
TYP
3.30
4
225
425
MAX
3.45
17
320
640
0.06
UNITS
V
mA
mA
mA
W
W
V
Power Dissipation
PD
1
PD
2
0.5
2.0
1.0
Min. Input Voltage
Max. Input Voltage
Min. Input Current
Max. Input Current
Min. Output Voltage
Max. Output Voltage
RECEIVER
Input resistance
Input capacitance
(HI)
(LO)
(HI)
(LO)
(HI)
(LO)
V
IH
V
IL
I
IH
I
IL
V
OH
V
IH
30%
20
-20
90%
10%
V
DD
µA
µA
V
DD
V
DD
(Measured at Point “A
D
“ in Figure 3 unless otherwise specified)
R
IN
C
IN
CMRR
V
IN
V
ICM
Detect
V
THD
1 MHz Sine Wave
Measured at Point “A
D
“ in Figure 3
RXA/B, RXA/B pulse width >70 ns
No pulse at RXA/B, RXA/B
1 MHz Sine Wave
Measured at Point “A
T
“ in Figure 4
RXA/B, RXA/B pulse width >70 ns
No pulse at RXA/B, RXA/B
0.86
Differential
-10.0
1.15
Differential (at chip pins)
Differential
40
9
10.0
2
5
Kohm
pF
dB
Vp-p
V-pk
Vp-p
Common mode rejection ratio
Input Level
Input common mode voltage
Threshold Voltage - Direct-coupled
No Detect
Theshold Voltage - Transformer-coupled
Detect
V
THND
V
THD
0.28
Vp-p
Vp-p
No Detect
V
THND
0.20
Vp-p
HOLT INTEGRATED CIRCUITS
4
HI-1579, HI-1581
DC ELECTRICAL CHARACTERISTICS (cont.)
V
DD
= 3.3 V, GND = 0V, T
A
= Operating Temperature Range (unless otherwise specified).
PARAMETER
TRANSMITTER
Output Voltage
SYMBOL
CONDITION
MIN
TYP
MAX
UNITS
(Measured at Point “A
D
” in Figure 3 unless otherwise specified)
Direct coupled
Transformer coupled
V
OUT
V
OUT
V
ON
Direct coupled
V
DYN
V
DYN
C
OUT
35 ohm load
(Measured at Point “A
D
“ in Figure 3)
70 ohm load
(Measured at Point “A
T
“ in Figure 4)
Differential, inhibited
35 ohm load
(Measured at Point “A
D
“ in Figure 3)
70 ohm load
(Measured at Point “A
T
“ in Figure 4)
1 MHz sine wave
-90
-250
6.1
20.0
9.0
27.0
10.0
90
250
15
Vp-p
Vp-p
mVp-p
mV
mV
pF
Output Noise
Output Dynamic Offset Voltage
Transformer coupled
Output Capacitance
AC ELECTRICAL CHARACTERISTICS
VDD = 3.3 V, GND = 0V, T
A
=Operating Temperature Range (unless otherwise specified).
PARAMETER
RECEIVER
Receiver Delay
Receiver gap time
Receiver Enable Delay
TRANSMITTER
Driver Delay
Rise time
Fall Time
Inhibit Delay
SYMBOL
t
DR
t
RG
t
REN
TEST CONDITIONS
From input zero crossing to RXA/B or RXA/B
Spacing between RXA/B and RXA/B pulses
From RXENA/B rising or falling edge to
RXA/B or RXA/B
MIN
TYP
MAX
450
Note 3
UNITS
ns
ns
(Measured at Point “A
T
” in Figure 4)
90
Note 1
365
Note 2
40
ns
(Measured at Point “A
D
” in Figure 3)
t
DT
tr
tf
t
DI-H
t
DI-L
TXA/B, TXA/B to BUSA/B, BUSA/B
35 ohm load
35 ohm load
Inhibited output
Active output
100
100
150
300
300
100
150
ns
ns
ns
ns
ns
Note 1. Measured using a 1 MHz sinusoid, 20 V peak to peak, line to line at point “AT” (Guaranteed but not tested).
Note 2. Measured using a 1 MHz sinusoid, 860 mV peak to peak, line to line at point “AT” (100% tested).
Note 3. Measured using a 1 MHz sinusoid, 860 mV peak to peak, line to line at point “AT”. Measured from input zero crossing point.
MIL-STD-1553
BUS A
(Direct Coupled)
Isolation
Transformer
55W
BUS A
MIL-STD-1553
BUS B
(Transformer Coupled)
MIL-STD-1553
Stub Coupler
52.5W
Transceiver A
55W
1:2.5
Isolation
Transformer
BUS B
BUS A
Transceiver B
BUS B
1:2.5
1:1.4
52.5W
HI-1579 / HI-1581
Figure 2. Bus Connection Example using HI-1579 or HI-1581
HOLT INTEGRATED CIRCUITS
5
嵌入式系统
