HN58X2408FPIAG/HN58X2416FPIAG
HN58X2432FPIAG/HN58X2464FPIAG
Two-wire serial interface
8k EEPROM (1-kword
×
8-bit)/16k EEPROM (2-kword
×
8-bit)
32k EEPROM (4-kword
×
8-bit)/64k EEPROM(8-kword
×
8-bit)
ADE-203-1262A (Z)
Rev. 1.0
Mar. 30, 2001
Description
HN58X24xxFPIAG series are two-wire serial interface EEPROM (Electrically Erasable and Programmable
ROM). They realize high speed, low power consumption and a high level of reliability by employing
advanced MNOS memory technology and CMOS process and low voltage circuitry technology. They also
have a 32-byte page programming function to make their write operation faster.
Features
•
•
•
•
Single supply: 1.8 V to 5.5 V
Two-wire serial interface (I
2
C
TM
serial bus*
1
)
Clock frequency: 400 kHz
Power dissipation:
Standby: 3 µA(max)
Active (Read): 1 mA(max)
Active (Write): 3 mA(max)
Automatic page write: 32-byte/page
Write cycle time: 10 ms (2.7 V to 5.5 V)/15ms (1.8 V to 2.7 V)
Endurance: 10
5
Cycles (Page write mode)
Data retention: 10 Years
•
•
•
•
HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG
•
Small size packages: SOP-8pin
•
Shipping tape and reel: 2,500 IC/reel
•
Temperature range: –40 to +85°C
Note: 1. I
2
C is a trademark of Philips Corporation.
Ordering Information
Type No.
HN58X2408FPIAG
HN58X2416FPIAG
HN58X2432FPIAG
HN58X2464FPIAG
Internal organization
8k bit (1024
×
8-bit)
16k bit (2048
×
8-bit)
32k bit (4096
×
8-bit)
64k bit (8192
×
8-bit)
Operating voltage Frequency
1.8 V to 5.5 V
400 kHz
Package
150 mil 8-pin plastic SOP
(FP-8DB)
Pin Arrangement
8-pin SOP
A0
A1
A2
V
SS
1
2
3
4
8
7
6
5
(Top view)
V
CC
WP
SCL
SDA
Pin Description
Pin name
A0 to A2
SCL
SDA
WP
V
CC
V
SS
Function
Device address
Serial clock input
Serial data input/output
Write protect
Power supply
Ground
2
HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG
Block Diagram
V
CC
V
SS
Address generator
WP
A0, A1, A2
SCL
SDA
Control
logic
High voltage generator
X decoder
Memory array
Y decoder
Y-serect & Sense amp.
Serial-parallel converter
Absolute Maximum Ratings
Parameter
Supply voltage relative to V
SS
Input voltage relative to V
SS
Operating temperature range*
1
Storage temperature range
Symbol
V
CC
Vin
Topr
Tstg
Value
–0.6 to +7.0
–0.5*
2
to +7.0*
3
–40 to +85
–65 to +125
Unit
V
V
˚C
˚C
Notes: 1. Including electrical characteristics and data retention.
2. Vin (min): –3.0 V for pulse width
≤
50 ns.
3. Should not exceed V
CC
+ 1.0 V.
DC Operating Conditions
Parameter
Supply voltage
Symbol
V
CC
V
SS
Input high voltage
Input low voltage
Operating temperature
Note:
V
IH
V
IL
Topr
Min
1.8
0
V
CC
×
0.7
–0.3*
1
–40
Typ
—
0
—
—
—
Max
5.5
0
V
CC
+ 1.0
V
CC
×
0.3
85
Unit
V
V
V
V
˚C
1. V
IL
(min): –1.0 V for pulse width
≤
50 ns.
3
HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG
DC Characteristics
(Ta = –40 to +85˚C, V
CC
= 1.8 V to 5.5 V)
Parameter
Input leakage current
Output leakage current
Standby V
CC
current
Read V
CC
current
Write V
CC
current
Output low voltage
Symbol
I
LI
I
LO
I
SB
I
CC1
I
CC2
V
OL2
Min
—
—
—
—
—
—
Typ
—
—
1.0
—
—
—
Max
2.0
2.0
3.0
1.0
3.0
0.4
Unit
µA
µA
µA
mA
mA
V
Test conditions
V
CC
= 5.5 V, Vin = 0 to 5.5 V
V
CC
= 5.5 V, Vout = 0 to 5.5 V
Vin = V
SS
or V
CC
V
CC
= 5.5 V, Read at 400 kHz
V
CC
= 5.5 V, Write at 400 kHz
V
CC
= 4.5 to 5.5 V, I
OL
= 1.6 mA
V
CC
= 2.7 to 4.5 V, I
OL
= 0.8 mA
V
CC
= 1.8 to 2.7 V, I
OL
= 0.4 mA
V
CC
= 1.8 to 2.7 V, I
OL
= 0.2 mA
V
OL1
—
—
0.2
V
Capacitance
(Ta = 25˚C, f = 1 MHz)
Parameter
Symbol
Min
—
—
Typ
—
—
Max
6.0
6.0
Unit
pF
pF
Test
conditions
Vin = 0 V
Vout = 0 V
Input capacitance (A0 to A2, SCL, WP) Cin*
1
Output capacitance (SDA)
Note:
C
I/O
*
1
1. This parameter is sampled and not 100% tested.
4
HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG
AC Characteristics
(Ta = –40 to +85˚C, V
CC
= 1.8 to 5.5 V)
Test Conditions
•
Input pules levels:
V
IL
= 0.2
×
V
CC
V
IH
= 0.8
×
V
CC
•
Input rise and fall time:
20 ns
•
Input and output timing reference levels: 0.5
×
V
CC
•
Output load: TTL Gate + 100 pF
Parameter
Clock frequency
Clock pulse width low
Clock pulse width high
Noise suppression time
Access time
Bus free time for next mode
Start hold time
Start setup time
Data in hold time
Data in setup time
Input rise time
Input fall time
Stop setup time
Data out hold time
Write cycle time
V
CC
= 2.7 V to 5.5 V
V
CC
= 1.8 V to 2.7 V
Symbol
f
SCL
t
LOW
t
HIGH
t
I
t
AA
t
BUF
t
HD.STA
t
SU.STA
t
HD.DAT
t
SU.DAT
t
R
t
F
t
SU.STO
t
DH
t
WC
t
WC
Min
—
1200
600
—
100
1200
600
600
0
100
—
—
600
50
—
—
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Max
400
—
—
50
900
—
—
—
—
—
300
300
—
—
10
15
Unit
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ms
2
2
1
1
1
Notes
Notes: 1. This parameter is sampled and not 100% tested.
2. t
WC
is the time from a stop condition to the end of internally controlled write cycle.
5
