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HYB25DC512800CF-5

DDR DRAM, 64MX8, 0.5ns, CMOS, PBGA60, GREEN, PLASTIC, TFBGA-60

器件类别:存储    存储   

厂商名称:Infineon(英飞凌)

厂商官网:http://www.infineon.com/

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器件参数
参数名称
属性值
厂商名称
Infineon(英飞凌)
零件包装代码
BGA
包装说明
TBGA,
针数
60
Reach Compliance Code
unknown
ECCN代码
EAR99
访问模式
FOUR BANK PAGE BURST
最长访问时间
0.5 ns
其他特性
AUTO/SELF REFRESH
JESD-30 代码
R-PBGA-B60
长度
12 mm
内存密度
536870912 bit
内存集成电路类型
DDR DRAM
内存宽度
8
功能数量
1
端口数量
1
端子数量
60
字数
67108864 words
字数代码
64000000
工作模式
SYNCHRONOUS
最高工作温度
70 °C
最低工作温度
组织
64MX8
封装主体材料
PLASTIC/EPOXY
封装代码
TBGA
封装形状
RECTANGULAR
封装形式
GRID ARRAY, THIN PROFILE
认证状态
Not Qualified
座面最大高度
1.2 mm
自我刷新
YES
最大供电电压 (Vsup)
2.7 V
最小供电电压 (Vsup)
2.3 V
标称供电电压 (Vsup)
2.5 V
表面贴装
YES
技术
CMOS
温度等级
COMMERCIAL
端子形式
BALL
端子节距
1 mm
端子位置
BOTTOM
宽度
10 mm
文档预览
D a t a S h e e t , Rev. 1.10, O c t . 2 0 0 5
HYB25DC512800C[E/F]
HYB25DC512160C[E/F]
512-Mbit Double-Data-Rate SDRAM
DDR SDRAM
RoHS Compliant Products
Memory Products
N e v e r
s t o p
t h i n k i n g .
Edition
2005-10
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
81669 München, Germany
©
Infineon Technologies AG 2005.
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as a guarantee of
characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding
circuits, descriptions and charts stated herein.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
HYB25DC512800C[E/F], HYB25DC512160C[E/F]
Revision History:
2005-10, Rev. 1.10
Previous Version:
Page
9
65
69
2005-08, Rev. 1.00
Subjects (major changes since last revision)
added product types HYB25DC512800C[E/F]-6 and HYB25DC512160C[E/F]-6
addded AC Timing Diagrams
added
I
DD
currents DDR333
We Listen to Your Comments
Any information within this document that you feel is wrong, unclear or missing at all?
Your feedback will help us to continuously improve the quality of this document.
Please send us your proposal (including a reference to this document) to:
techdoc.mp@infineon.com
Template: mp_a4_s_rev314 / 3 / 2005-05-02
HYB25DC512[800/160]C[E/F]
512-Mbit Double-Data-Rate SDRAM
Table of Contents
1
1.1
1.2
1
2
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.3
2.3.1
2.3.2
2.4
2.5
2.5.1
2.5.2
2.5.3
2.5.4
2.5.5
2.5.6
2.6
3
3.1
3.2
3.3
3.4
3.4.1
4
5
6
Overview
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Pin Configuration
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Functional Description
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mode Register Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Burst Length . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Burst Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Read Latency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Extended Mode Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DLL Enable/Disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Drive Strength . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bank/Row Activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Writes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Precharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power-Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Clock Frequency Change . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Simplified State Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Normal Strength Pull-down and Pull-up Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Weak Strength Pull-down and Pull-up Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
DD
Current Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18
18
19
19
20
20
21
22
22
22
23
26
26
27
36
50
51
55
56
57
57
58
61
63
69
Timing Diagrams
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
System Characteristics for DDR SDRAMs
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Package Outlines
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Data Sheet
4
Rev. 1.10, 2005-10
HYB25DC512[800/160]C[E/F]
512-Mbit Double-Data-Rate SDRAM
List of Tables
Table 1
Table 2
Table 1
Table 2
Table 3
Table 4
Table 6
Table 5
Table 8
Table 7
Table 9
Table 10
Table 11
Attention:
Table 12
Table 14
Table 13
Table 15
Table 17
Table 16
Table 17
Table 18
Table 19
Table 20
Table 21
Table 22
Table 23
Table 24
Table 25
Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Ordering Information for Lead-Free(RoHS Compliant Products) . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Pin Configuration of DDR SDRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Abbreviations for Pin Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Abbreviations for Buffer Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Burst Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Truth Table 1b: DM Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Truth Table 1a: Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Truth Table 3: Current State Bank n - Command to Bank n (same bank) . . . . . . . . . . . . . . . . . . . 52
Truth Table 2: Clock Enable (CKE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Truth Table 4: Current State Bank n - Command to Bank m (different bank). . . . . . . . . . . . . . . . . 54
Truth Table 5: Concurrent Auto Precharge. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Input and Output Capacitances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Electrical Characteristics and DC Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Pull-down and Pull-up Process Variations and Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Normal Strength Pull-down and Pull-up Currents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Weak Strength Driver Pull-down and Pull-up Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
AC Timing - Absolute Specifications for DDR400B and DDR333 . . . . . . . . . . . . . . . . . . . . . . . . . 64
AC Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
I
DD
Specification and Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
I
DD
Specification for HYB25DC512[800/160C[E/F]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Input Slew Rate for DQ, DQS, and DM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Input Setup & Hold Time Derating for Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Input/Output Setup and Hold TIme Derating for Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Input/Output Setup and Hold Derating for Rise/Fall Delta Slew Rate. . . . . . . . . . . . . . . . . . . . . . . 82
Output Slew Rate Characteristrics (×8 Devices only). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Output Slew Rate Characteristics (×16 Devices only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
TFBGA Common Package Properties (non-green/green) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Data Sheet
5
Rev. 1.10, 2005-10
查看更多>
参数对比
与HYB25DC512800CF-5相近的元器件有:HYB25DC512160CE-6、HYB25DC512800CF-6、HYB25DC512160CF-6、HYB25DC512800CE-6、HYB25DC512160CE-5、HYB25DC512160CF-5、HYB25DC512800CE-5。描述及对比如下:
型号 HYB25DC512800CF-5 HYB25DC512160CE-6 HYB25DC512800CF-6 HYB25DC512160CF-6 HYB25DC512800CE-6 HYB25DC512160CE-5 HYB25DC512160CF-5 HYB25DC512800CE-5
描述 DDR DRAM, 64MX8, 0.5ns, CMOS, PBGA60, GREEN, PLASTIC, TFBGA-60 DDR DRAM, 32MX16, 0.7ns, CMOS, PDSO66, GREEN, PLASTIC, TSOP2-66 DDR DRAM, 64MX8, 0.7ns, CMOS, PBGA60, GREEN, PLASTIC, TFBGA-60 DDR DRAM, 32MX16, 0.7ns, CMOS, PBGA60, GREEN, PLASTIC, TFBGA-60 DDR DRAM, 64MX8, 0.7ns, CMOS, PDSO66, GREEN, PLASTIC, TSOP2-66 DDR DRAM, 32MX16, 0.5ns, CMOS, PDSO66, GREEN, PLASTIC, TSOP2-66 DDR DRAM, 32MX16, 0.5ns, CMOS, PBGA60, GREEN, PLASTIC, TFBGA-60 DDR DRAM, 64MX8, 0.5ns, CMOS, PDSO66, GREEN, PLASTIC, TSOP2-66
厂商名称 Infineon(英飞凌) Infineon(英飞凌) Infineon(英飞凌) Infineon(英飞凌) Infineon(英飞凌) Infineon(英飞凌) Infineon(英飞凌) Infineon(英飞凌)
零件包装代码 BGA TSOP2 BGA BGA TSOP2 TSOP2 BGA TSOP2
包装说明 TBGA, TSSOP, TBGA, TBGA, TSSOP, TSSOP, TBGA, TSSOP,
针数 60 66 60 60 66 66 60 66
Reach Compliance Code unknown unknown unknown unknown unknown unknown unknown unknow
ECCN代码 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
访问模式 FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST
最长访问时间 0.5 ns 0.7 ns 0.7 ns 0.7 ns 0.7 ns 0.5 ns 0.5 ns 0.5 ns
其他特性 AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH
JESD-30 代码 R-PBGA-B60 R-PDSO-G66 R-PBGA-B60 R-PBGA-B60 R-PDSO-G66 R-PDSO-G66 R-PBGA-B60 R-PDSO-G66
长度 12 mm 22.22 mm 12 mm 12 mm 22.22 mm 22.22 mm 12 mm 22.22 mm
内存密度 536870912 bit 536870912 bit 536870912 bit 536870912 bit 536870912 bit 536870912 bit 536870912 bit 536870912 bi
内存集成电路类型 DDR DRAM DDR DRAM DDR DRAM DDR DRAM DDR DRAM DDR DRAM DDR DRAM DDR DRAM
内存宽度 8 16 8 16 8 16 16 8
功能数量 1 1 1 1 1 1 1 1
端口数量 1 1 1 1 1 1 1 1
端子数量 60 66 60 60 66 66 60 66
字数 67108864 words 33554432 words 67108864 words 33554432 words 67108864 words 33554432 words 33554432 words 67108864 words
字数代码 64000000 32000000 64000000 32000000 64000000 32000000 32000000 64000000
工作模式 SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
最高工作温度 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C
组织 64MX8 32MX16 64MX8 32MX16 64MX8 32MX16 32MX16 64MX8
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 TBGA TSSOP TBGA TBGA TSSOP TSSOP TBGA TSSOP
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 GRID ARRAY, THIN PROFILE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH GRID ARRAY, THIN PROFILE GRID ARRAY, THIN PROFILE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH GRID ARRAY, THIN PROFILE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
座面最大高度 1.2 mm 1.2 mm 1.2 mm 1.2 mm 1.2 mm 1.2 mm 1.2 mm 1.2 mm
自我刷新 YES YES YES YES YES YES YES YES
最大供电电压 (Vsup) 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V
最小供电电压 (Vsup) 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V
标称供电电压 (Vsup) 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V
表面贴装 YES YES YES YES YES YES YES YES
技术 CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
端子形式 BALL GULL WING BALL BALL GULL WING GULL WING BALL GULL WING
端子节距 1 mm 0.65 mm 1 mm 1 mm 0.65 mm 0.65 mm 1 mm 0.65 mm
端子位置 BOTTOM DUAL BOTTOM BOTTOM DUAL DUAL BOTTOM DUAL
宽度 10 mm 10.16 mm 10 mm 10 mm 10.16 mm 10.16 mm 10 mm 10.16 mm
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器件捷径:
L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ
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