with guaranteed monotonic behavior. They include a
1.25V reference for ease of use and flexibility. The
reference output is available on a separate pin and can be
used to drive the reference input of each DAC. Alternately,
each DAC can be driven by an external reference. The
operating supply range is 2.7V to 5.5V.
The input interface is an easy to use three-wire SPI/QSPI
compatible interface. Each DAC can be individually
controlled and has a double buffered digital input.
FEATURES
•
12/10/8-Bit Monotonic Dual DACs in 10 lead
MSOP Package
•
Wide Output Voltage Swing
•
100
µA
per DAC
•
On Board Reference
•
Serial Interface with three-wire SPI/QSPI and
Microwire Interface Compatible
•
8µs Full-Scale Settling Time
APPLICATIONS
•
Battery-Powered Applications
•
Industrial Process Control
•
Digital Gain and Offset Adjustment
OVERVIEW
The ICM7362, ICM7342 and ICM7322 are Dual 12-Bit, 10-
Bit and 8-Bit wide output voltage swing DACs respectively,
BLOCK DIAGRAM
REF
B
REFOUT
REF
A
V
DD
Reference
ICM 7362/7342/7322
Input and
DAC Latch
12/10/8 -Bit
DAC A
x2
V
OUT A
Input and
DAC Latch
12/10/8 -Bit
DAC B
x2
V
OUT B
SDI
Input Control Logic, Registers and Latches
Power-On-
Reset
SCK
CS
GND
Rev. A8
ICmic reserves the right to change the specifications without prior notice
.
1
ICmic
PACKAGE
IC MICROSYSTEMS
ICM7362/7342/7322
D
UAL
12/10/8-
BIT
V
OLTAGE
-O
UTPUT
DAC
S
10-Pin MSOP
V
DD
1
REF
A
2
V
OUT A
3
REF
B
4
V
OUT B
5
10 GND
9 SDI
8 SCK
7 CS
6 REFOUT
PIN DESCRIPTION
Pin No
1
2
3
4
5
6
V
DD
REF
A
V
OUT A
REF
B
V
OUT B
REFOUT
Symbol
Supply Voltage
DAC A Reference Input
DAC A Output
DAC B Reference Input
DAC B Output
Reference Output (1.25V)
Description
7
8
9
10
CS
SCK
SDI
GND
Chip Select (TTL or CMOS)
Serial Clock Input (TTL or CMOS)
Serial Data Input (TTL or CMOS)
Ground
ABSOLUTE MAXIMUM RATING
Symbol
V
DD
I
IN
V
IN_
V
IN_REF
T
STG
T
SOL
Parameter
Supply Voltage
Input Current
Digital Input Voltage (SCK, SDI, CS)
Reference Input Voltage
Storage Temperature
Soldering Temperature
Value
-0.3 to 7.0
+/- 25.0
-0.3 to 7.0
-0.3 to 7.0
-65 to +150
300
Unit
V
mA
V
V
o
C
o
C
Note:
Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
ORDERING INFORMATION
Part
ICM7362
ICM7342
ICM7322
Temperature Range
-40
o
C to 85
o
C
-40
o
C to 85
o
C
-40
o
C to 85
o
C
Package
10-Pin MSOP
10-Pin MSOP
10-Pin MSOP
Rev. A8
ICmic reserves the right to change the specifications without prior notice
.
2
ICmic
Symbol
IC MICROSYSTEMS
ICM7362/7342/7322
D
UAL
12/10/8-
BIT
V
OLTAGE
-O
UTPUT
DAC
S
DC ELECTRICAL CHARACTERISTICS
(V
DD =
2.7V to 5.5V, V
REF IN =
1.25V ; V
OUT
unloaded; all specifications T
MIN
to T
MAX
unless otherwise noted)
Parameter
Test Conditions
Min
Typ
Max
Unit
DC PERFORMANCE
ICM7362
N
Resolution
DNL
Differential Nonlinearity
INL
Integral Nonlinearity
ICM7342
N
Resolution
DNL
Differential Nonlinearity
INL
Integral Nonlinearity
ICM7322
N
Resolution
DNL
Differential Nonlinearity
INL
Integral Nonlinearity
GE
Gain Error
OE
Offset Error
POWER REQUIREMENTS
V
DD
Supply Voltage
I
DD
Supply Current
12
(Notes 1 & 3)
(Notes 1 & 3)
10
(Notes 1 & 3)
(Notes 1 & 3)
8
(Notes 1 & 3)
(Notes 1 & 3)
0.05
0.25
+1.0
+0.75
+0.5
+25
2.7
(Note 4)
0.4
5.5
1.0
0.1
1.0
+1.0
+3.0
0.4
4.0
+1.0
+12.0
Bits
LSB
LSB
Bits
LSB
LSB
Bits
LSB
LSB
% of FS
mV
V
mA
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
OUTPUT CHARACTERISTICS
Output Voltage Range
VO
SC
Short Circuit Current
R
OUT
Amp Output Impedance
Output Line Regulation
LOGIC INPUTS
V
IH
Digital Input High
V
IL
Digital Input Low
Digital Input Leakage
REFERENCE
R
IN
Reference Input Resistance
Reference Input Range
V
REFOUT
Reference Output
Reference Output Line
Regulation
(Note 3)
At Mid-scale (Note 2)
At 0-scale (Note 2)
Vdd=2.7 to 5.5 V
(Note 2)
(Note 2)
0
60
1.0
100
0.4
2.4
V
DD
150
5.0
200
3.0
V
mA
Ω
Ω
mV/V
V
V
µA
kΩ
V
V
mV/V
0.8
5
25
0.5
1.2
41
1.25
0.8
65
V
DD
-1.5
1.3
4.0
(Note 2)
Vdd=2.7 to 5.5 V
AC ELECTRICAL CHARACTERISTICS
(V
DD =
2.7V to 5.5V, V
REF IN =
1.25V ; V
OUT
unloaded; all specifications T
MIN
to T
MAX
unless otherwise noted)
Symbol
SR
Parameter
Slew Rate
Settling Time
Mid-scale Transition Glitch
Energy
Full-scale settling
Test Conditions
Min
2
8
Typ
Max
Unit
V/µs
µs
nV-S
40
Note 1:
Note 2:
Note 3:
Note 4:
Rev. A8
Linearity is defined from code 64 to 4095 (ICM7362)
Linearity is defined from code 16 to 1023 (ICM7342)
Linearity is defined from code 4 to 255 (ICM7322)
Guaranteed by design; not tested in production
See Applications Information
All digital inputs are either at GND or Vdd
ICmic reserves the right to change the specifications without prior notice
.
3
ICmic
IC MICROSYSTEMS
ICM7362/7342/7322
D
UAL
12/10/8-
BIT
V
OLTAGE
-O
UTPUT
DAC
S
TIMING CHARACTERISTICS
(V
DD =
2.7V to 5.5V; all specifications T
MIN
to T
MAX
unless otherwise noted)
Symbol
t
1
t
2
t
3
t
4
t
5
Parameter
SCK Cycle Time
Data Setup Time
Data Hold Time
SCK Falling edge to CS
Rising Edge
CS Falling Edge to SCK
Rising Edge
(Note 2)
t
6
CS Pulse Width
20
ns
Test Conditions
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
15
ns
Min
30
10
10
0
Typ
Max
ns
ns
ns
ns
Unit
SCK
t
3
t
2
t
1
SDI
C3
C2
MSB
t
5
Input Word for DAC N
t
4
CS
t
6
Figure 1:
Serial Interface Timing Diagram
Rev. A8
ICmic reserves the right to change the specifications without prior notice
.
4
ICmic
IC MICROSYSTEMS
ICM7362/7342/7322
D
UAL
12/10/8-
BIT
V
OLTAGE
-O
UTPUT
DAC
S
CONTENTS OF INPUT SHIFT REGISTER
ICM7362 (12-Bit DAC)
MSB
C3
C2
C1
C0
LSB
D1
D0
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
Figure 2:
Contents of ICM7362 Input Shift Register
ICM7342 (10-Bit DAC)
MSB
C3
C2
C1
C0
LSB
X
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
X
Figure 3:
Contents of ICM7342 Input Shift Register
ICM7322 (8-Bit DAC)
MSB
C3
C2
C1
C0
D7
D6
D5
D4
D3
D2
D1
D0
X
X
X
LSB
X
Figure 4:
Contents of ICM7322 Input Shift Register
C3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
C2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
C1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
C0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
DATA
Data
Data
Data
Data
Data
Data
X
X
X
X
X
X
Data
Data
Data
X
DAC
A
A
A
B
B
B
X
X
X
X
X
X
A&B
A&B
A&B
X
FUNCTION
Load Input Latch
Update DAC
Load Input Latch and Update DAC
Load Input Latch
Update DAC
Load Input Latch and Update DAC
No Operation
No Operation
No Operation
No Operation
No Operation
No Operation
Load Input Latch
Update DAC
Load Input Latch and Update DAC
No Operation
Table 1:
Serial Interface Control Command
Rev. A8
ICmic reserves the right to change the specifications without prior notice
FPGA/CPLD
