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IDT74LVC14APY8

Inverter, LVC/LCX/Z Series, 6-Func, 1-Input, CMOS, PDSO14, 0.65 MM PITCH, SSOP-14

器件类别:逻辑    逻辑   

厂商名称:IDT (Integrated Device Technology)

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器件参数
参数名称
属性值
零件包装代码
SSOP
包装说明
SSOP,
针数
14
Reach Compliance Code
unknown
系列
LVC/LCX/Z
JESD-30 代码
R-PDSO-G14
JESD-609代码
e0
长度
6.2 mm
逻辑集成电路类型
INVERTER
功能数量
6
输入次数
1
端子数量
14
最高工作温度
85 °C
最低工作温度
-40 °C
封装主体材料
PLASTIC/EPOXY
封装代码
SSOP
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE, SHRINK PITCH
传播延迟(tpd)
7.5 ns
认证状态
Not Qualified
座面最大高度
2 mm
最大供电电压 (Vsup)
3.6 V
最小供电电压 (Vsup)
2.3 V
标称供电电压 (Vsup)
3.3 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子面层
TIN LEAD
端子形式
GULL WING
端子节距
0.65 mm
端子位置
DUAL
宽度
5.3 mm
Base Number Matches
1
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IDT74LVC14A
3.3V CMOS HEX SCHMITT-TRIGGER INVERTER
EXTENDED COMMERCIAL TEMPERATURE RANGE
3.3V CMOS HEX SCHMITT-
TRIGGER INVERTER WITH
5 VOLT TOLERANT I/O
FEATURES:
0.5 MICRON CMOS Technology
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
1.27mm pitch SOIC, 0.65mm pitch SSOP and
0.65mm pitch TSSOP packages
Extended commercial range of – 40°C to +85°C
V
CC
= 3.3V ±0.3V, Normal Range
V
CC
= 2.3V to 3.6V, Extended Range
CMOS power levels (0.4µ W typ. static)
Rail-to-Rail output swing for increased noise margin
All inputs, outputs and I/O are 5 Volt tolerant
Supports hot insertion
IDT74LVC14A
ADVANCE
INFORMATION
DESCRIPTION:
The LVC14A Hex Schmitt-trigger inverter is built using advanced dual
metal CMOS technology. This device contains six independent inverters
and performs the Boolean function Y =
A.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V supply system.
The LVC14A has been designed with a ±24mA output driver. This driver
is capable of driving a moderate to heavy load while maintaining speed
performance.
Drive Features for LVC14A:
– High Output Drivers:
±24mA
– Reduced system switching noise
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
Functional Block Diagram
PIN CONFIGURATION
Y
1
A
1
Y
2
A
2
Y
3
A
3
Y
A
1
2
3
4
5
6
7
SO14-1
SO14-2
SO14-3
14
13
12
11
10
9
8
V
CC
6
A
6
Y
5
A
5
Y
4
A
4
Y
GND
SOIC/ SSOP/ TSSOP
TOP VIEW
FUNCTION TABLE
(each inverter)
Inputs
xA
H
L
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
(1)
Outputs
xY
L
H
PIN DESCRIPTION
Pin Names
xA
xY
Description
Inputs
Outputs
EXTENDED COMMERCIAL TEMPERATURE RANGE
1
c
1999 Integrated Device Technology, Inc.
APRIL 1999
DSC-4592/-
IDT74LVC14A
3.3V CMOS HEX SCHMITT-TRIGGER INVERTER
EXTENDED COMMERCIAL TEMPERATURE RANGE
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM(2)
V
TERM(3)
T
STG
I
OUT
I
IK
I
OK
I
CC
I
SS
Description
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Continuous Clamp Current,
V
I
< 0 or V
O
< 0
Continuous Current through
each V
CC
or GND
LVC QUAD Link
CAPACITANCE
(T
A
= +25°C, f = 1.0MH
Z
)
Unit
V
V
°C
mA
mA
mA
C
I/O
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output
Capacitance
I/O Port
Capacitance
LVC QUAD Link
Max.
– 0.5 to +6.5
– 0.5 to +6.5
– 65 to +150
– 50 to +50
– 50
±100
Conditions
V
IN
= 0V
V
OUT
= 0V
V
IN
= 0V
Typ.
4.5
5.5
6.5
Max.
6
8
8
Unit
pF
pF
pF
NOTE:
1. As applicable to the device type.
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. V
CC
terminals.
3. All terminals except V
CC
.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: T
A
= – 40°c to +85°c
Symbol
V
IH
V
IL
I
IH
I
IL
I
OFF
V
IK
I
CCL
I
CCH
∆I
CC
Parameter
Input HIGH Voltage Level
Input LOW Voltage Level
Input Leakage Current
Input/Output Power Off Leakage
Clamp Diode Voltage
Quiescent Power Supply Current
Quiescent Power Supply
Current Variation
Test Conditions
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 3.6V
V
CC
= 0V, V
IN
or V
O
≤5.5V
V
CC
= 2.3V, I
IN
= – 18mA
V
CC
= 3.6V
One input at V
CC
– 0.6V
other inputs at V
CC
or GND
V
IN
= GND or V
CC
V
I
= 0 to 5.5V
Min.
1.7
2
Typ.
(1)
– 0.7
Max.
0.7
0.8
±5
±50
– 1.2
10
500
µA
µA
V
µA
µA
V
Unit
V
NOTE:
1. Typical values are at V
CC
= 3.3V, +25°C ambient.
c
1998 Integrated Device Technology, Inc.
2
DSC-123456
IDT74LVC14A
3.3V CMOS HEX SCHMITT-TRIGGER INVERTER
EXTENDED COMMERCIAL TEMPERATURE RANGE
OUTPUT DRIVE CHARACTERISTICS
Symbol
V
OH
Parameter
Output HIGH Voltage
V
CC
Test Conditions
(1)
= 2.3V to 3.6V
I
OH
= – 0.1mA
I
OH
= – 6mA
I
OH
= – 12mA
Min.
V
CC
– 0.2
2
1.7
2.2
2.4
I
OH
= – 24mA
I
OL
= 0.1mA
I
OL
= 6mA
I
OL
= 12mA
V
CC
= 2.7V
V
CC
= 3.0V
I
OL
= 12mA
I
OL
= 24mA
2.2
Max.
0.2
0.4
0.7
0.4
0.55
LVC QUAD Link
Unit
V
V
CC
= 2.3V
V
CC
= 2.3V
V
CC
= 2.7V
V
CC
= 3.0V
V
CC
= 3.0V
V
OL
Output LOW Voltage
V
CC
= 2.3V to 3.6V
V
CC
= 2.3V
V
NOTE:
1. V
IH
and V
IL
must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the
appropriate V
CC
range. T
A
= – 40°C to +85°C.
HYSTERESIS CHARACTERISTICS
Parameter
V
T+
Positive-going
threshold
V
T–
Negative-going
threshold
∆V
T
Hysteresis
(V
T+
– V
T–
)
Test Conditions
Input Voltage, from V
IL
to V
IH
, in a linear ramp observing the output transition.
V
CC
2.7V
3V
3.6V
2.7V
3V
3.6V
2.7V
3V
3.6V
Min.
0.8
0.8
0.8
0.4
0.6
0.8
0.3
0.3
0.3
Typ.
Max.
2
2
2
1.4
1.5
1.8
1.1
1.2
1.2
Unit
V
Input Voltage, from V
IH
to V
IL
, in a linear ramp observing the output transition.
V
∆V
T min =
|
V
T+ min
– V
T- max
|
∆V
T max =
|
V
T+ max
– V
T- min
|
V
OPERATING CHARACTERISTICS, VCC = 3.3V
±
0.3V, TA = 25°C
Symbol
C
PD
Parameter
Power Dissipation Capacitance per inverter
(1)
V
CC
= 2.7V
Min
Max
7.5
V
CC
= 3.3V±0.3V
Min
1
Max
6.4
1
Unit
ns
ns
Test Conditions
C
L
= 0pF, f = 10Mhz
Typical
7
Unit
pF
SWITCHING CHARACTERISTICS
Symbol
Parameter
t
PLH
Propagation Delay
xA to xY
t
PHL
tsk(o) Output Skew
(2)
Min
V
CC
= 2.5V±0.2V
Max
NOTES:
1. See test circuits and waveforms. T
A
= – 40°C to + 85°C.
2. Skew between any two outputs of the same package and switching in the same direction.
3
IDT74LVC14A
3.3V CMOS HEX SCHMITT-TRIGGER INVERTER
EXTENDED COMMERCIAL TEMPERATURE RANGE
TEST CONDITIONS
Symbol
V
LOAD
V
IH
V
T
V
LZ
V
HZ
C
L
V
CC
(1)
= 2.5V ±0.2V
2 x Vcc
Vcc
V
CC
/ 2
150
150
30
TEST CIRCUITS AND WAVEFORMS
PROPAGATION DELAY
V
CC
(2)
= 3.3V ±0.3V & 2.7V
6
2.7
1.5
300
300
50
Unit
V
V
V
mV
mV
pF
LVC QUAD Link
SA M E PH AS E
IN PU T TR AN S ITIO N
t
PLH
O U TPU T
t
PLH
O PPO SITE P H AS E
IN PU T TR AN S ITIO N
t
PH L
t
PH L
V
IH
V
T
0V
V
OH
V
T
V
OL
V
IH
V
T
0V
LV C Q U A D L in k
TEST CIRCUITS FOR ALL OUTPUTS
V
CC
500
Pulse
G enerator
(1, 2)
V
LOAD
O pen
GND
ENABLE AND DISABLE TIMES
EN ABLE
C O N TR O L
IN PU T
t
PZL
t
PLZ
V
LOAD/2
V
T
t
PH Z
V
T
0V
D ISAB LE
V
IH
V
T
0V
V
LOAD/2
V
LZ
V
OL
V
OH
V
HZ
0V
LV C Q U A D L in k
V
IN
D.U.T.
V
OUT
R
T
500
C
L
L V C Q U A D L in k
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
=
Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
NOTES:
1. Pulse Generator for All Pulses: Rate
10MHz; t
F
2ns; t
R
2ns.
2. Pulse Generator for All Pulses: Rate
10MHz; t
F
2.5ns; t
R
2.5ns.
O U TPU T
SW ITCH
N O R M ALLY
CLO SED
LO W
t
PZH
O U TPU T
SW ITCH
N O R M ALLY
OP EN
H IGH
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
Disable High
Enable High
All Other tests
Switch
V
LOAD
SET-UP, HOLD, AND RELEASE TIMES
D A TA
IN PU T
TIM IN G
IN PU T
t
SU
t
H
V
IH
V
T
0V
V
IH
V
T
0V
V
IH
V
T
0V
V
IH
V
T
0V
L V C Q U A D L in k
GND
Open
LVC QUAD Link
SY N C H RO N O U S
C O N TR O L
t
REM
OUTPUT SKEW - tsk (x)
IN PU T
t
PLH1
t
PH L1
V
IH
V
T
0V
V
OH
AS YN C H RO N O U S
C O N TR O L
t
SU
t
H
PULSE WIDTH
LO W -H IG H -LO W
PU LSE
t
W
H IGH -LO W -H IG H
PU LSE
V
T
LV C Q U A D L in k
O U TP U T 1
t
SK
(x)
t
SK
(x)
V
T
V
OL
V
OH
V
T
O U TP U T 2
t
PLH2
t
PH L2
V
T
V
OL
t
SK
(x)
= t
PL H2
-
t
PLH1
or
t
PH L2
-
t
PHL1
LV C Q U A D L in k
NOTES:
1. For t
SK
(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For t
SK
(b) OUTPUT1 and OUTPUT2 are in the same bank.
4
IDT74LVC14A
3.3V CMOS HEX SCHMITT-TRIGGER INVERTER
EXTENDED COMMERCIAL TEMPERATURE RANGE
ORDERING INFORMATION
ID T
XX
LVC
XXX
XX
Temp. R ange
Device Type Package
DC
PY
PG
14A
74
Sm all O utline IC (SO14-1)
Shrink S m all Outline Package (SO14-2)
Thin Shrink Sm all Outline Package (SO14-3)
Hex Schm itt-Trigger Inverter with 5 Volt Tolerant I/O, ±24m A
–40°C to +85°C
CORPORATE HEADQUARTERS
2975 Stender Way
Santa Clara, CA 95054
for SALES:
800-345-7015 or 408-727-6116
fax: 408-492-8674
www.idt.com*
*To search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
5
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参数对比
与IDT74LVC14APY8相近的元器件有:IDT74LVC14APG8、IDT74LVC14ADC8。描述及对比如下:
型号 IDT74LVC14APY8 IDT74LVC14APG8 IDT74LVC14ADC8
描述 Inverter, LVC/LCX/Z Series, 6-Func, 1-Input, CMOS, PDSO14, 0.65 MM PITCH, SSOP-14 Inverter, LVC/LCX/Z Series, 6-Func, 1-Input, CMOS, PDSO14, 0.65 MM PITCH, TSSOP-14 Inverter, LVC/LCX/Z Series, 6-Func, 1-Input, CMOS, PDSO14, 1.27 MM PITCH, SOIC-14
零件包装代码 SSOP TSSOP SOIC
包装说明 SSOP, 0.65 MM PITCH, TSSOP-14 1.27 MM PITCH, SOIC-14
针数 14 14 14
Reach Compliance Code unknown unknown unknown
系列 LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z
JESD-30 代码 R-PDSO-G14 R-PDSO-G14 R-PDSO-G14
JESD-609代码 e0 e0 e0
长度 6.2 mm 5 mm 8.65 mm
逻辑集成电路类型 INVERTER INVERTER INVERTER
功能数量 6 6 6
输入次数 1 1 1
端子数量 14 14 14
最高工作温度 85 °C 85 °C 85 °C
最低工作温度 -40 °C -40 °C -40 °C
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 SSOP TSSOP SOP
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE
传播延迟(tpd) 7.5 ns 7.5 ns 7.5 ns
认证状态 Not Qualified Not Qualified Not Qualified
座面最大高度 2 mm 1.2 mm 1.75 mm
最大供电电压 (Vsup) 3.6 V 3.6 V 3.6 V
最小供电电压 (Vsup) 2.3 V 2.3 V 2.3 V
标称供电电压 (Vsup) 3.3 V 3.3 V 3.3 V
表面贴装 YES YES YES
技术 CMOS CMOS CMOS
温度等级 INDUSTRIAL INDUSTRIAL INDUSTRIAL
端子面层 TIN LEAD TIN LEAD TIN LEAD
端子形式 GULL WING GULL WING GULL WING
端子节距 0.65 mm 0.65 mm 1.27 mm
端子位置 DUAL DUAL DUAL
宽度 5.3 mm 4.4 mm 3.9 mm
厂商名称 - IDT (Integrated Device Technology) IDT (Integrated Device Technology)
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器件捷径:
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ
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