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IDT74LVC652AQ8

Registered Bus Transceiver, LVC/LCX/Z Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, 0.635 MM PITCH, QSOP-24

器件类别:逻辑    逻辑   

厂商名称:IDT (Integrated Device Technology)

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器件参数
参数名称
属性值
厂商名称
IDT (Integrated Device Technology)
零件包装代码
SOIC
包装说明
0.635 MM PITCH, QSOP-24
针数
24
Reach Compliance Code
unknown
其他特性
WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
系列
LVC/LCX/Z
JESD-30 代码
R-PDSO-G24
JESD-609代码
e0
长度
8.65 mm
逻辑集成电路类型
REGISTERED BUS TRANSCEIVER
位数
8
功能数量
1
端口数量
2
端子数量
24
最高工作温度
85 °C
最低工作温度
-40 °C
输出特性
3-STATE
输出极性
TRUE
封装主体材料
PLASTIC/EPOXY
封装代码
SSOP
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE, SHRINK PITCH
传播延迟(tpd)
8.4 ns
认证状态
Not Qualified
座面最大高度
1.75 mm
最大供电电压 (Vsup)
3.6 V
最小供电电压 (Vsup)
2.7 V
标称供电电压 (Vsup)
3.3 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子面层
TIN LEAD
端子形式
GULL WING
端子节距
0.635 mm
端子位置
DUAL
宽度
3.9116 mm
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IDT74LVC652A
3.3V CMOS OCTAL BUS TRANSCEIVER AND REGISTER
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS OCTAL BUS
TRANSCEIVER AND REGISTER
WITH 3-STATE OUTPUTS
AND 5 VOLT TOLERANT I/O
• 0.5 MICRON CMOS Technology
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• V
CC
= 3.3V ± 0.3V, Normal Range
• V
CC
= 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4µ W typ. static)
µ
• Rail-to-rail output swing for increased noise margin
• All inputs, outputs, and I/O are 5V tolerant
• Supports hot insertion
• Available in SOIC, SSOP, QSOP, and TSSOP packages
IDT74LVC652A
FEATURES:
DESCRIPTION:
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Reduced system switching noise
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
The LVC652A octal bus transceiver/register is built using advanced dual
metal CMOS technology. The device consists of a bus transceiver circuit,
D-type flip-flops, and control circuitry arranged for multiplexed transmission
of data directly from the data bus or from the internal storage registers.
Output-enable (OEAB and
OEBA)
inputs are provided to control the
transceiver functions. Select-control (SAB and SBA) inputs are provided
to select whether real-time or stored data is transferred. The circuitry used
for select control eliminates the typical decoding glitch that occurs in a
multiplexer during the transition between stored and real-time data. A low
input selects real-time data, and a high input selects stored data.
Data on the A or B data bus, or both, is stored in the internal D-type flip-
flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA)
inputs, regardless of the select- or enable-control pins. When the SAB and
SBA are in the real-time transfer mode, it is possible to store data without
using the internal D-type flip-flops by simultaneously enabling OEAB and
OEBA.
In this configuration, each output reinforces its input.
The LVC652A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V system environ-
ment.
FUNCTIONAL BLOCK DIAGRAM
OEAB
OEBA
CLKBA
SBA
CLKAB
SAB
3
21
23
22
1
2
B REG
D
C
4
A1
A REG
D
C
20
B1
TO SEVEN OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
© 1999 Integrated Device Technology, Inc.
APRIL 1999
DSC-4620/2
IDT74LVC652A
3.3V CMOS OCTAL BUS TRANSCEIVER AND REGISTER
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Description
Max
V
TERM
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Continuous Clamp Current,
V
I
< 0 or V
O
< 0
Continuous Current through each
V
CC
or GND
–0.5 to +6.5
–65 to +150
–50 to +50
–50
±100
Unit
V
°C
mA
mA
mA
CLKAB
SAB
OEAB
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
CLKBA
SBA
OEBA
B
1
B
2
B
3
B
4
B
5
B
6
B
7
B
8
T
STG
I
OUT
I
IK
I
OK
I
CC
I
SS
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
CAPACITANCE
(T
A
= +25°C, F = 1.0MHz)
Symbol
C
IN
C
OUT
C
I/O
Parameter
(1)
Input Capacitance
Output Capacitance
I/O Port Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
V
IN
= 0V
Typ.
4.5
5.5
6.5
Max.
6
8
8
Unit
pF
pF
pF
NOTE:
1. As applicable to the device type.
SOIC/ SSOP/ QSOP/ TSSOP
TOP VIEW
PIN DESCRIPTION
Pin Names
Ax
Bx
CLKAB, CLKBA
SAB, SBA
OEAB,
OEBA
Description
Data Register A Inputs
Data Register B Outputs
Data Register B Inputs
Data Register A Outputs
Clock Pulse Inputs
Output Data Source Select Inputs
Output Enable Inputs
2
IDT74LVC652A
3.3V CMOS OCTAL BUS TRANSCEIVER AND REGISTER
INDUSTRIAL TEMPERATURE RANGE
BUS
A
BUS
B
BUS
A
BUS
B
OEAB OEBA CLKAB
L
X
L
CLKBA
X
SAB
X
SBA
L
OEAB
H
OEBA CLKAB
H
X
CLKBA
X
SAB
L
SBA
X
REAL-TIME TRANSFER BUS B TO BUS A
REAL-TIME TRANSFER BUS A TO BUS B
BUS
A
BUS
B
BUS
A
BUS
B
OEAB OEBA CLKAB
X
H
L
X
X
L
H
CLKBA
X
SAB
X
X
X
SBA
X
X
X
OEAB OEBA
L
H
CLKAB
H or L
CLKBA
H or L
SAB
H
SBA
H
STORAGE FROM A, B, OR A AND B
TRANSFER STORED DATA TO A AND/OR B
3
IDT74LVC652A
3.3V CMOS OCTAL BUS TRANSCEIVER AND REGISTER
INDUSTRIAL TEMPERATURE RANGE
FUNCTION TABLE
(1)
Inputs
OEAB
L
L
X
H
L
L
L
L
H
H
H
OEBA
H
H
H
H
X
L
L
L
H
H
L
CLKAB
H or L
H or L
X
X
X
H or L
H or L
CLKBA
H or L
H or L
X
H or L
X
X
H or L
SAB
X
X
X
X
(2)
X
X
X
X
L
H
H
SBA
X
X
X
X
X
X
(2)
L
H
X
X
H
Output
Output
Input
Output
Input
Input
Unspecified
Output
Output
(2)
Data I/O
Ax
Input
(3)
Bx
Input
Unspecified
(2)
Output
Input
Input
Input
Operation or Function
Isolation
Store A and B data
Store A, Hold B
Store A in both registers
Store B, Hold A
Store B in both registers
Real time B data to A bus
Store B data to A bus
Real time A data to B bus
Store A data to B bus
Store A data to B bus and
Store B data to A bus
NOTES:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
= LOW-to-HIGH transition
2. Select Control = L: clocks can occur simultaneously.
Select Control = H: clocks can be staggered to load both registers.
3. The data output functions may be enabled or disabled by various signals at the OEAB or
OEBA
inputs. Data input functions are always enabled, i.e. data at the bus pins
will be stored on every LOW-to-HIGH transition of the clock inputs.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: T
A
= –40°C to +85°C
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
I
OFF
V
IK
V
H
I
CCL
I
CCH
I
CCZ
∆I
CC
High Impedance Output Current
(3-State Output pins)
Input/Output Power Off Leakage
Clamp Diode Voltage
Input Hysteresis
Quiescent Power Supply Current
V
CC
= 0V, V
IN
or V
O
5.5V
V
CC
= 2.3V, I
IN
= –18mA
V
CC
= 3.3V
V
CC
= 3.6V
V
IN
= GND or V
CC
–0.7
100
±50
–1.2
10
10
500
µA
V
mV
µA
V
CC
= 3.6V
V
O
= 0 to 5.5V
±10
µA
Parameter
Input HIGH Voltage Level
Input LOW Voltage Level
Input Leakage Current
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 3.6V
V
I
= 0 to 5.5V
Test Conditions
Min.
1.7
2
Typ.
(1)
Max.
0.7
0.8
±5
µA
V
Unit
V
Quiescent Power Supply Current
Variation
3.6
V
IN
5.5V
(2)
One input at V
CC
- 0.6V, other inputs at V
CC
or GND
µA
NOTES:
1. Typical values are at V
CC
= 3.3V, +25°C ambient.
2. This applies in the disabled state only.
4
IDT74LVC652A
3.3V CMOS OCTAL BUS TRANSCEIVER AND REGISTER
INDUSTRIAL TEMPERATURE RANGE
OUTPUT DRIVE CHARACTERISTICS
Symbol
V
OH
Parameter
Output HIGH Voltage
V
CC
= 2.3V
V
CC
= 2.3V
V
CC
= 2.7V
V
CC
= 3V
V
CC
= 3V
V
OL
Output LOW Voltage
V
CC
= 2.3V to 3.6V
V
CC
= 2.3V
V
CC
= 2.7V
V
CC
= 3V
I
OH
= – 24mA
I
OL
= 0.1mA
I
OL
= 6mA
I
OL
= 12mA
I
OL
= 12mA
I
OL
= 24mA
Test Conditions
(1)
V
CC
= 2.3V to 3.6V
I
OH
= – 0.1mA
I
OH
= – 6mA
I
OH
= – 12mA
Min.
V
CC
– 0.2
2
1.7
2.2
2.4
2.2
Max.
0.2
0.4
0.7
0.4
0.55
V
Unit
V
NOTE:
1. V
IH
and V
IL
must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate V
CC
range.
T
A
= – 40°C to + 85°C.
OPERATING CHARACTERISTICS, V
CC
= 3.3V ± 0.3V, T
A
= 25°C
Symbol
C
PD
C
PD
Parameter
Power Dissipation Capacitance per Transceiver Outputs enabled
Power Dissipation Capacitance per Transceiver Outputs disabled
Test Conditions
C
L
= 0pF, f = 10Mhz
Typical
84
9.5
Unit
pF
SWITCHING CHARACTERISTICS
(1)
V
CC
= 2.7V
Symbol
f
MAX
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ
t
W
t
SU
t
H
t
SK
(o)
Propagation Delay
Ax to Bx or Bx to Ax
Propagation Delay
CLKAB, CLKBA to Ax or Bx
Propagation Delay
SBA or SAB to Ax or Bx
Output Enable Time
OEBA
to Ax
Output Disable Time
OEBA
to Ax
Output Enable Time
OEAB to Bx
Output Disable Time
OEAB to Bx
Pulse Duration CLKAB, CLKBA HIGH or LOW
Set-up Time, data before CLKAB↑, CLKBA↑
Hold Time, data after CLKAB↑, CLKBA↑
Output Skew
(2)
3.3
1.9
1.5
3.3
1.9
1.7
500
ns
ns
ns
ps
7.7
1.5
7.4
ns
8.6
1.5
7.1
ns
8.1
1.5
7.5
ns
8.9
1.5
7.4
ns
9.6
1.5
8.7
ns
8.4
1.5
8
ns
Parameter
Min.
80
Max.
7.8
V
CC
= 3.3V ± 0.3V
Min.
100
1.5
Max.
7.4
Unit
MHz
ns
NOTES:
1. See TEST CIRCUITS AND WAVEFORMS. T
A
= – 40°C to + 85°C.
2. Skew between any two outputs of the same package and switching in the same direction.
5
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参数对比
与IDT74LVC652AQ8相近的元器件有:IDT74LVC652APY8、IDT74LVC652APG8、IDT74LVC652ASO8。描述及对比如下:
型号 IDT74LVC652AQ8 IDT74LVC652APY8 IDT74LVC652APG8 IDT74LVC652ASO8
描述 Registered Bus Transceiver, LVC/LCX/Z Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, 0.635 MM PITCH, QSOP-24 Registered Bus Transceiver, LVC/LCX/Z Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, 0.65 MM PITCH, SSOP-24 Registered Bus Transceiver, LVC/LCX/Z Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, 0.65 MM PITCH, TSSOP-24 Registered Bus Transceiver, LVC/LCX/Z Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, 1.27 MM PITCH, SOIC-24
零件包装代码 SOIC SSOP TSSOP SOIC
包装说明 0.635 MM PITCH, QSOP-24 SSOP, TSSOP, 1.27 MM PITCH, SOIC-24
针数 24 24 24 24
Reach Compliance Code unknown unknown unknown unknown
其他特性 WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
系列 LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z
JESD-30 代码 R-PDSO-G24 R-PDSO-G24 R-PDSO-G24 R-PDSO-G24
JESD-609代码 e0 e0 e0 e0
长度 8.65 mm 8.2 mm 7.8 mm 15.4 mm
逻辑集成电路类型 REGISTERED BUS TRANSCEIVER REGISTERED BUS TRANSCEIVER REGISTERED BUS TRANSCEIVER REGISTERED BUS TRANSCEIVER
位数 8 8 8 8
功能数量 1 1 1 1
端口数量 2 2 2 2
端子数量 24 24 24 24
最高工作温度 85 °C 85 °C 85 °C 85 °C
最低工作温度 -40 °C -40 °C -40 °C -40 °C
输出特性 3-STATE 3-STATE 3-STATE 3-STATE
输出极性 TRUE TRUE TRUE TRUE
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 SSOP SSOP TSSOP SOP
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE
传播延迟(tpd) 8.4 ns 8.4 ns 8.4 ns 8.4 ns
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified
座面最大高度 1.75 mm 2 mm 1.2 mm 2.65 mm
最大供电电压 (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V
最小供电电压 (Vsup) 2.7 V 2.7 V 2.7 V 2.7 V
标称供电电压 (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V
表面贴装 YES YES YES YES
技术 CMOS CMOS CMOS CMOS
温度等级 INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
端子面层 TIN LEAD TIN LEAD TIN LEAD TIN LEAD
端子形式 GULL WING GULL WING GULL WING GULL WING
端子节距 0.635 mm 0.65 mm 0.65 mm 1.27 mm
端子位置 DUAL DUAL DUAL DUAL
宽度 3.9116 mm 5.3 mm 4.4 mm 7.5 mm
厂商名称 IDT (Integrated Device Technology) - IDT (Integrated Device Technology) IDT (Integrated Device Technology)
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