Enhanced N channel FET with no inherent diode to Vcc
5Ω bidirectional switches connect inputs to outputs
Ω
Pin compatible with the 74F257, 74FCT257, and 74FCT257T
Zero propagation delay, zero ground bounce
Undershoot clamp diodes on all switch and control inputs
TTL-compatible control inputs
Available in SOIC, QSOP, and S1 packages
IDTQS3257
DESCRIPTION:
The QS3257 is a high-speed CMOS LVTTL-compatible Quad 2:1
multiplexer/demultiplexer. The QS3257 is a function and pinout compatible
QuickSwitch version of the 74F257, 74FCT257, and the 74ALS/AS/LS257
Quad 2:1 multiplexers. The low ON resistance of the QS3257 allows inputs
to be connected to outputs without adding propagation delay and without
generating additional ground bounce noise.
Mux/Demux devices provide an order of magnitude faster speed than
equivalent logic devices.
The QS3257 is characterized for operation at -40°C to +85°C.
APPLICATIONS:
•
•
•
•
•
Logic replacement
Video, audio, graphics switching, muxing
Hot-swapping, hot-docking
Voltage translation (5V to 3.3V)
Bus funneling
FUNCTIONAL BLOCK DIAGRAM
S
E
I
0A
Y
A
I
1A
I
0B
Y
B
I
1B
I
0C
Y
C
I
1C
I
0D
Y
D
I
1D
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
c
2001 Integrated Device Technology, Inc.
FEBRUARY 2001
DSC-5756/6
IDTQS3257
HIGH-SPEED CMOS QUICKSWITCH QUAD 2:1 MUX/DEMUX
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
(2)
V
TERM
(3)
Description
Supply Voltage to Ground
DC Switch Voltage Vs
DC Input Voltage V
IN
AC Input Voltage (pulse width
≤
20ns)
DC Output Current
Maximum Power Dissipation (T
A
= 85°C)
Storage Temperature
Max
–0.5 to +7
–0.5 to +7
–0.5 to +7
–3
120
0.5
–65 to +150
Unit
V
V
V
V
mA
W
°C
S
I
0A
I
1A
Y
A
I
0B
I
1B
Y
B
GND
1
2
3
4
5
6
7
8
SOIC/ QSOP/ S1
TOP VIEW
16
15
14
13
12
11
10
9
V
CC
E
I
0D
I
1D
Y
D
I
0C
I
1C
Y
C
V
TERM
(3)
V
AC
I
OUT
P
MAX
T
STG
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. Vcc terminals.
3. All terminals except Vcc.
CAPACITANCE
Pins
Control Pins
Quickswitch Channels
(Switch OFF)
(T
A
= +25°C, f = 1.0MH
Z
, V
IN
= 0V, V
OUT
= 0V)
Typ.
4
Demux
Mux
5
8
Max.
(1)
5
7
9
Unit
pF
pF
NOTE:
1. This parameter is measured at characterization but not tested.
PIN DESCRIPTION
Pin Names
Ixx
S
E
Y
A
- Y
D
I/O
I
I
I
O
Data Inputs
Select Input
Enable Input
Data Outputs
Description
FUNCTION TABLE
(1)
Enable
E
H
L
L
S
X
L
H
Y
A
Hi-Z
I
0A
I
1A
Outputs
Y
B
Hi-Z
I
0B
I
1B
Y
C
Hi-Z
I
0C
I
1C
Y
D
Hi-Z
I
0D
I
1D
Function
Disconnected
Select 0
Select 1
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High-Impedance
2
IDTQS3257
HIGH-SPEED CMOS QUICKSWITCH QUAD 2:1 MUX/DEMUX
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= –40°C to +85°C, V
CC
= 5.0V ±5%
Symbol
V
IH
V
IL
I
IN
I
OZ
R
ON
V
P
Parameter
Input HIGH Level
Input LOW Level
Off-State Output Current (Hi-Z)
Switch ON Resistance
Pass Voltage
(2)
Test Conditions
Guaranteed Logic HIGH for Control Pins
Guaranteed Logic LOW for Control Pins
0V
≤
V
OUT
≤
V
CC
V
CC
= Min., V
IN
= 0V, I
ON
= 30mA
V
CC
= Min., V
IN
= 2.4V, I
ON
=15mA
V
IN
= V
CC
= 5V, I
OUT
= -5µA
Min.
2
—
—
—
—
—
3.7
Typ.
(1)
—
—
—
—
5
10
4
Max.
—
0.8
±1
±1
7
15
4.2
Unit
V
V
µA
µA
Ω
V
Input LeakageCurrent (Control Inputs)
(2)
0V
≤
V
IN
≤
V
CC
NOTES:
1. Typical values are at V
CC
= 5.0V, T
A
= 25°C.
2. Pass Voltage is guaranteed but not production tested.
TYPICAL ON RESISTANCE vs V
IN
AT V
CC
= 5V
16
R
ON
(ohms)
14
12
10
8
6
4
2
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
V
IN
(Volts)
3
IDTQS3257
HIGH-SPEED CMOS QUICKSWITCH QUAD 2:1 MUX/DEMUX
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
I
CCQ
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
Power Supply Current per Control Input HIGH
(2)
Dynamic Power Supply Current per MHz
(3)
Test Conditions
(1)
V
CC
= Max., V
IN
= GND or Vcc, f = 0
V
CC
= Max., V
IN
= 3.4V, f = 0
V
CC
= Max., I and Y pins open
Control Inputs Toggling at 50% Duty Cycle
NOTES:
1. For conditions shown as Min. or Max., use the appropriate values specified under DC Electrical Characteristics.
2. Per TLL driven input (V
IN
= 3.4V, control inputs only). I and Y pins do not contribute to
∆Icc.
3. This current applies to the control inputs only and represents the current required to switch internal capacitance at the specified frequency. The I and Y inputs generate no significant
AC or DC currents as they transition. This parameter is guaranteed but not production tested.
Max.
3
1.5
0.25
Unit
µA
mA
mA/MHz
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
T
A
= -40°C to +85°C, V
CC
= 5.0V ± 5%;
C
LOAD
= 50pF, R
LOAD
= 500Ω unless otherwise noted.
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PZH
t
PZL
t
PHZ
t
PLZ
Data Propagation Delay
(2,3)
Ix to Y
Switch Turn-on Delay
Sx to Y
Switch Turn-on Delay
Ex
to Y
Switch Turn-off Delay
(2)
Ex
to Y, Sx to Y
0.5
—
5
ns
Parameter
Min.
(1)
—
0.5
0.5
Typ.
—
—
—
Max.
0.25
(3)
5.2
4.8
Unit
ns
ns
ns
NOTES:
1.
Minimums are guaranteed but not production tested.
2.
This parameter is guaranteed but not production tested.
3.
The bus switch contributes no propagation delay other than the RC delay of the ON resistance of the switch and the load capacitance. The time constant for the switch alone
is of the order of 0.25ns for C
L
= 50pF. Since this time constant is much smaller than the rise and fall times of typical driving signals, it adds very little propagation delay to
the system. Propagation delay of the bus switch, when used in a system, is determined by the driving circuit on the driving side of the switch and its interaction with the load
FPGA/CPLD
