IMP690A , 692A , 802L/M, 805L
P
OWER
M
ANAGEMENT
µP Power Supply Supervisor
with Battery Backup Switch
The IMP690A/IMP692A/IMP802L/IMP802M/IMP805L simplify power
supply monitoring and control in microprocessor systems. Each circuit
implements four functions: Reset control, watchdog monitoring, battery-
backup switching and power-failure monitoring. In addition to
microprocessor reset under powerup and power-down conditions, these
devices provide battery-backup switching to maintain control in power-
loss and brown-out situations. Additional monitoring capabilities
can provide an early warning of unregulated power-supply loss before
the voltage regulator drops out. The important features of these four
functions are:
a) 1.6 second watchdog timer to keep microprocessor responsive
b)
c)
4.40V or 4.65V V
CC
threshold for microprocessor reset at power-up
and power-down
SPDT (single-pole, double-throw) PMOS switch connects backup
power to RAM if V
CC
fails
Key Features
x
Design improvement over Maxim
MAX690A/692A/802L/802M/805L
— 70% lower current than Maxim:
100µA maximum
— RESET Operation to 1.1V
x
Two precision supply-voltage monitor options
— 4.65V (IMP690A/802L/805L)
— 4.40V (IMP692A/802M)
x
Battery-backup power switch on-chip
x
Watchdog timer: 1.6 second timeout
x
Power failure/low battery detection
x
Short-circuit protection and thermal limiting
x
Small 8-pin SO package
x
No external components
x
Specified over full temperature range
d) 1.25V threshold detector for power loss or general purpose voltage
monitoring
While these features are pin–compatible with the industry standard
power–supply supervisors offered by Maxim, the IMP devices are supe-
rior replacements and can reduce power requirements by 70 percent
when compared to Maxim MAX690/MAX692A/MAX802L/MAX802M/
MAX805L devices. Short-circuit and thermal protection have also
been added.
The IMP690A/IMP802L/IMP805L generate a reset pulse when the
supply voltage drops below 4.65V, and the IMP692A/IMP802M
generate a reset below 4.40V. The IMP802L/IMP802M have power–fail
accuracy to ±2%. The IMP805L is the same as the IMP690A except that
RESET is provided instead of
RESET.
Applications
x
Embedded control systems
x
Battery–operated systems
x
Intelligent instruments
x
Wireless communication systems
x
PDAs and handheld equipment
x
µP/µC
power supply monitoring
Block Diagrams
V
BATT
V
CC
+
Typical Application
1
7
V
OUT
RESET
(RESET)
Unregulated DC
Regulated +5V
V
CC
RESET
PFI
R
2
PFO
WDI
V
OUT
NMI
I/O LINE
GND
BUS
CMOS
V
CC
RAM
GND
690A_01.eps
8
2
Battery-Switchover
Circuit
Reset
Generator
+
R
1
0.1µF
V
CC
RESET
1.25V
3.5V
6
WDI
+
+
+
+
Watchdog
Timer
+
–
3.6V
Lithium
Battery
V
BATT
GND
0.8V
4
PFI
1.25V
+
+
IMP690A
5
PFO
IMP690A, IMP692A, IMP802L, IMP802M,
IMP805L
( ) IMP805L
3
GND
690A_03.eps
IMP, Inc.
San Jose, CA
408-432-9100/www.impweb.com
IMP690A , 692A , 802L, 802M, 805L
Pin Configuration
Plastic/CerDip/SO
V
OUT
V
CC
GND
PFI
1
2
3
4
IMP690A
IMP692A
IMP802L
IMP802M
IMP805L
8
7
6
5
V
BATT
RESET (RESET)
WDI
PFO
( ) IMP805L
690A_02.eps
Ordering Information
Part Number
IMP690A
IMP690ACPA
IMP690ACSA
IMP690AC/D
IMP690AEPA
IMP690AESA
IMP690AMJA
4.5 to 4.75
4.5 to 4.75
4.25 to 4.50
4.25 to 4.50
4.25 to 4.50
4.25 to 4.50
4.25 to 4.50
4.25 to 4.50
4.5 to 4.75
4.5 to 4.75
4.5 to 4.75
4.5 to 4.75
4.25 to 4.50
4.25 to 4.50
4.25 to 4.50
4.25 to 4.50
4.5 to 4.75
4.5 to 4.75
4.5 to 4.75
4.5 to 4.75
4.5 to 4.75
4.5 to 4.75
Reset Threshold (V)
4.5 to 4.75
4.5 to 4.75
4.5 to 4.75
Temperature Range
0°C to +70°C
0°C to +70°C
25°C
– 40°C to +85°C
– 40°C to +85°C
Contact Factory
0°C to +70°C
0°C to +70°C
25°C
– 40°C to +85°C
– 40°C to +85°C
Contact Factory
0°C to +70°C
0°C to +70°C
– 40°C to +85°C
– 40°C to +85°C
0°C to +70°C
0°C to +70°C
– 40°C to +85°C
– 40°C to +85°C
0°C to +70°C
0°C to +70°C
25°C
–40°C to +85°C
–40°C to +85°C
Contact Factory
Pins-Package
8-Plastic DIP
8-SO
DICE
8-Plastic DIP
8-SO
8-CerDIP
8-Plastic DIP
8-SO
DICE
8-Plastic DIP
8-SO
8-CerDIP
8-Plastic DIP
8-SO
8-Plastic DIP
8-SO
8-Plastic DIP
8-SO
8-Plastic DIP
8-SO
8-Plastic DIP
8-SO
DICE
8-Plastic DIP
8-SO
8-CerDIP
IMP692A
IMP692ACPA
IMP692ACSA
IMP692AC/D
IMP692AEPA
IMP692AESA
IMP692AMJA
IMP802L
IMP802LCPA
IMP802LCSA
IMP802LEPA
IMP802LESA
IMP802M
IMP802MCPA
IMP802MCSA
IMP802MEPA
IMP802MESA
IMP805L
IMP805LCPA
IMP805LCSA
IMP805LC/D
IMP805LEPA
IMP805LESA
IMP805LMJA
2
IMP690A , 692A , 802L, 802M, 805L
Pin Description
Pin Number
IMP690A/IMP692A
IMP802L/IMP802M
1
IMP805L
1
Name
V
OUT
Function
Voltage supply for RAM. When V
CC
is above the reset threshold, V
OUT
connects to V
CC
through a P-channel MOS device. If V
CC
falls below the
reset threshold, this output will be connected to the backup supply at
V
BATT
(or V
CC
, whichever is higher) through the MOS switch to provide
continuous power to the CMOS RAM.
+5V power supply input
Ground
Power failure monitor input. PFI is connected to the internal power fail
comparator which is referenced to 1.25V. The power fail output (PFO)
is active LOW but remains HIGH if PFI is above 1.25V. If this feature is
unused, the PFI pin should be connected to GND or V
OUT
.
Power-fail output.
is active LOW whenever the PFI pin is less than
PFO
1.25V.
Watchdog input. The WDI input monitors microprocessor activity. An
internal timer is reset with each transition of the WDI input. If WDI is held
HIGH or LOW for longer than the watchdog timeout period, typically 1.6
seconds, RESET (or is asserted for the reset pulse width time,
RESET)
t
RS
, of 140ms, minimum.
Active-LOW reset output. When triggered by V
CC
falling below the reset
threshold or by watchdog timer timeout, RESET (or pulses low
RESET)
for the reset pulse width, t
RS
, typically 200ms. It will remain low if V
CC
is
below the reset threshold (4.65V in the IMP690A/IMP802L and 4.4V in
the IMP692A/IMP802L) and remains low for 200ms after V
CC
rise above
the reset threshold.
Active-HIGH reset output. The inverse of
RESET.
Auxiliary power or backup-battery input. V
BATT
should be connected to
GND if the function is not used. This input has about 40mV of hysteresis
to prevent rapid toggling between V
CC
and V
BATT
.
2
3
4
2
3
4
V
CC
GND
PFI
5
6
5
6
PFO
WDI
7
––––
RESET
––––
8
7
8
RESET
V
BATT
Absolute Maximum Ratings
Pin Terminal Voltage with Respect to Ground
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to 6.0V
V
BATT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to 6.0V
All Other Inputs* . . . . . . . . . . . . . . . . . . . –0.3V to (V
CC
+ 0.3V)
Input Current at V
CC
. . . . . . . . . . . . . . . . . . 200mA
Input Current at V
BATT
. . . . . . . . . . . . . . . . . 50mA
Input Current at GND . . . . . . . . . . . . . . . . . 20mA
Output Current:
V
OUT
. . . . . . . . . . . . . . . Short circuit protected
All Other Inputs . . . . . . . . . . . . . . . . . . . 20mA
Rate of Rise: V
BATT
and V
CC
. . . . . . . . . . 100V/µs
Continuous Power Dissipation
Plastic DIP (derate 9mW/°C above 70°C) . . . 800mW
SO (derate 5.9mW/°C above 70°C) . . . . . . . . 500mW
CerDIP (derate 8mW/°C above 70°C) . . . . . . 650mW
Operating Temperature Range (C Devices) . . . . 0°C to 70°C
Operating Temperature Range (E Devices) . . . . –40°C to 85°C
Storage Temperature Range . . . . . . . . . . . . . . . . . –65°C to 160°C
Lead Temperature Soldering, (10 sec) . . . . . . . . 300°C
* The input voltage limits on PFI and WDI may be exceeded if the
current is limited to less than 10mA
These are stress ratings only and functional operation is not implied.
Exposure to absolute maximum ratings for prolonged time periods may
affect device reliability.
3
IMP690A , 692A , 802L, 802M, 805L
Electrical Characteristics
Unless otherwise noted V
CC
= 4.75V to 5.5V for the IMP690A/IMP802L/IMP805L and V
CC
= 4.5V to 5.5V for the IMP692A/IMP802M;
V
BATT
= 2.8V; and T
A
= T
MIN
to T
MAX
.
Parameter
V
CC
, V
BATT
Voltage Range
(Note 1)
Supply Current Excluding I
OUT
I
SUPPLY
in Battery-Backup Mode
(Excluding I
OUT
)
V
BATT
Standby Current
(Note 2)
V
OUT
Output
V
OUT
in Battery-Backup Mode
Battery Switch Threshold,
V
CC
to V
BATT
Battery Switchover Hysteresis
Reset Threshold
Symbol
Conditions
IMP69_AC, IMP802_C
IMP805LC
IMP69_AE, IMP80_ _E
IMP69_AC, IMP802_C
IMP69_AE, IMP802_E, IMP805LE
V
CC
= 0V, V
BATT
= 2.8V
T
A
= 25°C
T
A
= T
MIN
to T
MAX
5.5V > V
CC
> V
BATT
– 0.2V
T
A
= 25°C
T
A
= T
MIN
to T
MAX
I
OUT
= 5mA
I
OUT
= 50mA
I
OUT
= 250µA, V
CC
< V
BATT
– 0.2V
Power-up
V
CC
< V
RT
Power-down
IMP690A/802L/805L
IMP692A, IMP802M
IMP802L, T
A
= 25°C, V
CC
falling
IMP802M, T
A
= 25°C, V
CC
falling
Min
1.1
1.1
1.1
Typ
Max Units
5.5
5.5
5.5
100
100
1.0
5.0
0.02
0.02
V
I
S
35
35
µA
µA
µA
V
V
mV
mV
V
V
RT
Reset Threshold Hysteresis
Reset Pulse Width
Reset Output Voltage
t
RS
I
SOURCE
= 800µA
I
SINK
= 3.2mA
IMP69_AC, IMP802_C, V
CC
= 1.0V, I
SINK
= 50µA
IMP69_AE, IMP802_E, V
CC
= 1.2V, I
SINK
= 100µA
IMP805LC, I
SOURCE
= 4µA, V
CC
= 1.1V
IMP805LE, I
SOURCE
= 4µA, V
CC
= 1.2V
IMP805L, I
SOURCE
= 800µA
IMP805L, I
SINK
= 3.2mA
t
WD
t
WP
V
IL
= 0.4V, V
IH
= 0.8V
CC
WDI = V
CC
WDI = 0V
V
CC
= 5V, Logic LOW
V
CC
= 5V, Logic HIGH
IMP69_A, IMP805L, V
CC
= 5V
IMP802_C/E, V
CC
= 5V
I
SOURCE
= 800µA
I
SINK
= 3.2mA
– 0.1
–1.0
V
CC
– 0.025 V
CC
– 0.010
V
CC
– 0.25 V
CC
– 0.10
V
BATT
– 0.1 V
BATT
– 0.001
20
–20
40
4.50
4.65
4.25
4.40
4.55
4.30
40
140
200
V
CC
– 1.5
4.75
4.50
4.70
4.45
280
0.4
0.3
0.3
mV
ms
V
0.8
0.9
V
CC
– 1.5
1.00
50
–150
3.5
1.20
1.225
– 25
V
CC
– 1.5
1.60
50
–50
0.4
2.25
150
0.8
1.25
1.250
0.01
1.30
1.275
25
0.4
sec
ns
µA
V
V
nA
V
Watchdog Timeout
WDI Pulse Width
WDI Input Current
WDI Input Threshold
(Note 3)
PFI Input Threshold
PFI Input Current
PFO Output Voltage
Notes: 1. If V
CC
or V
BATT
is 0V, the other must be greater than 2.0V.
2. Battery charging-current is “–”. Battery discharge-current is “+”.
3. WDI is guaranteed to be in an intermediate level state if WDI is floating and V
CC
is within the operating voltage range. WDI input
impedance is 50kΩ. WDI is biased to 0.3V
CC
.
4
IMP690A , 692A , 802L, 802M, 805L
Application Information
Reset Output
It is important to initialize a microprocessor to a known state in
response to specific events that could create code execution errors
and “lock-up”. The reset output of these supervisory circuits send
a reset pulse to the microprocessor in response to power-up,
power-down/power-loss or a watchdog time-out. The reset pulse
width, t
RS
, is typically around 200ms and is LOW for the
IMP690A, IMP692A, IMP802 and HIGH for the IMP805L.
Power-up reset occurs when a rising V
CC
reaches the reset thresh-
old, V
RT
, forcing a reset condition in which the reset output is
asserted in the appropriate logic state for the duration of t
RS
.
Figure 2
shows the reset pin timing.
Power-loss or “brown-out” reset occurs when V
CC
dips below the
reset threshold resulting in a reset assertion for the duration of t
RS
.
The reset signal remains asserted as long as V
CC
is between V
RT
and 1.1V, the lowest V
CC
for which these devices can provide a
guaranteed logic-low output. To ensure logic inputs connected to
the IMP690A/692A/802 RESET pin are in a known state when
V
CC
is under 1.1V, a 100kΩ pull-down resistor at RESET is needed:
the logic-high IMP805L will need a pull-up resistor to V
CC
.
A Watchdog time-out reset occurs when a logic “1” or logic “0” is
continuously applied to the WDI pin for more than 1.6 seconds.
After the duration of the reset interval, the watchdog timer starts
a new 1.6 second timing interval; the microprocessor must service
the watchdog input by changing states or by floating the WDI pin
before this interval is finished. If the WDI pin is held either HIGH
or LOW, a reset pulse will be triggered every 1.8 seconds (the 1.6
second timing interval plus the reset pulse width t
RS
).
Microprocessor Interface.
The IMP690 has logic-LOW RESET output while the IMP805 has
an inverted logic-HIGH RESET output. Microprocessors with bi-
directional reset pins (69HC11 for example) can pose a problem
when the supervisory circuit and the microprocessor output pins
attempt to go to opposite logic states. The problem can be
resolved by placing a 4.7kΩ resistor between the RESET output
and the microprocessor reset pin. This is shown in
Figure 3.
Since
the series resistor limits drive capabilities, the reset signal to other
devices should be buffered.
+5V
V
CC
+0V
+5V
V
OUT
+0V
+5V
RESET
+0V
+5V
(RESET)
+0V
+5V
PFO
+0V
( ) IMP805L
V
BATT
= PFI = 3.0V
I
OUT
= 0mA
690A_04.eps
3.0V
t
RS
3.0V
Figure 2. Timing Diagram
V
BATT
V
CC
+
8
2
Battery-Switchover
Circuit
Reset
Generator
+
1
7
V
OUT
RESET
(RESET)
Buffered RESET to Other System Components
1.25V
3.5V
6
WDI
+
+
+
+
Watchdog
Timer
V
CC
1.25V
+
+
V
CC
4.7k
0.8V
4
PFI
5
PFO
RESET
IMP690A
GND
RESET
IMP690A, IMP692A, IMP802L, IMP802M,
IMP805L
( ) IMP805L
3
GND
690A_03.eps
GND
690A_05.eps
Figure 1. Block Diagram
Figure 3. Interfacing with bi-directional microprocessor
reset inputs
5
安森美和安富利物联网创新设计大赛
