Data Sheet No.PD94253
IRU3048
DUAL SYNCHRONOUS PWM CONTROLLER
CIRCUITRY AND LDO CONTROLLER
PRELIMINARY DATA SHEET
FEATURES
Dual Synchronous Controller in 16-Pin Package
with 1808 out-of-phase operation
LDO Controller with 40mA drive
Configured as 2-Independent PWM Controller
Flexible, Same or Separate Supply Operation
Operation from 4V to 25V Input
Internal 200KHz Oscillator
Soft-Start controls all outputs
Fixed Frequency Voltage Mode
500mA Peak Output Drive Capability
Programmable Outputs
DESCRIPTION
The IRU3048 IC combines a Dual synchronous Buck
controller and a linear regulator controller, providing a
cost-effective, high performance and flexible solution for
multi-output applications. The Dual synchronous con-
troller is configured as 2-independent PWM controller.
IRU3048 provides a separate adjustable output by driv-
ing a switch as a linear regulator. This device features an
internal 200KHz oscillator, under-voltage lockout for all
input supplies, an external programmable soft start func-
tion as well as output under-voltage detection that latches
off the device when an output short is detected.
APPLICATIONS
DDR Memory Source Sink Vtt Application
Graphic Card
Hard Disk Drive
Power supplies requiring multiple outputs
TYPICAL APPLICATION
12V
5V
VcH1
Vcc
3.3V
C1
R1
V
OUT3
C2
R2
C3
R3
Comp1
R4
Comp2
Fb3
VcH2
HDrv1
Q2
L1
V
OUT1
Q1
V
OUT3
LDrv1
Q3
C6
U1
IRU3048
PGnd
R5
Fb1
Fb2
HDrv2
Q4
L2
V
OUT2
LDrv2
Q5
R7
C7
R6
C4
SS
C5
Gnd
R8
Figure 1 - Typical application of IRU3048 configured as 2-independent converter.
PACKAGE ORDER INFORMATION
T
A
(°C)
0 To 70
0 To 70
Rev. 1.7
09/12/02
DEVICE
IRU3048CF
IRU3048CS
www.irf.com
PACKAGE
16-Pin TSSOP (F)
16-Pin SOIC NB (S)
1
IRU3048
ABSOLUTE MAXIMUM RATINGS
Vcc Supply Voltage ..................................................
VcH1=VcH2 Supply Voltage ......................................
Storage Temperature Range ......................................
Operating Junction Temperature Range .....................
25V
30V (not rated for inductive load)
-65°C To 150°C
0°C To 125°C
PACKAGE INFORMATION
16-PIN PLASTIC TSSOP (F)
TOP VIEW
16-PIN PLASTIC SOIC NB (S)
TOP VIEW
Gnd
1
Fb2
2
Comp1
3
Comp2
4
VcH2
5
HDrv2
6
LDrv2
7
PGnd
8
16
Fb1
15
SS
14
Fb3
13
V
OUT3
12
VcH1
11
HDrv1
10
LDrv1
9
Vcc
Gnd
1
Fb2
2
Comp1
3
Comp2
4
VcH2
5
HDrv2
6
LDrv2
7
PGnd
8
16
Fb1
15
SS
14
Fb3
13
V
OUT3
12
VcH1
11
HDrv1
10
LDrv1
9
Vcc
u
JA
=908C/W
u
JA
=858C/W
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over Vcc=5V, VcH1=VcH2=12V, T =0 to 70°C. Typical
A
values refer to T
A
=25°C. Low duty cycle pulse testing is used which keeps junction and case temperatures equal to
the ambient temperature.
PARAMETER
Reference Voltage
Fb Voltage
Fb Voltage Line Regulation
UVLO
UVLO Threshold - Vcc
UVLO Hysteresis - Vcc
UVLO Threshold - VcH1
UVLO Hysteresis - VcH1
UVLO Threshold - VcH2
UVLO Hysteresis - VcH2
UVLO Threshold - Fb
UVLO Hysteresis - Fb
Supply Current
Vcc Dynamic Supply Current
VcH1 Dynamic Supply Current
VcH2 Dynamic Supply Current
Vcc Static Supply Current
VcH1 Static Supply Current
VcH2 Static Supply Current
Soft-Start Section
Charge Current
SYM
V
FB
L
REG
TEST CONDITION
MIN
1.225
5<Vcc<12
TYP
1.250
0.2
4.2
0.25
3.5
0.2
3.5
0.2
0.6
0.1
5
7
7
3.5
2
2
15
25
30
MAX
1.275
UNITS
V
%
V
V
V
V
V
V
V
V
mA
mA
mA
mA
mA
mA
mA
UVLO
V
CC
Supply Ramping Up
UVLO
V
C
H1
Supply Ramping Up
UVLO
V
C
H2
Supply Ramping Up
UVLO
FB
Fb Ramping Down
Dyn I
CC
Dyn I
C
H1
Dyn I
C
H2
I
CCQ
I
C
H1Q
I
C
H2Q
SS
IB
Freq=200KHz, C
L
=1500pF
Freq=200KHz, C
L
=1500pF
Freq=200KHz, C
L
=1500pF
SS=0V
SS=0V
SS=0V
SS=0V
2
www.irf.com
Rev. 1.7
09/12/02
IRU3048
PARAMETER
Error Amp
Fb Voltage Input Bias Current
Fb Voltage Input Bias Current
Transconductance 1
Transconductance 2
Oscillator
Frequency
Ramp Amplitude
Output Drivers
Rise Time
Fall Time
Dead Band Time
Max Duty Cycle
Min Duty Cycle
LDO Controller
Drive Current
Fb Voltage
Input Bias Current
SYM
I
FB1
I
FB2
g
m1
g
m2
Freq
V
RAMP
Tr
Tf
T
DB
T
ON
T
OFF
I
LDO
V
FB
LDO
I
LDO(BIAS)
C
L
=1500pF
C
L
=1500pF
Fb=1V, Freq=200KHz
Fb=1.5V
50
85
0
30
1.225
TEST CONDITION
SS=3V
SS=0V
MIN
TYP
-0.1
-64
400
600
180
200
1.25
35
50
150
90
0
45
1.25
0.5
220
MAX
UNITS
mA
mA
mmho
mmho
KHz
V
PP
ns
ns
ns
%
%
mA
V
mA
100
100
250
1.275
2
PIN DESCRIPTIONS
PIN#
1
2
16
PIN SYMBOL
Gnd
Fb2
Fb1
PIN DESCRIPTION
Ground pin.
Inverting inputs to the error amplifiers. These pins work as feedback inputs for each
channel, and are connected directly to the output of the switching regulator via a resistor
divider to set the output voltages.
Compensation pins for the error amplifiers.
Supply voltage for the high side output drivers. These are connected to voltages that
must be at least 4V higher than their bus voltages (assuming 5V threshold MOSFET). A
minimum of 1mF high frequency capacitor must be connected from these pins to PGnd
pin to provide peak drive current capability.
Output driver for the high side power MOSFET. Connect a diode, such as BAT54 or
1N4148, from these pins to ground for the application when the inductor current goes
negative (Source/Sink), soft-start at no load and for the fast load transient from full load to
no load.
Output driver for the synchronous power MOSFET.
This pin serves as the separate ground for MOSFET’s driver and should be connected to
the system’s ground plane.
Supply voltage for the internal blocks of the IC.
Driver signal for the LDO’s external transistor.
LDO’s feedback pin, connected to a resistor divider to set the output voltage of LDO.
Soft-Start pin. The converter can be shutdown by pulling this pin below 0.5V.
3
4
5
12
Comp1
Comp2
VcH2
VcH1
6
11
HDrv2
HDrv1
7
10
8
9
13
14
15
LDrv2
LDrv1
PGnd
Vcc
V
OUT3
Fb3
SS
Rev. 1.7
09/12/02
www.irf.com
3
IRU3048
BLOCK DIAGRAM
Vcc 9
Bias
Generator
64uA Max
4.2V / 4.0V
UVLO
P R
O
3V
1.25V
12 V c H 1
25uA
11 HDrv1
SS 15
VH
c 1
VH
c 2
3.5V / 3.3V
3.5V / 3.3V
P R
O
PWM Comp1
Error Amp1
25K
1.25V
25K
10 LDrv1
R
Q
S
Reset Dom
Fb1 16
Comp1
3
Ramp1
Two Phase
Oscillator
Ramp2
Set1
SS > 2V
5 VcH2
6
Set2
HDrv2
S
PWM Comp2
Error Amp2
25K
1.25V
25K
Q
R
Reset Dom
7 LDrv2
Fb2
2
0.5V
8 PGnd
P R
O
Comp2
4
Vcc
25K
1.25V
2V
25K
Fb3 14
SS
40mA LDO Controller
Gnd
1
13 V
OUT3
Figure 2 - Block diagram of the IRU3048.
4
www.irf.com
Rev. 1.7
09/12/02
IRU3048
THEORY OF OPERATION
Introduction
The IRU3048 is designed for multi-outputs applications.
It includes two synchronous buck controllers and a lin-
ear regulator controller. The two synchronous controller
operates with fixed frequency voltage mode and is con-
figured as two independent controllers. The timing of the
IC is provided through an internal oscillator circuit. These
are two out of phase oscillators.
Soft-Start
The IRU3048 has a programmable soft start to control
the output voltage rise and limit the current surge at the
start-up. To ensure correct start-up, the soft-start se-
quence initiates when the Vcc, VcH1 and VcH2 rise
above their threshold and generates the Power On Re-
set (POR) signal. Soft-start function operates by sourc-
ing an internal current to charge an external capacitor to
about 3V. Initially, the soft-start function clamps the E/
A’s output of the PWM converter. As the charging volt-
age of the external capacitor ramps up, the PWM sig-
nals increase from zero to the point the feedback loop
takes control.
Out of Phase Operation
The IRU3048 drives its two output stages 1808 out of
phase. In application with single input voltage, the out of
phase operation reduces the input ripple current. This
results in much smaller RMS current in the input ca-
pacitor and reduction of input capacitors.
Shutdown
The converter can be shutdown by pulling the soft-start
pin below 0.5V. This can be easily done by using an
external small signal transistor. During shutdown the
MOSFET drivers and the LDO controller turn off.
Short-Circuit Protection
The outputs are protected against the short circuit. The
IRU3048 protects the circuit for shorted output by sens-
ing the output voltages. The IRU3048 shuts down the
PWM signals and LDO controller, when the output volt-
ages drops below the set values.
Under-Voltage Lockout
The under-voltage lockout circuit assures that the
MOSFET driver outputs and LDO controller remain in
the off state whenever the supply voltages drop below
set parameters. Normal operation resumes once the
supply voltages rise above the set values.
APPLICATION INFORMATION
Design Example:
The following example is a typical application for IRU3048
in current sharing mode. The schematic is Figure 9 on
page 12.
For Switcher
V
IN1
= 12V
V
OUT1
= 3.3V
I
OUT1
= 4A
V
IN2
= 5V
V
OUT2
= 1.8V
I
OUT2
= 4A
DV
OUT
= 75mV
f
S
= 200KHz
PWM Section
Output Voltage Programming
Output voltage is programmed by reference voltage and
external voltage divider. The Fb1 pin is the inverting input
of the error amplifier, which is internally referenced to
1.25V. The divider is ratioed to provide 1.25V at the Fb1
pin when the output is at its desired value. The output
voltage is defined by using the following equation:
For Linear Regulator
V
IN3
= 3.3V
V
OUT3
= 2.5V
I
OUT3
= 2A
V
OUT1
= V
REF
3
1+
(
R
)
R
6
8
---(1)
When an external resistor divider is connected to the
output as shown in Figure 3.
V
OUT1
IRU3048
Fb1
R
8
R
6
Figure 3 - Typical application of the IRU3048 for
programming the output voltage.
Equation (1) can be rewritten as:
R
6
= R
8
3
(
V
V
OUT1
REF
-1
)
V
OUT2
=1.8V
V
REF
=1.25V
R
15
=1K, R
14
=442V
Will result to:
V
OUT1
=3.3V
V
REF
=1.25V
R
8
=1K, R
6
=1.64K
Rev. 1.7
09/12/02
www.irf.com
5
