ISL6556B
NOT RECOMMENDED FOR NEW DESIGNS
NO RECOMMENDED REPLACEMENT
contact our Technical Support Center at
1-888-INTERSIL or www.intersil.com/tsc
DATASHEET
FN9097
Rev 4.00
December 28, 2004
Optimized Multi-Phase PWM Controller with 6-Bit DAC and Programmable
Internal Temperature Compensation for VR10.X Application
The ISL6556B controls microprocessor core voltage
regulation by driving up to 4 synchronous-rectified buck
channels in parallel. Multi-phase buck converter architecture
uses interleaved timing to multiply channel ripple frequency
and reduce input and output ripple currents.
The ISL6556B utilizes r
DS(ON)
current sensing in each
phase for adaptive voltage positioning (droop), channel-
current balancing, and overcurrent protection. To ensure the
accuracy of droop, a programmable internal temperature
compensation function is implemented to nullify the effect of
r
DS(ON)
temperature sensitivity.
A unity gain, differential amplifier is provided for remote voltage
sensing. Any potential difference between remote and local
grounds can be eliminated using the remote-sense amplifier.
The precision threshold-sensitive enable input is available to
accurately coordinate the startup of the ISL6556B with Intersil
MOSFET driver IC. Dynamic-VID™ technology allows
seamless on-the-fly VID changes. The offset pin allows accurate
voltage offset settings that are independent of VID setting. The
ISL6556B uses 5V bias and has a built-in shunt regulator to
allow 12V bias using only a small external limiting resistor.
Features
• Precision Multi-Phase Core Voltage Regulation
- Differential Remote Voltage Sensing
-
0.5%
System Accuracy Over Temperature and Life
- Adjustable Reference-Voltage Offset
• Precision r
DS(ON)
Current Sensing
- Integrated Programmable Temperature Compensation
- Accurate Load-Line Programming
- Accurate Channel-Current Balancing
- Low-Cost, Lossless Current Sensing
• Internal Shunt Regulator for 5V or 12V Biasing
• Microprocessor Voltage Identification Input
- Dynamic VID™ Technology
- 6-Bit VID Input
- 0.8375V to 1.600V in 12.5mV Steps
• Threshold Enable Function for Precision Sequencing
• Overcurrent Protection
• Overvoltage Protection
- No Additional External Components Needed
- OVP Pin to drive optional Crowbar Device
• 2, 3, or 4 Phase Operation up to 1.5MHz per Phase
• QFN Package Option
- QFN Compliant to JEDEC PUB95 MO-220 QFN - Quad
Flat No Leads - Product Outline
- QFN Near Chip Scale Package Footprint; Improves
PCB Efficiency, Thinner in Profile
•
Pb-free Available (RoHS Compliant)
Ordering Information
PART NUMBER TEMP. (°C)
ISL6556BCB*
ISL6556BCBZ*
(Note)
ISL6556BCBZA
-T (Note)
ISL6556BCR*
ISL6556BCRZ*
(Note)
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
PACKAGE
28 Ld SOIC
PKG. DWG. #
M28.3
28 Ld SOIC (Pb-free) M28.3
28 Ld SOIC Tape and M28.3
Reel (Pb-free)
32 Ld 5x5B QFN
32 Ld 5x5B QFN
(Pb-free)
L32.5x5B
L32.5x5B
* Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
FN9097 Rev 4.00
December 28, 2004
Page 1 of 24
ISL6556B
Pinouts
32 LEAD QFN
TOP VIEW
PGOOD
ENLL
GND
VID4
OVP
VCC
OVP
PGOOD
VID4
1
2
3
4
5
6
7
8
9
28 LEAD SOIC
TOP VIEW
28
27
26
25
24
23
22
21
20
19
18
17
16
15
FS
EN
VCC
PWM4
ISEN4
ISEN2
PWM2
PWM1
ISEN1
ISEN3
PWM3
GND
RGND
VSEN
32
VID3
VID2
VID1
VID0
VID12.5
OFS
TCOMP
REF
31
30
29
28
27
26
EN
FS
25
24
PWM4
23
ISEN4
22
ISEN2
21
PWM2
20
PWM1
19
ISEN1
18
GND
17
ISEN3
1
2
3
4
5
6
7
8
9
OFSOUT
VID3
VID2
VID1
VID0
VID12.5
OFS
TCOMP 10
REF 11
FB 12
COMP 13
VDIFF 14
10
FB
11
COMP
12
VDIFF
13
VSEN
14
RGND
15
GND
16
PWM3
FN9097 Rev 4.00
December 28, 2004
Page 2 of 24
ISL6556B
ISL6565BCB Block Diagram
VDIFF PGOOD
OVP
VCC
RGND
x1
VSEN
S
OVP
LATCH
Q
R
POWER-ON
RESET (POR)
1.24V
EN
THREE-STATE
OVP
SOFT-START
AND
FAULT LOGIC
CLOCK AND
SAWTOOTH
GENERATOR
FS
+200mV
PWM
PWM1
OFS
OFFSET
PWM
PWM2
REF
PWM
PWM3
VID4
VID3
VID2
VID1
VID0
VID12.5
COMP
FB
OC
I_TRIP
DYNAMIC
VID
D/A
E/A
PWM
PWM4
CHANNEL
CURRENT
BALANCE
CHANNEL
DETECT
ISEN1
CHANNEL
SAMPLE
&
HOLD
CURRENT
SENSE
ISEN2
ISEN3
ISEN4
TCOMP
I_TOT
T
GND
FN9097 Rev 4.00
December 28, 2004
Page 3 of 24
ISL6556B
ISL6565BCR Block Diagram
VDIFF PGOOD
OVP
VCC
ENLL
RGND
x1
VSEN
S
OVP
LATCH
Q
R
POWER-ON
RESET (POR)
1.24V
EN
THREE-STATE
OVP
SOFT-START
AND
FAULT LOGIC
CLOCK AND
SAWTOOTH
GENERATOR
FS
+200mV
PWM
PWM1
OFS
OFFSET
PWM
PWM2
OFSOUT
REF
PWM
PWM3
VID4
VID3
VID2
VID1
VID0
VID12.5
COMP
FB
OC
I_TRIP
DYNAMIC
VID
D/A
E/A
PWM
PWM4
CHANNEL
CURRENT
BALANCE
CHANNEL
DETECT
ISEN1
I_TOT
CHANNEL
SAMPLE
&
HOLD
CURRENT
SENSE
ISEN2
ISEN3
ISEN4
TCOMP
T
GND
FN9097 Rev 4.00
December 28, 2004
Page 4 of 24
ISL6556B
Typical Application of ISL6556BCB
+12V
VIN
VCC
PVCC
BOOT
UGATE
PHASE
HIP6601B
+5V
PWM
LGATE
GND
FB
VDIFF
VSEN
RGND
PGOOD
OVP
COMP VCC
TCOMP
+12V
VIN
REF
VCC
PVCC
BOOT
UGATE
PHASE
ISL6556BCB
PWM1
VID4
VID3
VID2
VID1
VID0
VID12.5
OFS
FS
GND
RT
ISEN2
PWM3
ISEN3
PWM4
ISEN4
EN
+12V
ISEN1
PWM2
HIP6601B
LGATE
PWM
GND
VIN
P
LOAD
VCC
PVCC
BOOT
UGATE
PHASE
HIP6601B
LGATE
PWM
VID_PGOOD
(BUFFERED)
+12V
VIN
GND
VCC
PVCC
BOOT
UGATE
PHASE
HIP6601B
LGATE
PWM
GND
FN9097 Rev 4.00
December 28, 2004
Page 5 of 24
