2A Low Quiescent Current 1MHz High Efficiency
Synchronous Buck Regulator
ISL8012
The ISL8012 is a high efficiency, monolithic, synchronous
step-down DC/DC converter that can deliver up to 2A continuous
output current from a 2.7V to 5.5V input supply. It uses a current
control architecture to deliver very low duty cycle operation at
high frequency with fast transient response and excellent loop
stability.
The ISL8012 integrates a pair of low ON-resistance P-Channel
and N-Channel internal MOSFETs to maximize efficiency and
minimize external component count. The 100% duty-cycle
operation allows less than 240mV dropout voltage at 2A output
current. High 1MHz pulse width modulation (PWM) switching
frequency allows the use of small external components.
The ISL8012 can be configured for discontinuous or forced
continuous operation at light load. Forced continuous operation
reduces noise and RF interference while discontinuous mode
provides high efficiency by reducing switching losses at light
loads.
Fault protection is provided by internal current limiting during
short circuit and overcurrent conditions, an output overvoltage
comparator and over-temperature monitor circuit. A power-good
output voltage monitor indicates when the output is in regulation.
The ISL8012 offers a 1ms Power-good (PG) timer at power-up.
When shutdown, ISL8012 discharges the output capacitor. Other
features include internal soft-start, internal compensation,
overcurrent protection, and thermal shutdown.
The ISL8012 is offered in a space saving 3mmx3mm 10 Ld DFN
package lead free package with exposed pad lead frames for low
thermal. The complete converter occupies less than 0.35in
2
area.
Features
• High Efficiency Synchronous Buck Regulator with up to 95%
Efficiency
• Power-Good (PG) Output with a 1ms Delay
• 2.7V to 5.5V Supply Voltage
• 3% Output Accuracy Over-Temperature/Load/Line
• 2A Guaranteed Output Current
• Start-up with Pre-Biased Output
• Internal Soft-Start - 1ms
• Soft-Stop Output Discharge During Disabled
• 40µA Quiescent Supply Current in PFM Mode
• Selectable Forced PWM Mode and PFM Mode
• Less than 1µA Logic Controlled Shutdown Current
• 100% Maximum Duty Cycle
• Internal Current Mode Compensation
• Peak Current Limiting and Hiccup Mode Short Circuit
Protection
• Over-Temperature Protection
• Small 10 Ld 3mmx3mm DFN
• Pb-Free (RoHS Compliant)
Applications
• DC/DC POL Modules
• µC/µP, FPGA and DSP Power
• Plug-in DC/DC Modules for Routers and Switchers
• Portable Instruments
• Test and Measurement Systems
• Li-ion Battery Powered Devices
• Small Form Factor (SFP) Modules
• Bar Code Readers
Related Literature
• See
AN1360
for “ISL8012EVAL1Z: 2A Synchronous Buck
Regulator with Integrated MOSFETs”
FN6616.2
December 1, 2011
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Copyright Intersil Americas Inc. 2008, 2010, 2011. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL8012
Pin Configuration
ISL8012
(10 LD DFN)
TOP VIEW
VIN 1
VCC 2
EN 3
PG 4
MODE 5
PD
10 LX
9 PGND
8 SGND
7 VFB
6 RSI
Pin Descriptions
SYMBOL
VIN
VCC
EN
PG
MODE
RSI
PIN NUMBER
1
2
3
4
5
6
DESCRIPTION
Input supply voltage. Connect a 10µF ceramic capacitor to power ground.
Input supply for the logic. Connect to VIN.
Regulator enable pin. Enable the output when driven to high. Shutdown the chip and discharge output capacitor
when driven to low. Do not leave this pin floating.
1ms timer output. At power-up or EN HI, this output is a 1ms delayed Power-Good signal for the output voltage. This
output can be reset by a low RSI signal. 1ms starts when RSI goes to high.
Mode Selection pin. Connect to logic high or input voltage VIN for PFM mode; connect to logic low or ground for
forced PWM mode. Do not leave this pin floating.
This input resets the 1ms timer. When the output voltage is within the PGOOD window, an internal timer is started and
generates a PG signal 1ms later when RSI is low. A high RSI resets PG and RSI high to low transition restarts the
internal counter if the output voltage is within the window, otherwise the counter is reset by the output voltage
condition.
Buck regulator output feedback. Connect to the output through a resistor divider for adjustable output voltage
(ISL8012-ADJ). For preset output voltage, connect this pin to the output.
System ground for the control logic. All voltage levels are measured with respect to this pin.
Ground connect for the IC and thermal relief for the package. The exposed pad must be connected to PGND and
soldered to the PCB.
Switching node connection. Connect to one terminal of inductor.
The exposed pad must be connected to the PGND and SGND pin for proper electrical performance. The exposed pad
must also be connected to as much as possible for optimal thermal performance.
VFB
SGND
PGND
LX
Exposed Pad
7
8
9
10
PD
2
December 1, 2011
FN6616.2
ISL8012
Typical Application
L
INPUT 2.7V TO 5.5V
VIN
LX
C2
2x10µF
C1
2x10µF
PGND
R2
124k
OUTPUT
1.8V/2A
C3*
220pF
ISL8012
EN
R1
100k
PG
VFB
SGND
R3
100k
MODE
RSI
*C3 is optional
FIGURE 1. TYPICAL APPLICATION DIAGRAM
Block Diagram
MODE
27pF
390k
SHUTDOWN
SOFT-START
SHUTDOWN
EN
BANDGAP
0.8V
OSCILLATOR
EAMP
+
COMP
PWM/PFM
LOGIC
CONTROLLER
PROTECTION
DRIVER
VIN
VFB
SLOPE
COMP
CSA
0.864V
+
+
OCP
0.736V
+
SKIP
PG
1ms
DELAY
RSI
0.2V
3
+
+
LX
+
GND
+
1V
0.25V
ZERO-CROSS
SENSING
SCP
+
FIGURE 2. FUNCTIONAL BLOCK DIAGRAM
December 1, 2011
FN6616.2
ISL8012
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
ISL8012IRZ
NOTES:
1. Add “-T*” or suffix for tape and reel. Please refer to
TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for
ISL8012.
For more information on MSL please see techbrief
TB363.
012Z
PART
MARKING
TEMP. RANGE
(°C)
-40 to +85
PACKAGE
(Pb-Free)
10 Ld 3x3 DFN
PKG.
DWG. #
L10.3x3C
4
December 1, 2011
FN6616.2
ISL8012
Absolute Maximum Ratings
(Reference to GND)
VIN, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
EN, RSI, PG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VIN+0.3V
LX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1.5V (100ns)/-0.3V (DC) to 6.5V
VFB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 2.7V
Thermal Information
Thermal Resistance (Typical)
JA
(°C/W)
JC
(°C/W)
10 Ld 3x3 DFN (Notes 4, 5). . . . . . . . . . .
49
5.5
Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . .-55°C to +125°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
V
IN
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
Load Current Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0A to 2A
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief
TB379.
5. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Unless otherwise noted, all parameter limits are established over the recommended operating conditions and
the typical specifications are measured at the following conditions: T
A
= -40°C to +85°C, V
IN
= 3.6V, EN = VCC, unless otherwise noted. Typical values are
at T
A
= +25°C. Boldface limits apply over the operating temperature range, -40°C to +85°C.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
(Note 7)
TYP
MAX
(Note 7) UNITS
Electrical Specifications
INPUT SUPPLY
VIN Undervoltage Lockout Threshold
V
UVLO
Rising
Falling
Quiescent Supply Current
I
VIN
MODE = VIN, no load at the output
MODE = VIN, no load at the output and no switches
switching; design info only
MODE = SGND, no load at the output
Shut Down Supply Current
I
SD
V
IN
= 5.5V, EN = low
2.2
2.5
2.4
40
15
6
0.1
8
2
60
2.7
V
V
µA
µA
mA
µA
OUTPUT REGULATION
VFB Regulation Voltage
VFB Bias Current
Output Voltage Accuracy
Line Regulation
V
VFB
I
VFB
T
A
= 0°C to +85°C
VFB = 0.75V
V
IN
= V
O
+ 0.5V to 5.5V, I
O
= 0A to 2A (Note 6)
V
IN
= V
O
+ 0.5V to 5.5V (minimal 2.7V), I
OUT
= 400mA
-3
0.2
0.784
0.8
0.1
3
0.816
V
µA
%
%/V
COMPENSATION
Error Amplifier Trans-Conductance
Adjustable version, design info only
20
µA/V
LX
P-Channel MOSFET ON-Resistance
V
IN
= 5.5V, I
O
= 200mA
V
IN
= 2.7V, I
O
= 200mA
N-Channel MOSFET ON-Resistance
V
IN
= 5.5V, I
O
= 200mA
V
IN
= 2.7V, I
O
= 200mA
P-Channel MOSFET Peak Current Limit
LX Maximum Duty Cycle
PWM Switching Frequency
f
S
T
A
= 0°C to +85°C
0.840
I
PK
2.65
0.12
0.21
0.11
0.13
3.00
100
1
1.16
0.22
0.27
0.22
0.27
3.50
A
MHz
5
December 1, 2011
FN6616.2
模拟电子
