IT8712F
Environment Control – Low Pin Count Input / Output
(EC - LPC I/O)
Preliminary Specification V0.9.3
ITE TECH. INC.
Specification subject to Change without notice, AS IS and for reference only. For purchasing, please
contact sales representatives.
Please note that the IT8712F V0.9.3 is applicable to K version and future versions.
Copyright
©
2006 ITE Tech. Inc.
This is Preliminary document release. All specifications are subject to change without notice.
The material contained in this document supersedes all previous documentation issued for the related
products included herein. Please contact ITE Tech. Inc. for the latest document(s). All sales are subject to
ITE’s Standard Terms and Conditions, a copy of which is included in the back of this document.
All sales are subject to ITE’s Standard Terms and Conditions, a copy of which is included in the back of this
document.
ITE, IT8712F is a trademark of ITE Tech. Inc.
Intel is claimed as a trademark by Intel Corp.
Microsoft and Windows are claimed as trademarks by Microsoft Corporation.
PCI is claimed as a trademark by the PCI Special Interest Group.
IrDA is claimed as a trademark by the Infrared Data Association.
All other trademarks are claimed by their respective owners.
All specifications are subject to change without notice.
Additional copies of this manual or other ITE literature may be obtained from:
ITE Tech. Inc.
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8F, No. 233-1, Bao Chiao RD., Hsin Tien,
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Revision History
Revision History
Section
-
Revision
The first function of pin 79 was removed.
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IT8712F V0.9.3
Contents
CONTENTS
1. Features
..................................................................................................................................................... 1
2. General Description ....................................................................................................................................... 3
3. Block Diagram................................................................................................................................................ 5
4. Pin Configuration ........................................................................................................................................... 7
5. IT8712F Pin Descriptions .............................................................................................................................. 9
6. List of GPIO Pins ......................................................................................................................................... 25
7. Power On Strapping Options and Special Pin Routings ............................................................................. 29
8. Configuration .............................................................................................................................................. 31
8.1 Configuring Sequence Description ................................................................................................... 31
8.2 Description of the Configuration Registers ....................................................................................... 33
8.2.1 Logical Device Base Address .............................................................................................. 38
8.3 Global Configuration Registers (LDN: All) ........................................................................................ 39
8.3.1 Configure Control (Index=02h)............................................................................................. 39
8.3.2 Logical Device Number (LDN, Index=07h) .......................................................................... 39
8.3.3 Chip ID Byte 1 (Index=20h, Default=87h) ............................................................................ 39
8.3.4 Chip ID Byte 2 (Index=21h, Default=12h) ............................................................................ 39
8.3.5 Configuration Select and Chip Version (Index=22h, Default=08h) ...................................... 39
8.3.6 Clock Selection Register (Index=23h, Default=00h) ............................................................ 40
8.3.7 Software Suspend and Flash I/F Control Register (Index=24h, Default=00s0s0s0b, MB
PnP)...................................................................................................................................... 40
8.3.8 GPIO Set 1 Multi-Function Pin Selection Register (Index=25h, Default=01h) .................... 41
8.3.9 GPIO Set 2 Multi-Function Pin Selection Register (Index=26h, Default=00h) .................... 41
8.3.10 GPIO Set 3 Multi-Function Pin Selection Register (Index=27h, Default=00h) .................... 42
8.3.11 GPIO Set 4 Multi-Function Pin Selection Register (Index=28h, Default=40h) .................... 43
8.3.12 GPIO Set 5 Multi-Function Pin Selection Register (Index=29h, Default=00h) .................... 43
8.3.13 Extended 1 Multi-Function Pin Selection Register (Index=2Ah, Default=00h) .................... 44
8.3.14 Logical Block Lock Register (Index=2Bh, Default=00h) ...................................................... 45
8.3.15 Extended 2 Multi-Function Pin Selection Register (Index=2Ch, Default=1Fh).................... 45
8.3.16 Test 1 Register (Index=2Eh, Default=00h) .......................................................................... 46
8.3.17 Test 2 Register (Index=2Fh, Default=00h)........................................................................... 46
8.4 FDC Configuration Registers (LDN=00h) ......................................................................................... 47
8.4.1 FDC Activate (Index=30h, Default=00h) .............................................................................. 47
8.4.2 FDC Base Address MSB Register (Index=60h, Default=03h) ............................................. 47
8.4.3 FDC Base Address LSB Register (Index=61h, Default=F0h).............................................. 47
8.4.4 FDC Interrupt Level Select (Index=70h, Default=06h)......................................................... 47
8.4.5 FDC DMA Channel Select (Index=74h, Default=02h) ......................................................... 47
8.4.6 FDC Special Configuration Register 1 (Index=F0h, Default=00h)....................................... 47
8.4.7 FDC Special Configuration Register 2 (Index=F1h, Default=00h)....................................... 48
8.5 Serial Port 1 Configuration Registers (LDN=01h) ............................................................................ 49
8.5.1 Serial Port 1 Activate (Index=30h, Default=00h).................................................................. 49
8.5.2 Serial Port 1 Base Address MSB Register (Index=60h, Default=03h) .................................. 49
8.5.3 Serial Port 1 Base Address LSB Register (Index=61h, Default=F8h)................................... 49
8.5.4 Serial Port 1 Interrupt Level Select (Index=70h, Default=04h) ............................................ 49
8.5.5 Serial Port 1 Special Configuration Register 1 (Index=F0h, Default=00h) .......................... 49
8.5.6 Serial Port 1 Special Configuration Register 2 (Index=F1h, Default=50h) .......................... 50
8.5.7 Serial Port 1 Special Configuration Register 3 (Index=F2h, Default=00h) .......................... 50
8.5.8 Serial Port 1 Special Configuration Register 4 (Index=F3h, Default=7Fh) .......................... 50
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IT8712F V0.9.3
IT8712F
Serial Port 2 Configuration Registers (LDN=02h) ............................................................................ 51
8.6.1 Serial Port 2 Activate (Index=30h, Default=00h).................................................................. 51
8.6.2 Serial Port 2 Base Address MSB Register (Index=60h, Default=02h) .................................. 51
8.6.3 Serial Port 2 Base Address LSB Register (Index=61h, Default=F8h)................................... 51
8.6.4 Serial Port 2 Interrupt Level Select (Index=70h, Default=03h) ............................................ 51
8.6.5 Serial Port 2 Special Configuration Register 1 (Index=F0h, Default=00h) .......................... 51
8.6.6 Serial Port 2 Special Configuration Register 2 (Index=F1h, Default=50h) .......................... 52
8.6.7 Serial Port 2 Special Configuration Register 3 (Index=F2h, Default=00h) .......................... 52
8.6.8 Serial Port 2 Special Configuration Register 4 (Index=F3h, Default=7Fh) .......................... 52
8.7 Parallel Port Configuration Registers (LDN=03h)............................................................................. 53
8.7.1 Parallel Port Activate (Index=30h, Default=00h).................................................................. 53
8.7.2 Parallel Port Primary Base Address MSB Register (Index=60h, Default=03h)..................... 53
8.7.3 Parallel Port Primary Base Address LSB Register (Index=61h, Default=78h) .................... 53
8.7.4 Parallel Port Secondary Base Address MSB Register (Index=62h, Default=07h)................ 53
8.7.5 Parallel Port Secondary Base Address LSB Register (Index=63h, Default=78h) ............... 53
8.7.6 Parallel Port Interrupt Level Select (Index =70h, Default=07h) ........................................... 53
8.7.7 Parallel Port DMA Channel Select (Index=74h, Default=03h) ............................................. 53
8.7.8 Parallel Port Special Configuration Register (Index=F0h, Default=03h) ............................. 54
8.8 Environment Controller Configuration Registers (LDN=04h) ........................................................... 55
8.8.1 Environment Controller Activate Register (Index=30h, Default=00h) .................................. 55
8.8.2 Environment Controller Base Address MSB Register (Index=60h, Default=02h) ................. 55
8.8.3 Environment Controller Base Address LSB Register (Index=61h, Default=90h) .................. 55
8.8.4 PME Direct Access Base Address MSB Register (Index=62h, Default=02h) ....................... 55
8.8.5 PME Direct Access Base Address LSB Register (Index=63h, Default=30h) ........................ 55
8.8.6 Environment Controller Interrupt Level Select (Index=70h, Default=09h) ........................... 55
8.8.7 APC/PME Event Enable Register (PER) (Index=F0h, Default=00h) ................................... 55
8.8.8 APC/PME Status Register (PSR) (Index=F1h, Default=00h) .............................................. 56
8.8.9 APC/PME Control Register 1 (PCR 1) (Index=F2h, Default=00h)....................................... 56
8.8.10 Environment Controller Special Configuration Register (Index=F3h, Default=00h) ............ 57
8.8.11 APC/PME Control Register 2 (PCR 2) (Index=F4h, Default=00h)....................................... 57
8.8.12 APC/PME Special Code Index Register (Index=F5h).......................................................... 57
8.8.13 APC/PME Special Code Data Register (Index=F6h)........................................................... 57
8.9 KBC (keyboard) Configuration Registers (LDN=05h)....................................................................... 58
8.9.1 KBC (keyboard) Activate (Index=30h, Default=01h)............................................................ 58
8.9.2 KBC (keyboard) Data Base Address MSB Register (Index=60h, Default=00h) .................. 58
8.9.3 KBC (keyboard) Data Base Address LSB Register (Index=61h, Default=60h) ................... 58
8.9.4 KBC (keyboard) Command Base Address MSB Register (Index=62h, Default=00h)......... 58
8.9.5 KBC (keyboard) Command Base Address LSB Register (Index=63h, Default=64h).......... 58
8.9.6 KBC (keyboard) Interrupt Level Select (Index=70h, Default=01h) ...................................... 58
8.9.7 KBC (keyboard) Interrupt Type (Index=71h, Default=02h) .................................................. 58
8.9.8 KBC (keyboard) Special Configuration Register (Index=F0h, Default=08h) ............................ 59
8.10 KBC (mouse) Configuration Registers (LDN=06h)........................................................................... 60
8.10.1 KBC (mouse) Activate (Index=30h, Default=00h)................................................................ 60
8.10.2 KBC (mouse) Interrupt Level Select (Index=70h, Default=0Ch) ............................................. 60
8.10.3 KBC (mouse) Interrupt Type (Index=71h, Default=02h) ...................................................... 60
8.10.4 KBC (mouse) Special Configuration Register (Index=F0h, Default=00h) ........................... 60
8.11 GPIO Configuration Registers (LDN=07h) ....................................................................................... 61
8.11.1 SMI# Normal Run Access Base Address MSB Register (Index=60h, Default=00h)........... 61
8.11.2 SMI# Normal Run Access Base Address LSB Register (Index=61h, Default=00h)............ 61
8.11.3 Simple I/O Base Address MSB Register (Index=62h, Default=00h).................................... 61
8.11.4 Simple I/O Base Address LSB Register (Index=63h, Default=00h)..................................... 61
8.11.5 Serial Flash I/F Base Address MSB Register (Index=64h, Default=00h) ............................ 61
8.6
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IT8712F V0.9.3
