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IW4051B

Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS

厂商名称:IK Semicon

厂商官网:http://www.iksemi.com/en/index.html

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TECHNICAL DATA
IW4051B
Analog Multiplexer Demultiplexer
High-Performance Silicon-Gate CMOS
The IW4051B analog multiplexer/demultiplexer is digitally controlled
analog switches having low ON impedance and very low OFF leakage
current. Control of analog signals up to 20V peak-to-peak can be
achieved by digital signal amplitudes of 4.5 to 20V (if V
CC
- GND = 3V,
a V
CC
- V
EE
of up to 13 V can be controlled; for V
CC
-V
EE
level differences
above 13V a V
CC
- GND of at least 4.5V is required).
These multiplexer circuits dissipate extremely low quiescent power
over the full V
CC
-GND and V
CC
- V
EE
supply-voltage ranges,
independent of the logic state of the control signals. When a logic “1”is
present at the ENABLE input terminal all channels are off.
The IW4051B is a single 8-channel multiplexer having three binary
control inputs, A, B and C, and an ENABLE input. The three binary
signals select 1 of 8 channels to be turned on, and connect one of the 8
inputs to the output.
Operating Voltage Range: 3.0 to 18 V
Maximum input current of 1
μA
at 18 V over full package-temperature
range; 100 nA at 18 V and 25°C
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
N SUFFIX
PLASTIC
16
1
16
1
D SUFFIX
SOIC
ORDERING INFORMATION
IW4051BN
Plastic DIP
IW4051BD
SOIC
T
A
= -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
Single-Pole, 8-Position Plus Common Off
FUNCTION TABLE
X0
X1
X2
X3
ANALOG
INPUTS/OUTPUTS
X4
13
14
15
12
1
5
MULTIPLEXER/
DEMULTIPLEXER
3
X COMMON
OUTPUT/INPUT
Control Inputs
Enable
C
L
L
L
L
L
L
PIN 16 =V
CC
PIN 7 = V
EE
PIN 8 = GND
L
L
L
L
L
L
H
H
H
H
Select
B
L
L
H
H
L
L
H
H
X
A
L
H
L
H
L
H
L
H
X
ON
Channels
X0
X1
X2
X3
X4
X5
X6
X7
None
X5
X6 2
X7
4
A
CHANNEL-SELECT
B
INPUTS
C
ENABLE
11
10
9
6
H
X
H = high level
L = low level
X = don’t care
Rev. 00
IW4051B
MAXIMUM RATINGS
*
Symbol
V
CC
V
IN
I
IN
P
D
P
tot
Tstg
T
L
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Input Current, per Pin
Power Dissipation in Still Air
Power Dissipation per Output Transistor
Storage Temperature
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SO Package)
Value
-0.5 to +20
-0.5 to V
CC
+0.5
±10
500*
1
100
-65 to +150
260
Unit
V
V
mA
mW
mW
°C
°C
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
*
1
- for Plastic DIP from -55° to +100°C, for SO Package from -55° to +65°C.
+Derating - Plastic DIP: - 12 mW/°C from 100° to 125°C
SO Package: - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
T
A
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
Operating Temperature, All Package Types
Min
3.0
0
-55
Max
18
V
CC
+125
Unit
V
V
°C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range GND≤(V
IN
or
V
OUT
)≤V
CC
.
Unused digital pins must be tied to an appropriate logic voltage level (e.g., either GND or V
CC
). Unused
Analog I/O pins may be left open or terminated.
Rev. 00
IW4051B
DC ELECTRICAL CHARACTERISTICS
Digital Section
V
CC
Symbol
V
IH
Parameter
Minimum High-Level
Input Voltage,
Channel-Select or
Enable Inputs
Maximum Low -Level
Input Voltage,
Channel-Select or
Enable Inputs
Maximum Input
Leakage Current,
Channel-Select or
Enable Inputs
Maximum Quiescent
Supply Current (per
Package)
Test Conditions
V
IS
=V
CC
thru 1kΩ
V
EE
=GND=0
I
IS
<2μA on all OFF Chanels
R
L
=1kΩ to GND
V
IS
=V
CC
thru 1kΩ
V
EE
=GND=0
I
IS
<2μA on all OFF Chanels
R
L
=1kΩ to GND
V
IN
=V
CC
or GND
V
EE
=GND=0
V
5
10
15
5
10
15
18
Guaranteed Limit
-55
°C
3.5
7
11
1.5
3
4
±0.1
25
°C
3.5
7
11
1.5
3
4
±0.1
125
°C
3.5
7
11
1.5
3
4
±1.0
Unit
V
V
IL
V
I
IN
μA
I
CC
Channel Select = V
CC
or GND
V
EE
=GND=0
5
10
15
20
5
10
20
100
5
10
20
100
150
300
600
3000
μA
DC ELECTRICAL CHARACTERISTICS
Analog Section
V
CC
Symbol
R
ON
Parameter
Maximum “ON” Resistance
Test Conditions
V
EE
=GND=0
V
IS
= GND to V
CC
V
EE
=GND=0
V
5
10
15
5
10
15
18
Guaranteed Limit
-55
°C
800
310
200
-
-
-
±100
25
°C
1050
400
240
10*
15*
5*
±100
125
°C
1150
550
320
-
-
-
±1000
Unit
Ω
ΔR
ON
Maximum Difference in
“ON” Resistance Between
Any Two Channels in the
Same Package
Maximum Off- Channel
Leakage Current, Any One
Channel
Maximum Off- Channel
Leakage Current, Common
Channel
Ω
I
OFF
V
EE
=GND=0
nA
V
EE
=GND=0
18
±100
±100
±1000
* - Typical Value
Rev. 00
IW4051B
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF,Input t
r
=t
f
=20.0 ns)
V
CC
Symbol
t
PHL(
t
PLH)
Parameter
Maximum Propagation Delay , Analog Input to
Analog Output (Figure 1)
R
L
=200kΩ, V
EE
=GND=0
Maximum Propagation Delay , Channel-Select
Input to Analog Output (Figure 1)
R
L
=200 kΩ, V
EE
=GND=0
Maximum Propagation Delay , Channel-Select
Input to Analog Output
(Figure 2) R
L
=10 kΩ
V
EE
=GND=0
V
EE
=-5В, GND=0
t
PZL2(
t
PZH2)
Maximum Propagation Delay , Enable to
Analog Output
(Figure 2) R
L
=10 kΩ
V
EE
=GND=0
V
EE
=-10В, GND=0
t
PLZ1(
t
PHZ1)
Maximum Propagation Delay , Channel-Select
Input to Analog Output
(Figure 2) R
L
=10 kΩ
V
EE
=GND=0
V
EE
=-5В, GND=0
t
PLZ2(
t
PHZ2)
Maximum Propagation Delay , Enable to
Analog Output
(Figure 2) R
L
=1,0 kΩ
V
EE
=GND=0
V
EE
=-10В, GND=0
C
IN
C
I/O
Maximum Input Capacitance, Channel-Select or
Enable Inputs
Maximum Capacitance
V
EE
=GND=-5V
C
IS
C
OS
Feedthrough C
IOS
V
5
10
15
5
10
15
5
10
15
5
5
10
15
5
5
10
15
5
5
10
15
5
-
Guaranteed Limit
-55
°C
60
30
20
350
200
160
720
320
240
450
720
320
240
400
720
320
240
450
450
210
160
300
-
25
°C
60
30
20
350
200
160
720
320
240
450
720
320
240
400
720
320
240
450
450
210
160
300
7.5
125
°C
70
40
30
400
250
200
720
320
240
450
720
320
240
400
720
320
240
450
450
210
160
600
-
pF
ns
ns
ns
Unit
ns
t
PHL1(
t
PLH1)
ns
t
PZL1(
t
PZH1)
ns
5
5
5
-
-
-
5*
30*
0.2*
-
-
-
pF
Rev. 00
IW4051B
ADDITIONAL APPLICATION CHARACTERISTICS
V
CC
Symbol
B
W
B
V
IS**
V
Limits
Typical Value Unit
25
°C
Parameter
Maximum On-
Channel
Bandwidth or
Minimum
Frequency
Response (-3db)
(-40db)
Feedthrough
Frequency (All
Channels OFF)
Test Conditions
V
V
EE
=GND=0
R
L
=1kΩ
20 log(V
OS
/V
IS
)=-3db
V
OS
at Common OUT/IN
10
2,5
20
MHz
V
OS
at Any Channel
f
1
V
EE
=GND=0
R
L
=1kΩ
20 log(V
OS
/V
IS
)=-40db
V
OS
at Common OUT/IN
V
OS
at Any Channel
f
2
(-40db)
Signal Crosstalk
Frequency
Total Harmonic
Distortion
Address-or
Enable to Signal
Crosstalk
V
EE
=GND=0
R
L
=1kΩ
20 log(V
OS
/V
IS
)=-40db
Between Any 2 Channels
V
EE
=GND=0
f
IS
=1kHz sine wave
V
EE
=GND=0, R
L
=10kΩ***
t
r
,t
f
=20ns
Square Wave
10
2,5
60
10
10
2,5
2,5
12
8
MHz
10
5
10
15
10
2,5
1
1,5
2,5
-
3
0.3
0.2
0.12
65
MHz
%
THD
V
AO/I
mV
(Peak)
** Peak-to-peak voltage symmetrical about (V
CC
-V
EE
)/2.
*** Both ends of channel.
Rev. 00
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参数对比
与IW4051B相近的元器件有:IW4051BN、IW4051BD。描述及对比如下:
型号 IW4051B IW4051BN IW4051BD
描述 Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS
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器件捷径:
E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ
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