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K4S513233C-ML1L

Synchronous DRAM, 16MX32, 7ns, CMOS, PBGA90, FBGA-90

器件类别：存储    存储   

厂商名称：SAMSUNG(三星)

厂商官网：http://www.samsung.com/Products/Semiconductor/

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参数 预览 参数对比
器件参数
参数名称
属性值
是否Rohs认证
不符合
厂商名称
SAMSUNG(三星)
零件包装代码
BGA
包装说明
LFBGA, BGA90,9X15,32
针数
90
Reach Compliance Code
compliant
ECCN代码
EAR99
访问模式
FOUR BANK PAGE BURST
最长访问时间
7 ns
其他特性
AUTO/SELF REFRESH
最大时钟频率 (fCLK)
100 MHz
I/O 类型
COMMON
交错的突发长度
1,2,4,8
JESD-30 代码
R-PBGA-B90
JESD-609代码
e0
长度
15.5 mm
内存密度
536870912 bit
内存集成电路类型
SYNCHRONOUS DRAM
内存宽度
32
功能数量
1
端口数量
1
端子数量
90
字数
16777216 words
字数代码
16000000
工作模式
SYNCHRONOUS
最高工作温度
70 °C
最低工作温度
-25 °C
组织
16MX32
输出特性
3-STATE
封装主体材料
PLASTIC/EPOXY
封装代码
LFBGA
封装等效代码
BGA90,9X15,32
封装形状
RECTANGULAR
封装形式
GRID ARRAY, LOW PROFILE, FINE PITCH
峰值回流温度（摄氏度）
NOT SPECIFIED
电源
3/3.3 V
认证状态
Not Qualified
刷新周期
8192
座面最大高度
1.4 mm
自我刷新
YES
连续突发长度
1,2,4,8,FP
最大待机电流
0.0015 A
最大压摆率
0.3 mA
最大供电电压 (Vsup)
3.6 V
最小供电电压 (Vsup)
2.7 V
标称供电电压 (Vsup)
3 V
表面贴装
YES
技术
CMOS
温度等级
OTHER
端子面层
Tin/Lead (Sn/Pb)
端子形式
BALL
端子节距
0.8 mm
端子位置
BOTTOM
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
9.5 mm
文档预览
K4S513233C-ML/N/P
CMOS SDRAM
16Mx32
SDRAM 90FBGA
( VDD/VDDQ 3.0V/3.0V or 3.3V/3.3V )
Revision 1.2
December 2002
Rev. 1.2 Dec. 2002
K4S513233C-ML/N/P
4M x 32Bit x 4 Banks SDRAM
FEATURES
• 3.0V power supply
• LVCMOS compatible with multiplexed address
• Four banks operation
• MRS cycle with address key programs
-. CAS latency (1, 2 & 3)
-. Burst length (1, 2, 4, 8 & Full page)
-. Burst type (Sequential & Interleave)
• All inputs are sampled at the positive going edge of the system
clock.
• Burst read single-bit write operation
• DQM for masking
• Auto & self refresh
• 64ms refresh period (8K cycle)
• Commercial Temperature Operation (-25°C ~ 70
°C).
Extended Temperature Operation (-25°C ~ 85°C).
Industrial Temperature Operation (-40°C ~ 85°C).
• 90balls DDP FBGA
CMOS SDRAM
GENERAL DESCRIPTION
The K4S513233C is 536,870,912 bits synchronous high data
rate Dynamic RAM organized as 4 x 4,196,304 words by 32bits,
fabricated with SAMSUNG's high performance CMOS technology.
Synchronous design allows precise cycle control with the use of
system clock I/O transactions are possible on every clock cycle.
Range of operating frequencies, programmable burst length and
programmable latencies allow the same device to be useful for a
variety of high bandwidth and high performance memory system
applications.
ORDERING INFORMATION
Part No.
K4S513233C-ML/N/P80
K4S513233C-ML/N/P1H
K4S513233C-ML/N/P1L
Max Freq.
125MHz(CL=3)
100MHz(CL=2)
100MHz(CL=2)
100MHz(CL=3)
*1
LVCMOS
90FBGA
Interface Package
FUNCTIONAL BLOCK DIAGRAM
- MN : Low Power, Operating Temp : -25°C ~ 85
°C.
- ML : Low Power, Operating Temp : -25°C ~ 70
°C.
- MP : Low Power, Operating Temp : -40°C ~ 85
°C.
Note :
1. In case of 33MHz Frequency, CL1 can be supported.
I/O Control
LWE
Data Input Register
LDQM
Bank Select
4M x 32
4M x 32
4M x 32
4M x 32
Refresh Counter
Output Buffer
Row Decoder
Sense AMP
Row Buffer
DQi
Address Register
CLK
ADD
Column Decoder
Col. Buffer
LRAS
LCBR
Latency & Burst Length
LCKE
LRAS
LCBR
LWE
LCAS
Programming Register
LWCBR
LDQM
Timing Register
CLK
CKE
CS
RAS
CAS
WE
DQM
* Samsung Electronics reserves the right to change products or specification without notice.
Rev. 1.2 Dec. 2002
K4S513233C-ML/N/P
Package Dimension and Pin Configuration
< Bottom View
*1
>
E
1
9
A
B
C
D
D
E
F
G
D
1
H
J
K
D/2
L
M
N
P
R
E
E/2
e
8
7
6
5
4
3
2
1
CMOS SDRAM
< Top View
*2
>
90Ball(6x15) CSP
1
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
DQ26
DQ28
V
SSQ
V
SSQ
V
DDQ
V
SS
A4
A7
CLK
DQM1
V
DDQ
V
SSQ
V
SSQ
DQ11
DQ13
2
DQ24
V
DDQ
DQ27
DQ29
DQ31
DQM3
A5
A8
CKE
NC
DQ8
DQ10
DQ12
V
DDQ
DQ15
3
V
SS
V
SSQ
DQ25
DQ30
NC
A3
A6
A12
A9
NC
V
SS
DQ9
DQ14
V
SSQ
V
SS
7
V
D D
V
DDQ
DQ22
DQ17
NC
A2
A10
NC
BA0
CAS
V
D D
DQ6
DQ1
V
DDQ
V
D D
8
DQ23
V
SSQ
DQ20
DQ18
DQ16
DQM2
A0
BA1
CS
WE
DQ7
DQ5
DQ3
V
SSQ
DQ0
9
DQ21
DQ19
V
DDQ
V
DDQ
V
SSQ
V
D D
A1
A11
RAS
DQM0
V
SSQ
V
DDQ
V
DDQ
DQ4
DQ2
Pin Name
Pin Function
System Clock
Chip Select
Clock Enable
Address
Bank Select Address
Row Address Strobe
Column Address Strobe
Write Enable
Data Input/Output Mask
Data Input/Output
Power Supply/Ground
Data Output Power/Ground
[Unit:mm]
*2: Top View
CLK
CS
CKE
A
A1
A
0
~ A
12
BA
0
~ BA
1
RAS
CAS
WE
DQM
0
~ DQM
3
DQ
0
~
31
V
DD
/V
SS
V
DDQ
/V
SSQ
Max. 0.20
Encapsulant
b
z
*1: Bottom View
< Top View
*2
>
#A1 Ball Origin Indicator
K4S513233C-MXXX
SAMSUNG
Week
Symbol
A
A
1
E
E
1
D
D
1
e
b
z
Min
1.20
0.27
-
-
-
-
-
0.40
-
Typ
1.30
0.32
9.50
6.40
15.50
11.20
0.80
0.45
-
Max
1.40
0.37
-
-
-
-
-
0.50
0.10
Rev. 1.2 Dec. 2002
K4S513233C-ML/N/P
ABSOLUTE MAXIMUM RATINGS
Parameter
Voltage on any pin relative to Vss
Voltage on V
D D
supply relative to Vss
Storage temperature
Power dissipation
Short circuit current
Symbol
V
I N
, V
OUT
V
DD
, V
DDQ
T
STG
P
D
I
OS
Value
-1.0 ~ 4.6
-1.0 ~ 4.6
-55 ~ +150
1
50
CMOS SDRAM
Unit
V
V
°C
W
mA
Notes :
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
DC OPERATING CONDITIONS
Recommended operating conditions (Voltage referenced to V
SS
= 0V, T
A
=Commercial, Extended and Industrial)
Parameter
Supply voltage
Input logic high voltage
Input logic low voltage
Output logic high voltage
Output logic low voltage
Input leakage current
Symbol
V
D D
V
DDQ
V
I H
V
IL
V
O H
V
OL
I
LI
Min
2.7
2.7
2.2
-0.3
2.4
-
-10
Typ
3.0
3.0
3.0
0
-
-
-
Max
3.6
3.6
V
DDQ
+0.3
0.5
-
0.4
10
Unit
V
V
V
V
V
V
uA
1
2
I
O H
= -2mA
I
OL
= 2mA
3
Note
Notes :
1. V
IH
(max) = 5.3V AC. The overshoot voltage duration is
≤
3ns.
2. V
IL
(min) = -2.0V AC. The undershoot voltage duration is
≤
3ns.
3. Any input 0V
≤
V
IN
≤
V
DDQ
.
Input leakage currents include HI-Z output leakage for all bi-directional buffers with Tri-State outputs.
4. Dout is disabled, 0V
≤
V
OUT
≤
V
DDQ.
CAPACITANCE
Clock
(V
DD
= 3.0V or 3.3V, T
A
= 23°C, f = 1MHz, V
REF
=0.9V
±
50 mV)
Pin
Symbol
C
CLK
C
IN
C
IN
C
ADD
C
OUT
Min
3.0
3.0
1.5
3.0
3.0
Max
9.0
9.0
4.5
9.0
6.5
Unit
pF
pF
pF
pF
pF
Note
RAS, CAS, WE, CKE, CS
DQM
Address
D Q
0
~ DQ
31
Rev. 1.2 Dec. 2002
K4S513233C-ML/N/P
DC CHARACTERISTICS
CMOS SDRAM
Recommended operating conditions (Voltage referenced to V
SS
= 0V, T
A
=Commercial, Extended and Industrial)
Parameter
Symbol
Burst length = 1
t
RC
≥
t
R C
(min)
I
O
= 0 mA
CKE
≤
V
IL
(max), t
CC
= 10ns
Test Condition
-80
Operating Current
(One Bank Active)
Precharge Standby Current
in power-down mode
I
CC1
160
Version
-1H
160
-1L
150
mA
1
Unit Note
I
CC2
P
1.5
1.5
20
I
C C 2
PS CKE & CLK
≤
V
IL
(max), t
CC
=
∞
I
CC2
N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
CKE
≤
V
IL
(max), t
CC
= 10ns
mA
Precharge Standby Current
in non power-down mode
I
CC2
NS
Active Standby Current
in power-down mode
I
CC3
P
mA
10
8
8
45
mA
I
C C 3
PS CKE & CLK
≤
V
IL
(max), t
CC
=
∞
I
CC3
N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
I
O
= 0 mA
Page burst
4Banks Activated
t
CCD
= 2CLKs
t
RC
≥
t
R C
(min)
-ML
mA
Active Standby Current
in non power-down mode
(One Bank Active)
I
CC3
NS
40
mA
Operating Current
(Burst Mode)
Refresh Current
I
CC4
230
210
210
mA
1
I
CC5
350
330
300
mA
2
3
Self Refresh Current
I
CC6
CKE
≤
0.2V
-MN
-MP
1800
uA
4
5
Notes :
1. Measured with outputs open
2. Refresh period is 64ms.
3. K4S513233C-ML**
4. K4S513233C-MN**
5. K4S513233C-MP**
6. Unless otherwise noted, input swing IeveI is CMOS(V
IH
/V
IL
=V
DDQ
/V
SSQ)
Rev. 1.2 Dec. 2002
查看更多>
参数对比
与K4S513233C-ML1L相近的元器件有：K4S513233C-MP1H、K4S513233C-MP80、K4S513233C-ML80、K4S513233C-ML1H、K4S513233C-MN1L、K4S513233C-MN1H、K4S513233C-MP1L、K4S513233C-MN80。描述及对比如下：
型号 K4S513233C-ML1L K4S513233C-MP1H K4S513233C-MP80 K4S513233C-ML80 K4S513233C-ML1H K4S513233C-MN1L K4S513233C-MN1H K4S513233C-MP1L K4S513233C-MN80
描述 Synchronous DRAM, 16MX32, 7ns, CMOS, PBGA90, FBGA-90 Synchronous DRAM, 16MX32, 7ns, CMOS, PBGA90, FBGA-90 Synchronous DRAM, 16MX32, 6ns, CMOS, PBGA90, FBGA-90 Synchronous DRAM, 16MX32, 6ns, CMOS, PBGA90, FBGA-90 Synchronous DRAM, 16MX32, 7ns, CMOS, PBGA90, FBGA-90 Synchronous DRAM, 16MX32, 7ns, CMOS, PBGA90, FBGA-90 Synchronous DRAM, 16MX32, 7ns, CMOS, PBGA90, FBGA-90 Synchronous DRAM, 16MX32, 7ns, CMOS, PBGA90, FBGA-90 Synchronous DRAM, 16MX32, 6ns, CMOS, PBGA90, FBGA-90
是否Rohs认证 不符合 不符合 不符合 不符合 不符合 不符合 不符合 不符合 不符合
零件包装代码 BGA BGA BGA BGA BGA BGA BGA BGA BGA
包装说明 LFBGA, BGA90,9X15,32 LFBGA, BGA90,9X15,32 LFBGA, BGA90,9X15,32 LFBGA, BGA90,9X15,32 LFBGA, BGA90,9X15,32 LFBGA, BGA90,9X15,32 LFBGA, BGA90,9X15,32 LFBGA, BGA90,9X15,32 LFBGA, BGA90,9X15,32
针数 90 90 90 90 90 90 90 90 90
Reach Compliance Code compliant compliant compliant compliant compliant compliant compliant compliant compliant
ECCN代码 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
访问模式 FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST
最长访问时间 7 ns 7 ns 6 ns 6 ns 7 ns 7 ns 7 ns 7 ns 6 ns
其他特性 AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH
最大时钟频率 (fCLK) 100 MHz 100 MHz 125 MHz 125 MHz 100 MHz 100 MHz 100 MHz 100 MHz 125 MHz
I/O 类型 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
交错的突发长度 1,2,4,8 1,2,4,8 1,2,4,8 1,2,4,8 1,2,4,8 1,2,4,8 1,2,4,8 1,2,4,8 1,2,4,8
JESD-30 代码 R-PBGA-B90 R-PBGA-B90 R-PBGA-B90 R-PBGA-B90 R-PBGA-B90 R-PBGA-B90 R-PBGA-B90 R-PBGA-B90 R-PBGA-B90
JESD-609代码 e0 e0 e0 e0 e0 e0 e0 e0 e0
长度 15.5 mm 15.5 mm 15.5 mm 15.5 mm 15.5 mm 15.5 mm 15.5 mm 15.5 mm 15.5 mm
内存密度 536870912 bit 536870912 bit 536870912 bit 536870912 bit 536870912 bit 536870912 bit 536870912 bit 536870912 bit 536870912 bit
内存集成电路类型 SYNCHRONOUS DRAM SYNCHRONOUS DRAM SYNCHRONOUS DRAM SYNCHRONOUS DRAM SYNCHRONOUS DRAM SYNCHRONOUS DRAM SYNCHRONOUS DRAM SYNCHRONOUS DRAM SYNCHRONOUS DRAM
内存宽度 32 32 32 32 32 32 32 32 32
功能数量 1 1 1 1 1 1 1 1 1
端口数量 1 1 1 1 1 1 1 1 1
端子数量 90 90 90 90 90 90 90 90 90
字数 16777216 words 16777216 words 16777216 words 16777216 words 16777216 words 16777216 words 16777216 words 16777216 words 16777216 words
字数代码 16000000 16000000 16000000 16000000 16000000 16000000 16000000 16000000 16000000
工作模式 SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
最高工作温度 70 °C 85 °C 85 °C 70 °C 70 °C 85 °C 85 °C 85 °C 85 °C
最低工作温度 -25 °C -40 °C -40 °C -25 °C -25 °C -25 °C -25 °C -40 °C -25 °C
组织 16MX32 16MX32 16MX32 16MX32 16MX32 16MX32 16MX32 16MX32 16MX32
输出特性 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 LFBGA LFBGA LFBGA LFBGA LFBGA LFBGA LFBGA LFBGA LFBGA
封装等效代码 BGA90,9X15,32 BGA90,9X15,32 BGA90,9X15,32 BGA90,9X15,32 BGA90,9X15,32 BGA90,9X15,32 BGA90,9X15,32 BGA90,9X15,32 BGA90,9X15,32
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 GRID ARRAY, LOW PROFILE, FINE PITCH GRID ARRAY, LOW PROFILE, FINE PITCH GRID ARRAY, LOW PROFILE, FINE PITCH GRID ARRAY, LOW PROFILE, FINE PITCH GRID ARRAY, LOW PROFILE, FINE PITCH GRID ARRAY, LOW PROFILE, FINE PITCH GRID ARRAY, LOW PROFILE, FINE PITCH GRID ARRAY, LOW PROFILE, FINE PITCH GRID ARRAY, LOW PROFILE, FINE PITCH
峰值回流温度（摄氏度） NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
电源 3/3.3 V 3/3.3 V 3/3.3 V 3/3.3 V 3/3.3 V 3/3.3 V 3/3.3 V 3/3.3 V 3/3.3 V
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
刷新周期 8192 8192 8192 8192 8192 8192 8192 8192 8192
座面最大高度 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm
自我刷新 YES YES YES YES YES YES YES YES YES
连续突发长度 1,2,4,8,FP 1,2,4,8,FP 1,2,4,8,FP 1,2,4,8,FP 1,2,4,8,FP 1,2,4,8,FP 1,2,4,8,FP 1,2,4,8,FP 1,2,4,8,FP
最大待机电流 0.0015 A 0.0015 A 0.0015 A 0.0015 A 0.0015 A 0.0015 A 0.0015 A 0.0015 A 0.0015 A
最大压摆率 0.3 mA 0.33 mA 0.35 mA 0.35 mA 0.33 mA 0.3 mA 0.33 mA 0.3 mA 0.35 mA
最大供电电压 (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V
最小供电电压 (Vsup) 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V
标称供电电压 (Vsup) 3 V 3 V 3 V 3 V 3 V 3 V 3 V 3 V 3 V
表面贴装 YES YES YES YES YES YES YES YES YES
技术 CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 OTHER INDUSTRIAL INDUSTRIAL OTHER OTHER OTHER OTHER INDUSTRIAL OTHER
端子面层 Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
端子形式 BALL BALL BALL BALL BALL BALL BALL BALL BALL
端子节距 0.8 mm 0.8 mm 0.8 mm 0.8 mm 0.8 mm 0.8 mm 0.8 mm 0.8 mm 0.8 mm
端子位置 BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM
处于峰值回流温度下的最长时间 NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
宽度 9.5 mm 9.5 mm 9.5 mm 9.5 mm 9.5 mm 9.5 mm 9.5 mm 9.5 mm 9.5 mm
厂商名称 SAMSUNG(三星) - - SAMSUNG(三星) SAMSUNG(三星) SAMSUNG(三星) SAMSUNG(三星) SAMSUNG(三星) SAMSUNG(三星)
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