D ts e t
aa h e
R c e t r lc r nc
o h se Ee to is
Ma u a t r dCo o e t
n fc u e
mp n n s
R c e tr b a d d c mp n ns ae
o h se rn e
o oet r
ma ua trd u ig ete dewaes
n fcue sn i r i/ fr
h
p rh s d f m te oiia s p l r
uc a e r
o h r n l u pi s
g
e
o R c e tr waes rce td f m
r o h se
fr e rae r
o
te oiia I. Al rce t n ae
h
r nl P
g
l e rai s r
o
d n wi tea p o a o teOC
o e t h p rv l f h
h
M.
P r aetse u igoiia fcoy
at r e td sn r n la tr
s
g
ts p o rmso R c e tr e eo e
e t rga
r o h se d v lp d
ts s lt n t g aa te p o u t
e t oui s o u rne
o
rd c
me t o e c e teOC d t s e t
es r x e d h
M aa h e.
Qu l yOv riw
ai
t
e ve
• IO- 0 1
S 90
•A 92 cr ct n
S 1 0 et ai
i
o
• Qu l e Ma ua trr Ls (
ai d
n fcues it QML MI- R -
) LP F
385
53
•C a sQ Mitr
ls
lay
i
•C a sVS a eL v l
ls
p c ee
• Qu l e S p l r Ls o D sr uos( L )
ai d u pi s it f it b tr QS D
e
i
•R c e trsacic l u pir oD A a d
o h se i
r ia s p l t L n
t
e
me t aln u t a dD A sa d r s
es lid sr n L tn ad .
y
R c e tr lcrnc , L i c mmi e t
o h se Ee t is L C s o
o
tdo
t
s p ligp o u t ta s t f c so r x e t-
u pyn rd cs h t ai y u tme e p ca
s
t n fr u lya daee u loto eoiial
i s o q ai n r q a t h s r n l
o
t
g
y
s p l db id sr ma ua trr.
u pi
e yn ut
y n fcues
T eoiia ma ua trr d ts e t c o a yn ti d c me t e e t tep r r n e
h r n l n fcue’ aa h e a c mp n ig hs o u n r cs h ef ma c
g
s
o
a ds e ic t n o teR c e tr n fcue v rino ti d vc . o h se Ee t n
n p c ai s f h o h se ma ua trd eso f hs e ie R c e tr lcr -
o
o
isg aa te tep r r n eo i s mio d co p o u t t teoiia OE s e ic -
c u rne s h ef ma c ft e c n u tr rd cs o h r n l M p c a
o
s
g
t n .T pc lv le aefr eee c p r o e o l. eti mii m o ma i m rt g
i s ‘y ia’ au s r o rfrn e up s s ny C r n nmu
o
a
r xmu ai s
n
ma b b s do p o u t h rceiain d sg , i lt n o s mpetsig
y e a e n rd c c aa tr t , e in smuai , r a l e t .
z o
o
n
© 2 1 R cetr l t n s LC Al i t R sre 0 1 2 1
0 3 ohs E cr i , L . lRg s eevd 7 1 0 3
e e oc
h
T l r m r, l s v iw wrcl . m
o e n oe p ae it w . e c o
a
e
s
o ec
www.fairchildsemi.com
KA555
Single Timer
Features
•
•
•
•
•
High Current Drive Capability (200mA)
Adjustable Duty Cycle
Temperature Stability of 0.005%/°C
Timing From
µsec
to Hours
Turn Off Time Less Than 2µsec
Description
The KA555 is a highly stable controller capable of
producing accurate timing pulses. With a monostable
operation, the time delay is controlled by one external
resistor and one capacitor. With an astable operation, the
frequency and duty cycle are accurately controlled by two
external resistors and one capacitor.
8-DIP
Applications
•
•
•
•
Precision Timing
Pulse Generation
Time Delay Generation
Sequential Timing
1
8-SOP
1
Internal Block Diagram
R
R
R
8
GND
1
Vcc
Comp.
Trigger
Discharging Tr.
7
2
Discharge
Output
3
OutPut
Stage
F/F
6
Comp.
Threshold
Control
Voltage
Reset
4
5
Vref
Rev. 1.0.3
©2002 Fairchild Semiconductor Corporation
KA555
25°
Absolute Maximum Ratings (T
A
= 25
°
C)
Parameter
Supply Voltage
Lead Temperature (Soldering 10sec)
Power Dissipation
Operating Temperature Range
KA555/KA555I
Storage Temperature Range
Symbol
V
CC
T
LEAD
P
D
T
OPR
T
STG
Value
16
300
600
0 ~ +70 / -40 ~ +85
-65 ~ +150
Unit
V
°C
mW
°C
°C
2
KA555
Electrical Characteristics
(T
A
= 25°C, V
CC
= 5 ~ 15V, unless otherwise specified)
Parameter
Supply Voltage
Supply Current (Low Stable)
(Note1)
Timing Error (MonoStable)
Initial Accuracy (Note2)
Drift with Temperature (Note4)
Drift with Supply Voltage (Note4)
Timing Error (Astable)
Initial Accuracy (Note2)
Drift with Temperature (Note4)
Drift with Supply Voltage (Note4)
Control Voltage
Threshold Voltage
Threshold Current (Note3)
Trigger Voltage
Trigger Current
Reset Voltage
Reset Current
Symbol
V
CC
I
CC
Conditions
-
V
CC
= 5V, R
L
=
∞
V
CC
= 15V, R
L
=
∞
Min.
4.5
-
-
Typ.
-
3
7.5
Max.
16
6
15
Unit
V
mA
mA
ACCUR
∆t/∆T
∆t/∆V
CC
R
A
= 1kΩ to100kΩ
C = 0.1µF
-
1.0
50
0.1
3.0
0.5
%
ppm/°C
%/V
ACCUR
∆t/∆T
∆t/∆V
CC
V
CC
V
TH
I
TH
V
TR
I
TR
V
RST
I
RST
R
A
= 1kΩ to 100kΩ
C = 0.1µF
V
CC
= 15V
V
CC
= 5V
V
CC
= 15 V
V
CC
= 5V
-
V
CC
= 5V
V
CC
= 15V
V
TR
= 0V
-
-
V
CC
= 15V
I
SINK
= 10mA
I
SINK
= 50mA
V
CC
= 5V
I
SINK
= 5mA
V
CC
= 15V
I
SOURCE
= 200mA
I
SOURCE
= 100mA
V
CC
= 5V
I
SOURCE
= 100mA
-
2.25
150
0.3
10.0
3.33
10.0
3.33
0.1
1.67
5
0.01
0.7
0.1
-
%
ppm/°C
%/V
V
V
V
V
µA
V
V
µA
V
mA
V
V
V
V
V
V
ns
ns
nA
9.0
2.6
-
-
-
1.1
4.5
0.4
11.0
4.0
-
-
0.25
2.2
5.6
2.0
1.0
0.4
0.25
0.75
0.35
-
-
-
-
100
-
-
Low Output Voltage
V
OL
0.06
0.3
0.05
12.5
13.3
3.3
100
100
20
High Output Voltage
V
OH
12.75
2.75
-
-
-
Rise Time of Output (Note4)
Fall Time of Output (Note4)
Discharge Leakage Current
t
R
t
F
I
LKG
-
-
-
Notes:
1. When the output is high, the supply current is typically 1mA less than at V
CC
= 5V.
2. Tested at V
CC
= 5.0V and V
CC
= 15V.
3. This will determine the maximum value of R
A
+ R
B
for 15V operation, the max. total R = 20MΩ, and for 5V operation, the max.
total R = 6.7MΩ.
4. These parameters, although guaranteed, are not 100% tested in production.
3
KA555
Application Information
Table1 below is the basic operating table of 555 timer:
Table 1. Basic Operating Table
Threshold Voltage
Trigger Voltage
Discharging Tr.
Reset(Pin4)
Output(Pin3)
(V
th
)(Pin6)
(V
tr
)(Pin2)
(Pin7)
Don't care
Don't care
Low
Low
ON
V
th
> 2Vcc / 3
High
Low
ON
V
th
> 2Vcc / 3
High
-
-
Vcc / 3 < V
th
< 2 Vcc / 3 Vcc / 3 < V
th
< 2 Vcc / 3
V
th
< Vcc / 3
High
High
OFF
V
th
< Vcc / 3
When the low signal input is applied to the reset terminal, the timer output remains low regardless of the threshold voltage or
the trigger voltage. Only when the high signal is applied to the reset terminal, the timer's output changes according to
threshold voltage and trigger voltage.
When the threshold voltage exceeds 2/3 of the supply voltage while the timer output is high, the timer's internal discharge Tr.
turns on, lowering the threshold voltage to below 1/3 of the supply voltage. During this time, the timer output is maintained
low. Later, if a low signal is applied to the trigger voltage so that it becomes 1/3 of the supply voltage, the timer's internal
discharge Tr. turns off, increasing the threshold voltage and driving the timer output again at high.
1. MonoStable Operation
+Vcc
10
2
4
RESET
Trigger
8
Vcc
DISCH
R
A
=1
k
Ω
10
1
2
TRIG
THRES
6
Capacitance(uF)
10
0
10
-1
3
OUT
GND
R
L
CONT
5
C2
C1
10
-2
1
10
-3
10
-5
10
-4
R
10
-3
10
-2
10
-1
1M
10
0
10
M
10
1
A
7
10
0k
Ω
10
k
Ω
Ω
Ω
10
2
Time Delay(s)
Figure 1. Monoatable Circuit
Figure 2. Resistance and Capacitance vs.
Time delay(t
d
)
Figure 3. Waveforms of Monostable Operation
4
