L6984
36 V, 400 mA synchronous step-down switching regulator
Datasheet
-
production data
Application
Battery powered applications (LCM)
VFDFPN10 4 x 4 x 1.0 mm
Sensors (LNM)
E- metering
Description
VDFPN10 3 x 3 x 1.0 mm
Features
400 mA DC output current
4.5 V to 36 V operating input voltage
Synchronous rectification
Low consumption mode or low noise mode
75 µA I
Q
at light load (LCM V
OUT
= 3.3 V)
13 µA I
Q-SHTDWN
Adjustable f
SW
(250 kHz - 600 kHz)
Output voltage adjustable from 0.9 V
No resistor divider required for 3.3 V V
OUT
V
BIAS
maximizes efficiency at light load
350 mA valley current limit
Constant on-time control scheme
PGOOD open collector
Thermal shutdown
The L6984 is a step-down monolithic switching
regulator able to deliver up to 400 mA DC. The
output voltage adjustability ranges from 0.9 V. The
fixed 3.3 V V
OUT
requires no external resistor
divider. The “Low Consumption Mode” (LCM) is
designed for applications active during car
parking, so it maximizes the efficiency at light load
with controlled output voltage ripple. The “Low
Noise Mode” (LNM) makes the switching
frequency almost constant over the load current
range, serving low noise application specification
like car audio/sensors. The PGOOD open
collector output can implement output voltage
sequencing during the power-up phase. The
synchronous rectification, designed for high
efficiency at medium - heavy load, and the high
switching frequency capability make the size of
the application compact. Pulse-by-pulse current
sensing on low-side power element implements
an effective constant current protection.
Figure 1. Application schematic
May 2018
This is information on a product in full production.
DocID025378 Rev 6
1/47
www.st.com
Contents
L6984
Contents
1
Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.1
1.2
1.3
1.4
1.5
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
ESD protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2
3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1
Output voltage adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.1.1
3.1.2
Maximum output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Leading network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.2
3.3
3.4
3.5
Control loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Optional virtual ESR network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Output voltage accuracy and optimized resistor divider. . . . . . . . . . . . . . . . . . . . . 22
Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Light load operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.5.1
3.5.2
Low noise mode (LNM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Low consumption mode (LCM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.6
Switchover feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
3.6.1
3.6.2
LCM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
LNM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.7
3.8
3.9
3.10
Overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
PGOOD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Overvoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
4
Design of the power components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
4.1
4.2
4.3
Input capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Output capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
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L6984
4.3.1
4.3.2
Contents
Output voltage ripple . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
COUT specification and loop stability . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5
6
7
Application board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Efficiency curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
7.1
7.2
VFDFPN10 4 x 4 x 1.0 mm package information . . . . . . . . . . . . . . . . . . . 43
VDFPN10 3 x 3 x 1.0 mm package information . . . . . . . . . . . . . . . . . . . . 44
8
9
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
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Pin settings
L6984
1
1.1
Pin settings
Pin connection
Figure 2. Pin connection (top view)
1.2
No.
1
2
3
4
5
6
7
Pin description
Table 1. Pin description
Pin
PGOOD
FB
TON
EN
GND
LX
VIN
Description
The open collector output is driven low when the FB voltage is below the V
PGD L
threshold
(see
Table 5).
Inverting input of the error amplifier
A resistor connected between this pin and V
IN
sets the switching frequency.
Enable pin. A logical active high signal enables the device. Connect this pin to V
IN
if not used.
Power GND
Switching node
DC input voltage
Embedded regulator output that supplies the main switching controller.
Connect an external 1
F
capacitor for proper operation.
An integrated LDO regulates VCC = 3.3 V if VBIAS voltage is < 2.4 V.
VCC is connected to VBIAS through a MOSFET switch if VBIAS > 3.2 V and the embedded
LDO is disabled to increase the light load efficiency.
Typically connected to the regulated output voltage. An external voltage reference can be
used to supply the analog circuitry to increase the efficiency at light load. Connect to GND if
not used.
Connect to V
CC
for low noise mode (LNM) / to GND for low consumption mode (LCM)
operation.
8
VCC
9
VBIAS
10
LNM
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DocID025378 Rev 6
L6984
Pin settings
1.3
Maximum ratings
Stressing the device above the rating listed in
Table 2: Absolute maximum ratings
may
cause permanent damage to the device.
These are stress ratings only and operation of the device at these or any other conditions
above those indicated in
Table 5
of this specification is not implied.
Exposure to absolute maximum rating conditions may affect device reliability.
Table 2. Absolute maximum ratings
Symbol
dV
IN
/dt
(1)
V
IN
EN
LX
TON
V
CC
V
BIAS
PGOOD
FB
LNM
T
J
T
STG
T
LEAD
I
HS
, I
LS
Operating temperature range
Storage temperature range
Lead temperature (soldering 10 sec.)
High-side RMS switch current
Low-side RMS switch current
-40
150
-55 to 150
260
420
mA
500
°C
-0.3
V
CC
+ 0.3
see
Table 1
-0.3
6
V
-0.3
V
IN
+ 0.3
Description
Input slew rate
-0.3
Min.
Max.
0.1
40
Unit
V/µs
1. Maximum slew rate should be limited as detailed in
Section 4.1.
1.4
Thermal data
Table 3. Thermal data
Symbol
R
thJA
Parameter
Thermal resistance junction ambient
(device soldered on the STMicroelectronics
®
evaluation board)
Value
50
Unit
C/W
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