LM2902
Low-power quad operational amplifiers
Datasheet - production data
Description
This circuit consists of four independent, high-
gain operational amplifiers (op amps) which
employ internal frequency compensation and are
specifically designed for automotive and
industrial control systems.
The device operates from a single power supply
over a wide range of voltages. Operation from
split power supplies is also possible and the low-
power supply current drain is independent from
the power supply voltage magnitude.
Features
Wide gain bandwidth: 1.3 MHz
Input common-mode voltage range includes
negative rail
Large voltage gain: 100 dB
Supply current per amplifier: 375 µA
Low input bias current: 20 nA
Low input offset current: 2 nA
Wide power supply range:
Single supply: 3 V to 30 V
Dual supplies: ± 1.5 V to ± 15 V
January 2017
DocID2469 Rev 8
1/21
www.st.com
This is information on a product in full production.
Contents
LM2902
Contents
1
2
3
4
5
6
7
Schematic diagram.......................................................................... 3
Pinout information........................................................................... 4
Absolute maximum ratings and operating conditions ................. 5
Electrical characteristics ................................................................ 7
Electrical characteristic curves ...................................................... 9
Typical single-supply applications .............................................. 12
Package information ..................................................................... 14
7.1
7.2
7.3
SO14 package information .............................................................. 15
TSSOP14 package information ....................................................... 16
QFN16 3x3 package information..................................................... 17
8
9
Ordering information..................................................................... 19
Revision history ............................................................................ 20
2/21
DocID2469 Rev 8
LM2902
Schematic diagram
1
Schematic diagram
Figure 1: Schematic diagram (1/4 LM2902)
V
CC
6
µ
A
4
µ
A
C
C
100µ
A
Q5
Q6
Inverting
input
Non-invertin
g
input
Q2
Q1
Q3
Q4
Q11
Output
Q7
R
SC
Q13
Q10
Q8
Q9
50
µ
A
GND
Q12
DocID2469 Rev 8
3/21
Pinout information
LM2902
2
Pinout information
Figure 2: Package pin connections (top view)
Output 1
Inverting input 1
Non-inverting input 1
VCC +
Non-inverting Input 2
Inverting input 2
Output 2
1
2
3
4
5
6
7
+
-
+
-
-
+
-
+
14
13
12
11
10
9
8
Output 4
Inverting input 4
Non-inverting input 4
VCC -
Non-inverting input 3
Inverting input 3
Output 3
SO14 and TSSOP14
OUT1
OUT4
IN1-
16
IN1+ 1
VCC+ 2
NC 3
IN2+ 4
5
IN2-
15
14
IN4-
13
12 IN4+
NC(1)
11 VCC-
10 NC
9
IN3+
6
OUT2
7
OUT3
8
IN3-
QFN16 3x3
1.
The exposed pads of the QFN16 3x3 can be connected to VCC- or left floating.
4/21
DocID2469 Rev 8
LM2902
Absolute maximum
ratings and operating
conditions
3
Symbol
V
CC
V
id
V
in
Absolute maximum ratings and operating conditions
Table 1: Absolute maximum ratings (AMR)
Parameter
Supply voltage
(1)
Differential input voltage
(2)
Input voltage
Output short-circuit duration
(3)
T
j
T
stg
I
in
Maximum junction temperature
Storage temperature range
Input current : V
in
driven negative
(4)
Input current : V
in
driven positive above AMR value
Thermal resistance junction-to-ambient
(6)
(5)
Value
± 16 to 32
32
-0.3 to 32
Infinite
150
-65 to 150
5 in DC or 50 in AC
(duty cycle = 10 %, T = 1 s)
0.4
105
100
45
31
32
14
370
150
Unit
V
s
°C
mA
SO14
R
thja
TSSOP14
QFN16 3x3
SO14
R
thjc
Thermal resistance junction-to-case
(7)
° C/W
TSSOP14
QFN16 3x3
HBM: human body model
ESD
MM: machine model
(8)
V
CDM: charged device model
Notes:
(1)
(2)
(9)
1500
All voltage values, except the differential voltage are with respect to the network ground terminal.
Differential voltages are the non-inverting input terminal with respect to the inverting input terminal.
(3)
Short-circuits
(4)
This
from the output to V
CC+
can cause excessive heating and eventual destruction. The maximum output current is
approximately 20 mA, independent of the magnitude of V
CC+
.
input current only exists when the voltage at any of the input leads is driven negative. It is due to the collector-base junction
of the input PNP transistor becoming forward-biased and thereby acting as an input diode clamp. In addition to this diode action,
there is an NPN parasitic action on the IC chip. This transistor action can cause the output voltages of the op amps to go to the
V
CC
voltage level (or to ground for a large overdrive) for the time during which an input is driven negative. This is not destructive
and normal output is restored for input voltages above -0.3 V.
(5)
The junction base/substrate of the input PNP transistor polarized in reverse must be protected by a resistor in series with the
inputs to limit the input current to 400 µ A max (R = (Vin - 36 V)/400 µ A).
(6)
R
thja/c
are typical values.
(7)
Human
(8)
body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 kΩ resistor between
two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating.
Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device
with no external series resistor (internal resistor < 5 Ω). This is done for all couples of connected pin combinations while the other
pins are floating.
(9)
Charged
device model: all pins and the package are charged together to the specified voltage and then discharged directly to
the ground through only one pin. This is done for all pins.
DocID2469 Rev 8
5/21