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LT4294HMS#PBF

IC POE CONTROLLER 10-MSOP

器件类别:模拟混合信号IC    信号电路   

厂商名称:Linear ( ADI )

厂商官网:http://www.analog.com/cn/index.html

器件标准:

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器件参数
参数名称
属性值
Brand Name
Linear Technology
是否Rohs认证
符合
厂商名称
Linear ( ADI )
零件包装代码
MSOP
包装说明
MSOP-10
针数
10
制造商包装代码
MS
Reach Compliance Code
compliant
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LT4294
IEEE 802.3bt
PD Interface Controller
FEATURES
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DESCRIPTION
The
LT
®
4294
is an IEEE 802.3af/at/bt (Draft 3.7)-compliant
powered device (PD) interface controller. The
T2P
output
indicates the number of classification events received
during IEEE 802.3bt-compliant mutual identification and
negotiation of available power.
The LT4294 utilizes an external, low R
DS(ON)
N-channel
hot swap MOSFET and supports the LT4320/LT4321 ideal
diode bridges, to extend the end-to-end power delivery
efficiency and eliminate costly heat sinks. The LT4294
also includes a power good output, onboard signature
resistor, undervoltage lockout, and thermal protection.
Start-up inrush current is adjustable with an external
capacitor. Auxiliary power override is supported as low
as 9V with the AUX pin.
The LT4294 can be configured to support all possible
802.3bt, 802.3at and 802.3af power levels with external
component changes. Pin-for-pin compatibility with the
LT4275 family of PD Interface Controllers enables easy
migration between LTPoE++ PDs and IEEE 802.3bt-
compliant PDs.
All registered trademarks and trademarks are the property of their respective owners.
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IEEE 802.3af/at/bt (Draft 3.7) Powered Device (PD)
Controller
Supports Up to 71.3W PDs
5-Event Classification Sensing
Superior Surge Protection (100V Absolute Maximum)
Wide Junction Temperature Range (–40°C to 125°C)
Overtemperature Protection
Integrated Signature Resistor
External Hot Swap N-Channel MOSFET for Lowest
Power Dissipation and Highest System Efficiency
Configurable Aux Power Support as Low as 9V
Easy Migration Between LTPoE++
®
PDs and IEEE
802.3bt PDs
Pin Compatible with LT4275A/B/C
Available in 10-Lead MSOP and 3mm
×
3mm DFN
Packages
APPLICATIONS
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High Power Wireless Data Systems
Outdoor Security Camera Equipment
Commercial and Public Information Displays
High Temperature Industrial Applications
TYPICAL APPLICATION
IEEE 802.3bt Single-Signature Powered Device Interface
V
AUX
(9V TO 60V)
PSMN040-100MSE
V
PORT
C
PD
0.1µF
3.3k
47nF
VPORT HSGATE
AUX
RCLASS
RCLASS++
R
CLS
R
CLS++
LT4294
T2P
4294 TA01a
Single-Signature
Power Classification
C
PORT
+
DATA
PAIR
~
~
~
~
+
+
CLASS
0
1
V
IN
AVAILABLE
POWER
AT PD INPUT
13W
3.84W
6.49W
13W
25.5W
40W
51W
62W
71.3W
2
SPARE
PAIR
HSSRC
PWRGD
ISOLATED
POWER
SUPPLY
RUN
+
V
OUT
3
4
5
6
7
8
GND
OPTO
PSE TYPE
(TO µP)
Document Feedback
For more information
www.analog.com
1
Rev. A
LT4294
ABSOLUTE MAXIMUM RATINGS
(Notes 1, 3)
VPORT, HSSRC Voltages ......................... –0.3V to 100V
HSGATE Current.................................................. ±20mA
RCLASS, RCLASS++
Voltages .......................... –0.3V to 8V (and ≤ VPORT)
AUX Current ........................................................ ±1.4mA
T2P,
PWRGD Voltage ............................... –0.3V to 100V
T2P,
PWRGD Current ...............................................5mA
Operating Junction Temperature Range (Note 4)
LT4294I ................................................–40°C to 85°C
LT4294H ............................................ –40°C to 125°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec.).................. 300°C
PIN CONFIGURATION
TOP VIEW
GND
AUX
RCLASS
RCLASS++
GND
1
2
3
4
5
11
GND
10 VPORT
9 HSGATE
8 HSSRC
7 PWRGD
6
T2P
TOP VIEW
GND
AUX
RCLASS
RCLASS++
GND
1
2
3
4
5
10
9
8
7
6
VPORT
HSGATE
HSSRC
PWRGD
T2P
DD PACKAGE
10-LEAD (3mm
×
3mm) PLASTIC DFN
T
JMAX
= 150°C,
θ
JC
= 5°C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB GND
MS PACKAGE
10-LEAD PLASTIC MSOP
T
JMAX
= 150°C,
θ
JC
= 45°C/W
ORDER INFORMATION
LEAD FREE FINISH
LT4294IDD#PBF
LT4294HDD#PBF
LT4294IMS#PBF
LT4294HMS#PBF
TAPE AND REEL
LT4294IDD#TRPBF
LT4294HDD#TRPBF
LT4294IMS#TRPBF
LT4294HMS#TRPBF
PART MARKING*
LHBX
LHBX
LTHBW
LTHBW
PACKAGE DESCRIPTION
10-Lead (3mm
×
3mm) Plastic DFN
10-Lead (3mm
×
3mm) Plastic DFN
10-Lead Plastic MSOP
10-Lead Plastic MSOP
TEMPERATURE RANGE
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Tape and reel specifications.
Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 3)
SYMBOL PARAMETER
VPORT Operating Input Voltage
V
SIG
V
CLASS
V
MARK
VPORT Signature Range
VPORT Classification Range
VPORT Mark Range
CONDITIONS
At VPORT Pin
At VPORT Pin
At VPORT Pin
At VPORT Pin, Preceded by V
CLASS
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ELECTRICAL CHARACTERISTICS
MIN
1.5
12.5
5.6
TYP
MAX
60
10
21
10
UNITS
V
V
V
V
Rev. A
2
For more information
www.analog.com
LT4294
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
VPORT Aux Mode Range
Signature/Class Hysteresis Window
V
RESET
V
HSON
V
HSOFF
Reset Threshold
Hot Swap Turn-On Voltage
Hot Swap Turn-Off Voltage
Hot Swap On/Off Hysteresis Window
Supply Current
Supply Current
Supply Current During Classification
Supply Current During Mark Event
Detection and Classification Signature
Detection Signature Resistance
Resistance During Mark Event
RCLASS/RCLASS++ Operating Voltage
Classification Signature Stability Time
Analog/Digital Interface
V
AUXT
I
AUXH
AUX Threshold
AUX Pin Hysteresis Current
T2P
Output Low
PWRGD Output Low
PWRGD Leakage Current
T2P
Leakage Current
Hot Swap Control
I
GPU
V
GOC
Timing
f
T2P
T2P
Frequency
After PWRGD Valid, if IEEE802.3bt PSE Is Mutually Identified
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l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 3)
CONDITIONS
At VPORT Pin, AUX > V
AUXT
At VPORT Pin, Preceded by V
CLASS
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MIN
8
1.0
2.6
TYP
MAX
60
5.6
UNITS
V
V
V
V
V
V
35
30
3
31
37
V
VPORT
= V
HSSRC
= 57V
V
VPORT
= 17.5V, RCLASS and RCLASS++ Open
V
VPORT
= V
MARK
After 1st Classification Event
V
SIG
(Note 2)
V
MARK
(Note 2)
–10mA ≥ I
RCLASS
≥ –36mA, V
CLASS
V
VPORT
Step to 17.5V,
34.8Ω from RCLASS or RCLASS++ to GND
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2
0.4
0.5
23.7
5.8
1.32
24.4
8.3
1.40
0.7
0.9
2.2
25.2
11
1.43
2
mA
mA
mA
V
ms
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6.1
3.2
6.3
5
6.5
7
0.8
0.8
5
5
V
µA
V
V
µA
µA
µA
V
µA
V
AUX
= 6.1V
1mA Load
1mA Load
V
PWRGD
= 60V
T2P
= 60V
V
HSGATE
– V
HSSRC
= 5V (Note 6)
–10µA Load, with Respect to HSSRC
V
HSGATE
– V
HSSRC
= 5V
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HSGATE Pull-Up Current
HSGATE Open Circuit Voltage
HSGATE Pull-Down Current
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–27
10
200
690
–22
–18
18
840
50
25
25
990
Hz
%
%
%
T2P
Duty Cycle in PoE Operation (Note 5) After 4-Event Classification
After 5-Event Classification
(RCLASS++ Has Resistor to GND)
T2P
Duty Cycle in Auxiliary
V
AUX
> V
AUXT
, and RCLASS++ Has Resistor to GND
Supply Operation (Note 5)
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
Signature resistance specifications do not include resistance
added by the external diode bridge which can add as much as 1.1k to the
port resistance.
Note 3:
All voltages with respect to GND unless otherwise noted. Positive
currents are into pins; negative currents are out of pins unless otherwise
noted.
Note 4:
This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 150°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 5:
Specified as the percentage of the period which
T2P
is low
impedance with respect to GND.
Note 6:
I
GPU
available in PoE powered operation. That is, available after
V
VPORT
> V
HSON
and V
AUX
< V
AUXT,
over the range where V
VPORT
is
between V
HSOFF
and 60V.
For more information
www.analog.com
3
Rev. A
LT4294
TYPICAL PERFORMANCE CHARACTERISTICS
Input Current vs Input Voltage 25k
Detection Signature Range
0.5
T = –40°C
T = 25°C
T = 75°C
T = 125°C
VPORT VOLTAGE (V)
37
36
35
34
33
32
31
0
0
2
4
6
VPORT VOLTAGE (V)
8
10
4294 G01
VPORT Hot Swap Thresholds
2.0
Hot Swap ON
SUPPLY CURRENT (mA)
1.5
Supply Current During Power-On
T = –40°C
T = 25°C
T = 75°C
T = 125°C
0.4
VPORT CURRENT (mA)
0.3
1.0
0.2
0.1
0.5
Hot Swap OFF
0
30
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
35
40
45
50
VPORT VOLTAGE (V)
55
60
4294 G03
4294 G02
Detection Signature Resistance
vs Input Voltage
26.25
T = –40°C
T = 25°C
T = 75°C
T = 125°C
VPORT VOLTAGE (V)
1
3
5
7
VPORT VOLTAGE (V)
9
4294 G04
Reset Threshold
5.6
5.1
4.6
4.1
3.6
3.1
2.6
–50
SIGNATURE RESISTANCE (k )
25.75
25.25
24.75
24.25
23.75
–25
0
25
50
75
TEMPERATURE (°C)
100
125
4294 G05
PWRGD,
T2P
Output Low
Voltage vs Current
4
T = –40°C
T = 25°C
T = 75°C
T = 125°C
VPORT VOLTAGE (V)
12.5
VPORT Classification Thresholds
DETECT OR MARK TO CLASS
CLASS TO MARK
T2P
FREQUENCY (Hz)
990
940
890
840
790
740
T2P
Frequency
3
VOLTAGE (V)
12.0
11.5
2
11.0
1
10.5
0
0
1
2
3
CURRENT (mA)
4
5
4294 G06
10.0
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
690
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
4294 G07
4294 G08
4
Rev. A
For more information
www.analog.com
LT4294
PIN FUNCTIONS
GND (Pins 1, 5, DFN Exposed Pad Pin 11):
Device Ground.
Exposed Pad must be electrically and thermally connected
to pin 5 and PCB GND.
AUX (Pin 2):
Auxiliary Sense. A resistive divider from the
auxiliary power input to AUX sets the voltage at which the
auxiliary supply takes over. In auxiliary power operation,
HSGATE pulls down, the signature resistor disconnects,
classification is disabled, the PWRGD pin is high imped-
ance and
T2P
indicates max available power. The AUX pin
sinks I
AUXH
when below its threshold voltage of V
AUXT
to
provide hysteresis. Connect to GND when not used.
RCLASS (Pin 3):
Configurable PoE Classification Resistor.
See Table 2.
RCLASS++ (Pin 4):
Configurable PoE Classification Resis-
tor. See Table 2.
T2P
(Pin 6):
PSE Type Indicator, Open-Drain Output. See
the Applications Information section for pin behavior.
PWRGD (Pin 7):
Power Good Indicator, Open-Drain Output.
Pulls to GND during V
CLASS
and inrush.
HSSRC (Pin 8):
External Hot Swap MOSFET Source. Con-
nect to source of the external MOSFET.
HSGATE (Pin 9):
External Hot Swap MOSFET Gate Control,
Output. Connect to gate of the external MOSFET.
VPORT (Pin 10):
PD interface upper power rail and external
Hot Swap MOSFET drain connection.
For more information
www.analog.com
5
Rev. A
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参数对比
与LT4294HMS#PBF相近的元器件有:LT4294HDD#TRPBF、LT4294HMS#TRPBF、LT4294IMS#PBF、LT4294HDD#PBF、LT4294IDD#PBF。描述及对比如下:
型号 LT4294HMS#PBF LT4294HDD#TRPBF LT4294HMS#TRPBF LT4294IMS#PBF LT4294HDD#PBF LT4294IDD#PBF
描述 IC POE CONTROLLER 10-MSOP IC POE CONTROLLER 10-DFN IC POE CONTROLLER 10-MSOP IC POE CONTROLLER 10-MSOP IC POE CONTROLLER 10-DFN IC POE CONTROLLER 10-DFN
Brand Name Linear Technology - - Linear Technology Linear Technology Linear Technology
是否Rohs认证 符合 - - 符合 符合 符合
厂商名称 Linear ( ADI ) - - Linear ( ADI ) Linear ( ADI ) Linear ( ADI )
零件包装代码 MSOP - - MSOP DFN DFN
包装说明 MSOP-10 - - MSOP-10 DFN-10 DFN-10
针数 10 - - 10 10 10
制造商包装代码 MS - - MS DD DD
Reach Compliance Code compliant - - compliant compliant compliant
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