step down DC/DC converter for medium power applications.
The design consists of 2A and 1A primary output switches.
In addition to the 2A/1A capability, a 1A dependant output
switch can be externally connected to either of the primary
outputs to produce 3A/1A dual regulator or 2A/2A dual
regulator configurations.
Supply operation is from 2.25V to 5.5V. The switching
frequency can be set to 2.25MHz, adjustable 0.75MHz to
4MHz, or synchronized to an external clock. Each output
is adjustable from 0.6V to 5V and has output tracking
on power-up. Internal synchronous low R
DS(ON)
power
switches provide high efficiency without external Schottky
diodes.
User-selectable modes (Burst Mode
®
operation, pulse
skipping and forced continuous) allow trade-off between
ripple noise and power efficiency. Burst Mode operation
provides high efficiency at light loads. Pulse-skipping
mode provides low ripple noise at light loads.
The device is capable of low dropout configurations and
both channels can operate at 100% duty cycle. In shut-
down, the device draws <1μA.
L,
LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners. Protected by U.S. Patents, including 5481178, 6611131, 6304066, 6498466, 6580258.
V
IN
Range: 2.25V to 5.5V
V
OUT
Range: 0.6V to 5V
Programmable Frequency Operation; 2.25MHz, or
Adjustable Between 0.75MHz to 4MHz
Low R
DS(ON)
Internal Switches
High Efficiency: Up to 96%
No Schottky Diodes Required
Short-Circuit Protected
Current Mode Operation for Excellent Line and Load
Transient Response
Low Ripple Burst Mode Operation (30mV
P-P
),
I
Q
= 160μA
Ultralow Shutdown Current: I
Q
< 1μA
Low Dropout Operation: 100% Duty Cycle
Power Good Output For Each Channel
Externally or Internally Programmable Burst Level
External or Internal Soft-Start or Supply Tracking
Available in Thermally Enhanced 28-Lead
(4mm
×
5mm) QFN and TSSOP Packages
APPLICATIONS
n
n
n
n
Netbooks/Ultra-Mobile PCs
PC Cards
Wireless and DSL Modems
Point of Load DC/DC Conversion
TYPICAL APPLICATION
V
IN
2.25V TO
5.5V
C
IN
22μF
0.56μH
100pF
V
IN
95.3k
30.1k V
IN
V
IN1
V
CCA
V
CCD
V
IN2
SYNC/MODE
V
OUT2
2.5V, 3A
PGOOD2
SW2A
SW2B
SW1D
RUN2
V
FB2
BMC2
TRACK/SS2
PHASE
I
TH2
10pF
13k
1000pF
EXPOSED PAD
PGND2
GNDA
LTC3546
RUN1
V
FB1
BMC1
TRACK/SS1
FREQ
I
TH1
PGND1
13k
1000pF
3546 TA01a
V
OUT2
Efficiency (Burst Mode Operation)
100
1.22μH
100pF
V
IN
30.1k
30.1k
EFFICIENCY (%)
V
OUT1
1.2V, 1A
SW1D CONNECTED TO SW2
V
IN
= 3.6V
95 V
OUT
= 2.5V
90
85
80
POWER LOSS
75
10pF
70
0.001
0.001
0.0001
EFFICIENCY
100
10
POWER LOSS (W)
1
0.1
0.01
PGOOD1
SW1
68μF
22μF
V
IN
0.01
0.1
1
LOAD CURRENT (A)
10
3546 TA01b
3546fb
1
LTC3546
ABSOLUTE MAXIMUM RATINGS
(Note 1)
V
IN1
, V
IN1D
, V
IN2
, V
CCA
, V
CCD
Voltages ......... –0.3V to 6V
SYNC/MODE, SW1, SW1D, SW2A, SW2B,
RUN1, RUN2, V
FB1
, V
FB2
, PHASE, FREQ,
I
TH1
, I
TH2
, TRACK/SS1, TRACK/SS2, BMC1,
BMC2 Voltages ................ –0.3V to (V
IN1
or V
IN2
) + 0.3V
Maximum Difference Between Any of
V
IN1
, V
IN1D
, V
IN2
, V
CCA
, V
CCD
..................................0.3V
PGOOD1, PGOOD2 Voltage .......................... –0.3V to 6V
Operating Junction Temperature Range
(Notes 2, 6, 7) ........................................ –40°C to 125°C
Storage Temperature Range................... –65°C to 125°C
PIN CONFIGURATION
TOP VIEW
SYNC/MODE
PGOOD2
PGOOD1
V
CCA
SYNC/MODE
PGOOD2
BMC2
22 BMC1
21 TRACK/SS1
20 V
FB1
29
19 I
TH1
18 PHASE
17 RUN1
16 PGND2
15 PGND1
9 10 11 12 13 14
PGND1D
SW1D
SW2A
SW2B
V
IN1D
SW1
TRACK/SS2
V
FB2
I
TH2
V
CCD
RUN2
1
2
3
4
5
6
7
8
9
29
TOP VIEW
28 GNDA
27 FREQ
26 PGOOD1
25 BMC1
24 TRACK/SS1
23 V
FB1
22 I
TH1
21 PHASE
20 RUN1
19 PGND2
18 PGND1
17 PGND1D
16 SW1
15 SW1D
GNDA
28 27 26 25 24 23
BMC2 1
TRACK/SS2 2
V
FB2
3
I
TH2
4
V
CCD
5
RUN2 6
V
IN2
7
V
IN1
8
FREQ
V
CCA
V
IN2
10
V
IN1
11
V
IN1D
12
SW2A 13
SW2B 14
UFD PACKAGE
28-LEAD (4mm 5mm) PLASTIC QFN
FE PACKAGE
28-LEAD PLASTIC TSSOP
T
JMAX
= 125°C,
θ
JA
= 34°C/W
EXPOSED PAD (PIN 29) IS GNDD
T
JMAX
= 125°C,
θ
JA
= 25°C/W
EXPOSED PAD (PIN 29) IS GNDD MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC3546EUFD#PBF
LTC3546IUFD#PBF
LTC3546EFE#PBF
LTC3546IFE#PBF
LEAD BASED FINISH
LTC3546EUFD
LTC3546IUFD
LTC3546EFE
LTC3546IFE
TAPE AND REEL
LTC3546EUFD#TRPBF
LTC3546IUFD#TRPBF
LTC3546EFE#TRPBF
LTC3546IFE#TRPBF
TAPE AND REEL
LTC3546EUFD#TR
LTC3546IUFD#TR
LTC3546EFE#TR
LTC3546IFE#TR
PART MARKING*
3546
3546
LTC3546FE
LTC3546FE
PART MARKING*
3546
3546
LTC3546FE
LTC3546FE
PACKAGE DESCRIPTION
28-Lead (4mm
×
5mm) Plastic QFN
28-Lead (4mm
×
5mm) Plastic QFN
28-Lead Plastic TSSOP
28-Lead Plastic TSSOP
PACKAGE DESCRIPTION
28-Lead (4mm
×
5mm) Plastic QFN
28-Lead (4mm
×
5mm) Plastic QFN
28-Lead Plastic TSSOP
28-Lead Plastic TSSOP
TEMPERATURE RANGE
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
TEMPERATURE RANGE
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
3546fb
2
LTC3546
ELECTRICAL CHARACTERISTICS
SYMBOL
V
IN1
, V
IN1D
,
V
IN2,
V
CCA
,
V
CCD
I
FB1
, I
FB2
V
FB1
, V
FB2
ΔV
LINEREG
PARAMETER
Operating Voltage Range
The
l
denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= V
CCA
= 3.6V, unless otherwise specified. (Note 2)
CONDITIONS
V
IN1
= V
IN1D
= V
IN2
= V
CCA
= V
CCD
MIN
2.25
TYP
MAX
5.5
UNITS
V
Feedback Pin Input Current
Feedback Voltage
Reference Voltage Line Regulation
%/V is The Percentage Change in V
OUT
with a Change in V
IN
Output Voltage Load Regulation
Error Amplifier Transconductance
Tracking Voltage Offset
Tracking Current Source
Input DC Supply Current (Note 4)
Active Mode
Half Active Mode (V
RUN1
= V
IN
, V
RUN2
= 0)
Half Active Mode (V
RUN1
= 0, V
RUN2
= V
IN
)
Both Channels in Sleep Mode
Shutdown
(Note 3)
(Note 3)
V
IN
= 2.25V to 5.5V (Note 3)
l
±0.1
0.588
0.6
0.04
0.612
0.2
μA
V
%/V
ΔV
LOADREG
g
m(EA)
V
TRACK/SS1
,
V
TRACK/SS2
I
TRACK/SS1
,
I
TRACK/SS2
I
S
I
TH1
, I
TH2
= 0.36V (Note 3)
I
TH1
, I
TH2
= 0.84V (Note 3)
(Note 3)
V
TRACK/SS1,2
= 0.3V
V
TRACK/SS1,2
= 0V
l
l
0.02
–0.02
1400
0.2
–0.2
15
%
%
μS
mV
μA
0.8
1.15
1.5
V
FB1
= V
FB2
= 0.55V, V
MODE
= V
IN
,
V
RUN1
= V
RUN2
= V
IN
V
FB1
= 0.55V, V
MODE
= V
IN
, V
RUN1
= V
IN
,
V
RUN2
= 0V
V
FB2
= 0.55V, V
MODE
= V
IN
, V
RUN1
= 0V,
V
RUN2
= V
IN
V
FB1
= V
FB2
= 0.75V, V
MODE
= V
IN
,
V
RUN1
= V
RUN2
= V
IN
V
RUN1
= V
RUN2
= 0V
V
FREQ
: R
T
= V
IN
V
FREQ
: R
T
= 143k
V
FREQ
: Resistor (Note 5)
BMC1 = V
IN
, V
ITH1
= 1.4V
BMC1 = 0.4V, V
ITH1
= 0V
l
600
400
400
160
0.2
1.8
1.2
0.75
1.4
2.8
2.25
1.5
1.6
0.45
3.2
0.9
3.2
1.6
4.8
2.4
0.19
0.18
0.19
0.17
0.096
0.085
0.01
990
800
800
300
1
2.9
1.8
4
μA
μA
μA
μA
μA
MHz
MHz
MHz
A
A
A
A
A
A
A
A
Ω
Ω
Ω
Ω
Ω
Ω
f
OSC
Oscillator Frequency
I
LIM1
I
LIM2
I
LIM1+1D
Peak Switch Current Limit on SW1 (1A)
Peak Switch Current Limit on SW2A/B (2A) BMC2 = V
IN
, V
ITH1
= 1.4V
BMC2 = 0.4V, V
ITH1
= 0V
Peak Switch Current Limit on
SW1 + SW1D (2A)
Peak Switch Current Limit on
SW2A/B + SW1D (3A)
SW1 Top Switch On-Resistance (1A)
SW1 Bottom Switch On-Resistance
SW1D Top Switch On-Resistance (1A)
SW1D Bottom Switch On-Resistance
SW2A/B Top Switch On-Resistance (2A)
SW2A/B Bottom Switch On-Resistance
Switch Leakage Current SW1
SW1 Externally Connected to SW1D
BMC1 = V
IN
(Note 8)
BMC1 = 0.4V (Note 8)
SW2A/B Externally Connected to SW1D
BMC2 = V
IN
(Note 8)
BMC2 = 0.4V (Note 8)
V
IN2
= 3.6V
V
IN2
= 3.6V
V
IN2
= 3.6V
V
IN2
= 3.6V
V
IN1
= 3.6V
V
IN1
= 3.6V
V
IN
= 6V
V
ITH1
= 0V
V
RUN1
= 0V
2.5
I
LIM2+1D
3.75
R
DS(ON)1
R
DS(ON)1D
R
DS(ON)2
I
SW1(LKG)
1
μA
3546fb
3
LTC3546
ELECTRICAL CHARACTERISTICS
SYMBOL
I
SW1D(LKG)
PARAMETER
Switch Leakage Current SW1D
The
l
denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= V
CCA
= 3.6V, unless otherwise specified. (Note 2)
CONDITIONS
V
IN
= 6V
V
ITH1
= V
ITH2
= 0V
V
RUN1
= V
RUN2
= 0V
V
IN
= 6V
V
ITH2
= 0V
V
RUN2
= 0V
V
IN1
, V
IN2
, V
CCA
, V
CCD
Rising
V
IN1
, V
IN2
, V
CCA
, V
CCD
Falling
V
FB1
Ramping Up, V
SYNC/MODE
= 0V
2.03
1.86
MIN
TYP
0.01
MAX
1
UNITS
μA
I
SW2A/B(LKG)
Switch Leakage Current SW2A/B
0.01
1
μA
V
UVLO
T
PGOOD1
Undervoltage Lockout Threshold
Threshold for Power Good
Percentage Deviation from Regulated V
FB1
(Typically 0.6V).
Threshold for Power Good
Percentage Deviation from Regulated V
FB2
(Typically 0.6V).
Power Good Pull-Down On-Resistance
Power Good Pull-Down On-Resistance
Soft-Start Internal Time.
2.14
1.97
–8
2.2
2.03
V
V
%
T
PGOOD2
V
FB2
Ramping Up, V
SYNC/MODE
= 0V
–8
%
R
PGOOD1
R
PGOOD2
t
SS
132
132
V
FB
from 0% to 95%, V
TRACK/SS
Is Floating
0.8
0.3
1.2
0.8
±0.01
300
300
1.9
1.2
±1
0.5
Ω
Ω
ms
V
μA
V
V
V
RUN1
, V
RUN2
, RUN1, RUN2, and PHASE Threshold
V
PHASE
I
RUN1
, I
RUN2
,
I
PHASE
RUN1, RUN2, and PHASE Leakage Current V
IN
= 6V, V
PHASE
= 3V, V
RUN1
= V
RUN2
= 3V
VTL
SYNC/MODE
SYNC/MODE Threshold Voltage Low to Put
the Part into Pulse-Skipping Mode
VTH
SYNC/MODE
SYNC/MODE Threshold Voltage High to
Put the Part into Burst Mode Operation
V
SYNC/MODE
I
SYNC/MODE
VTH
FREQ
I
BMC1
, I
BMC2
SYNC/MODE Threshold for Clock
Synchronization
SYNC/MODE Leakage Current
FREQ Threshold Voltage High
BMC1, BMC2 Leakage Current
V
IN
= 6V, V
BMC
= 3V
V
IN
= 6V, V
SYNC/MODE
= 3V
V
IN
– 0.85
V
IN
– 0.5
0.3
0.8
±0.01
1.2
±1
±0.4
V
μA
V
μA
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The LTC3546E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 125°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC3546I is guaranteed
to meet performance specifications over the full –40°C to 125°C operating
junction temperature range
Note 3:
The LTC3546 is tested in feedback loop which servos V
FB1
to the
midpoint for the error amplifier (V
ITH1
= 0.6V) and V
FB2
to the midpoint for
the error amplifier (V
ITH2
= 0.6V).
Note 4:
Total supply current is higher due to the internal gate charge being
delivered at the switching frequency.
Note 5:
Variable frequency operation with resistor is guaranteed by design
and is subject to duty cycle limitations.
Note 6:
This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 7:
T
J
is calculated from the ambient temperature, T
A
, and power
dissipation, P
D
, according to the following formula:
T
J
= T
A
+ (P
D
• 34°C/W)
Note 8:
Minimum current limit is guaranteed by design and correlation to
FPGA/CPLD
